Abstract: A method for manufacturing a conductive laminate and a conductive laminate are provided. The method for manufacturing the conductive laminate includes steps of: providing a substrate having a surface; immersing the substrate into a modifying solution including a silane with a hydrophilic group to form a discontinuous modified layer on the surface of the substrate; forming a barrier layer on the surface of the substrate and the discontinuous modified layer, and forming a conductive layer on a surface of the barrier layer. The barrier layer includes a polymer, and the polymer is selected from the group consisting of: polyvinyl alcohol, polyvinylpyrrolidone, polyacrylic acid, polyethylene glycol, and any combination thereof.

Abstract: The present invention relates to a process for metallizing nonconductive plastics using an etching solution free of hexavalent chromium. The etching solution is based on an acidic permanganate solution. After the treatment of the plastics with the etching solution, the plastics are metallized by means of known processes.

Abstract: The present invention provides a stabilized fine textured metal microstructure that constitutes a durable activated surface usable for bonding a 3D stacked chip. A fine-grain layer that resists self anneal enables metal to metal bonding at moderate time and temperature and wider process flexibility.

Abstract: Disclosed is a method of forming an electric wiring using inkjet printing. The method includes forming a main trench and first and second guide trenches on a substrate. The first and second guide trenches are disposed at opposite sides of the main trench. The method includes ejecting ink into the main trench, the ink including a conductive material. The method also includes heating the substrate to sinter the ink such that the electric wiring is formed an upper portion of the main trench, and contract the ink such that a tunnel is formed in a lower portion of the main trench.

Abstract: A method of manufacturing carbon coated aluminum foil as a cathode of solid aluminum electrolytic capacitors Comprising the steps of: preparing an aluminum foil by setting the aluminum foil into a chamber; roughening at least one surface of the aluminum foil by introducing gas into the chamber and activating an electric field so that the gas is ionized and turned into a plasma; and depositing carbon atoms by introducing gas mixed with carbon atoms and turning on the electric field again so as to make the carbon atoms have positive charge thereby impacting into and attaching firmly to the rough surface of the aluminum foil to form a carbon film.

Abstract: A method of forming a non-volatile resistive oxide memory array includes forming a plurality of one of conductive word lines or conductive bit lines over a substrate. Metal oxide-comprising material is formed over the plurality of said one of the word lines or bit lines. A series of elongated trenches is provided over the plurality of said one of the word lines or bit lines. A plurality of self-assembled block copolymer lines is formed within individual of the trenches in registered alignment with and between the trench sidewalls. A plurality of the other of conductive word lines or conductive bit lines is provided from said plurality of self-assembled block copolymer lines to form individually programmable junctions comprising said metal oxide-comprising material where the word lines and bit lines cross one another.

Abstract: A method is provided for treating the surface of high aspect ratio nanostructures to help protect the delicate nanostructures during some of the rigorous processing involved in fabrication of semiconductor devices. A wafer containing high aspect ratio nanostructures is treated to make the surfaces of the nanostructures more hydrophobic. The treatment may include the application of a primer that chemically alters the surfaces of the nanostructures preventing them from getting damaged during subsequent wet clean processes. The wafer may then be further processed, for example a wet cleaning process followed by a drying process. The increased hydrophobicity of the nanostructures helps to reduce or prevent collapse of the nanostructures.

Abstract: The present invention is a method for fabricating an electrode pair precursor which comprises the steps of creating on one surface of a substrate one or more indents of a depth less than approximately 10 nm and a width less than approximately 1 ?m; depositing a layer of material on the top of this structured substrate to forming a first electrode precursor; depositing another layer the first electrode precursor to form a second electrode precursor; and finally forming a third layer on top of the second electrode precursor.

Abstract: A method of forming a passivation layer comprising silicon nitride on features of a substrate is described. In a first stage of the deposition method, a dielectric deposition gas, comprising a silicon-containing gas and a nitrogen-containing gas, is introduced into the process zone and energized to deposit a silicon nitride layer. In a second stage, a treatment gas, having a different composition than that of the dielectric deposition gas, is introduced into the process zone and energized to treat the silicon nitride layer. The first and second stages can be performed a plurality of times.

Abstract: A method for manufacturing circuit substrate structure and its product are provided. Firstly, an attached enhancement portion having rough surfaces is formed on a surface of a carrier through a roughing process, and a catalyst is disposed on a surface of the attached enhancement portion. Finally, a metal layer is formed on the attached enhancement portion after reacting with the catalyst through chemical plating reduction. The foregoing manufacturing method can effectively reduce the usage of the catalyst or an accelerator to greatly decrease the using costs of the catalyst and the accelerator.

Abstract: A manufacturing method of a thin fan comprises the steps of: providing a plastic material containing a plurality of metal particles; molding the plastic material into a housing; removing a part of a surface of the housing to form a circuit layout area at the housing; and forming a metal layer in the circuit layout area.

Abstract: Disclosed herein are a printed circuit board and a method for manufacturing the same. The printed circuit board includes: a copper pad surface roughness-treated to have a surface roughness of 0.1 to 1.0 ?m pitch period; and an electroless surface treatment plating layer formed on the copper pad. According to the present invention, when the copper pad has a surface roughness of a predetermined pitch period, the electroless surface treatment plating layer formed on the copper pad also has a surface roughness of the predetermined pitch period, thereby having an effect of widening a surface area and improving workability at the time of a wire bonding process for connection with an external device.

Abstract: A novel board for printed wiring comprising a fine conductor wiring having a clear and favorable boundary line and fabricated by an ordinal printing method such as screen printing, a printed wiring board using the same, and methods for manufacturing them. A board for printed wiring and a method for manufacturing the same are characterized in that the surface of a board is subjected to one of the surface treatments: (a) roughening, (2) plasma treatment, (3) roughening and then plasma treatment, and (4) roughening and then forming of a metal film coating by sputtering. A printed wiring board and a method for manufacturing the same is characterize in that a conductor wiring is fabricated by printing using a conductive paste containing metal particles the average particle diameter of which is 4 ?m or less and the maximum particle diameter of which is 15 ?m or less.

Abstract: A method of forming a non-volatile resistive oxide memory array includes forming a plurality of one of conductive word lines or conductive bit lines over a substrate. Metal oxide-comprising material is formed over the plurality of said one of the word lines or bit lines. A series of elongated trenches is provided over the plurality of said one of the word lines or bit lines. A plurality of self-assembled block copolymer lines is formed within individual of the trenches in registered alignment with and between the trench sidewalls. A plurality of the other of conductive word lines or conductive bit lines is provided from said plurality of self-assembled block copolymer lines to form individually programmable junctions comprising said metal oxide-comprising material where the word lines and bit lines cross one another.

Abstract: Disclosed herein is a printed circuit board, including: a substrate having a cavity formed therein; an anodic oxide layer formed by anodizing the substrate; and a circuit layer formed in the cavity. The printed circuit board is advantageous in that, since a circuit layer is formed in a cavity of a substrate, a circuit layer having a thickness necessary for realizing a high-power semiconductor package can be easily formed, and the difficulty of supplying and demanding the raw material of a thick film plating resist can be overcome. Further, the printed circuit board is advantageous in that electrical shorts occurring at the time of forming a thick circuit layer and electrical shorts generated by the compounds remaining after etching can be prevented, thus improving the electrical reliability and stability of a circuit layer.

Abstract: A substrate is provided on which wires can be formed satisfactorily using a dispersion liquid of metal microparticles without causing disconnection or short circuit. The wiring substrate comprises a substrate, an organic membrane formed on the substrate, and a metal wire formed on the organic membrane. An arithmetic mean deviation Ra of the profile of the surface of the organic membrane where the metal wire is formed is not less than 60 nm and not more than 5×10?2D, where D is the width of the metal wire. The contact angle with respect to water on the surface of the organic membrane where the metal wire is formed is not less than 110°.

Abstract: In a substrate treatment method for supplying a coating solution to a substrate with projections and depressions on a front surface thereof to form a coating film on the front surface of the substrate, the coating solution is supplied to the rotating substrate to form a coating film on the front surface of the substrate, and the substrate having the coating film formed thereon is heated to adjust an etching condition of the coating film. Next, the etching solution is supplied to the rotating substrate to etch the coating film, and thereafter the coating solution is supplied to the substrate to form a flat coating film on the front surface of the substrate. Thereafter, the substrate is heated to cure the coating film. This flattens the coating film with uniformity and high accuracy without undergoing a high-load process such as chemical mechanical polishing.

Abstract: The invention relates to a method for producing a contact terminal for electrical matters made of copper or a copper-base alloy in order to increase the reliability and lifetime of the contact terminal. According to the invention a textured structure is formed on the surface of the contact terminal by rolling of patterns. The invention also relates to a use of a textured structure based on cavities formed on the surface of a contact terminal for preserving a lubricant.

Abstract: Disclosed is a solution for inhibiting palladium activity including an aqueous halogenic acid solution as a pre-treatment solution which may be used before an electroless plating of a printed circuit board to prevent bad plating and a method for preventing bad plating by using the same. More particularly, disclosed is a solution for inhibiting palladium activity including 0.1 to 10 mol of an aqueous halogenic acid solution as a pre-treatment solution which may be used before an ENIG plating or ENEPIG plating of a printed circuit board to prevent bad plating. Disclosed is also a method for preventing bad plating by minimizing defects of shorts between patterns which are caused by plating spreading during the surface treatment of a printed circuit board having fine patterns.

Abstract: A photosensitive resin composition comprising a (A) binder polymer, a (B) photopolymerizing compound having ethylenic unsaturated bonds in the molecule, a (C) photopolymerization initiator and a (D) polymerization inhibitor, wherein the (C) photopolymerization initiator comprises an acridine compound, and the content of the (D) polymerization inhibitor is 20-100 ppm by weight.

Abstract: A method for manufacturing a printed wiring board includes preparing insulative board having first and second surfaces, forming metal film on the first surface, plating resist on the metal film and plated-metal film on the metal film exposed by the plating resist, covering portion of the plated-metal film with etching resist, etching to reduce thickness of the plated-metal film exposed by the etching resist, removing the etching and plating resists, by removing the metal film exposed after removing the plating resist, forming wiring comprising pad for electronic component having gold bump and conductive circuit which is thinner than the pad, forming solder-resist layer on the first surface and the wiring, and forming opening in the solder-resist layer to expose the pad and portion of the conductive circuit contiguous to the pad and metal coating on the pad and portion of the conductive circuit, which are exposed through the opening.

Abstract: A method of making a layered component with an improved surface finish by a shape metal deposition process is provided. The method comprises the steps of discriminating a first set of vectors on an exterior portion of the component from a second set of vectors on an interior portion of the component, and depositing a layer of metal material based on the vectors discriminated at different rates, wherein the material is deposited on the exterior portion at a high resolution and a slow rate, and the material is deposited on the interior portion at a low resolution and a fast rate.

Abstract: It relates to a method for treating the surface of a printed circuit board resin and a printed circuit board resin treated thereby. The method may allows forming fine circuit patterns and improving the adhesive strength between metal patterns and the printed circuit board resin as well.

Abstract: A process for filling or lining the pores of a porous silicon, silica or alumina substrate with a material which exhibits voltage-dependent index of refraction n is provided comprising providing precursors for the deposited material as a precursor solution, forming a fine mist of droplets of precursor solution and applying the droplets to the porous substrate. The invention provides for the first time porous silicon, silica and alumina substrates having a fill fraction of at least 60%. Fill fractions of close to l00% can be achieved. When provided with top and bottom electrodes, filled porous silicon, silica and alumina wafers can be used as voltage-dependent photonic devices. The same process can be used for lining trenches in the surface of a silicon substrate, for instance for use in production of microelectronic devices such as random access memories.

Abstract: A thin-film assembly (1) including a substrate (2) and at least one electronic thin-film component (8) applied on the substrate by thin-film technology, wherein a base electrode (4) is provided on the substrate, on which base electrode thin-film layers (21) forming part of the thin-film component are arranged together with an upper top electrode (9); the substrate (2) is comprised of a printed circuit board (2) known per se and including an insulation-material base body (3) and a metal coating as the conductor layer (5), wherein the conductor layer (5) forms the base electrode (4) and, to this end, is smoothed at least on the location of the thin-film component (8), and wherein a contact layer (18) is applied by thin-film technology between the smoothed, optionally reinforced, conductor layer (5) and the superimposed thin-film layers (21) of the thin-film component (8), which contact layer is physically or chemically adsorbed on the surface of the base electrode (4).

Abstract: The invention is directed to a method and composition for providing chemically-resistant roughened copper surfaces suitable for subsequent multilayer lamination. In one embodiment, a smooth copper surface is contacted with an adhesion promoting composition under conditions effective to provide a roughened copper surface, the adhesion promoting composition comprising an oxidizer, a pH adjuster, a topography modifier, and a sulfur-containing coating stabilizer. In another embodiment, a smooth copper surface is contacted with an adhesion promoting composition under conditions effective to provide a roughened copper surface, the adhesion promoting composition comprising an oxidizer, a pH adjuster, and a topography modifier. Then, in a subsequent step, the roughened copper surface is contacted with an acid resistance promoting composition.

Abstract: A manufacturing method of a buildup circuit board includes forming a wiring layer on an organic polymer insulating layer by copper electroplating and building up other organic polymer insulating layer on the wiring layer, wherein in a final step of the copper electroplating, a surface of the wiring layer is roughened by copper electroplating and the organic polymer insulating layer is formed directly on the roughened surface of the wiring layer. According to the invention, a specific etching step that is essential for enhancing adhesion between the organic polymer insulating layer and the wiring layer can be omitted and no expensive etching apparatus is necessary, thus being good in economy. In addition, if various types of copper sulfate plating baths containing different types of additives used for via fill plating are used as they are, irregularities on the surface can be made in various forms and roughnesses.

Abstract: Disclosed is a method of forming a metal pattern, the method comprising depositing a dielectric substrate on a supporting substrate; forming a latent mask pattern of a metal pattern on the dielectric substrate; etching the dielectric substrate exposed by the latent mask pattern; forming a seed layer on the supporting substrate by activating the supporting substrate; removing the latent mask pattern and the portion of the seed layer disposed on the latent mask pattern through a lift-off process; and plating a metal layer on the patterned seed layer.

Abstract: A printed circuit board manufacturing method is disclosed. The printed circuit manufacturing method, which includes forming an adhesive layer on a carrier, adhesiveness of the adhesive layer being changed according to heat; forming a circuit pattern on a surface of the adhesive layer; compressing the carrier into the insulation layer to allow the circuit pattern to face the insulation layer; and separating the carrier from the insulation layer by supplying heat to allow the adhesive to reach a predetermined temperature, can reduce a cost of a transferring process and improve the reliability of products by minimizing the affect on a metal pattern, by using a material having the adhesiveness changed according to the temperature as an adhesive layer.

Abstract: A support for immobilizing target molecules comprises a substrate having a plurality of binding regions for binding select target molecules, with target-molecule-capturing agent immobilized at the binding regions. The binding regions are intersperse among other non-binding regions. The binding regions are of sub-micron size, have high selectivity and high binding capacity, and prevent or at least minimize loss of target molecule activity.

Abstract: The present invention relates to a method of polishing an implantable medical device. The method may include positioning an implantable medical device on a support. At least a portion of a surface of the implantable medical device may include a polymer. A fluid may be contacted with at least a portion of the surface of the positioned implantable medical device. In an embodiment, the fluid may be capable of dissolving at least a portion of the polymer at or near the surface of the implantable medical device. The method may further include allowing the fluid to modify at least a portion of the surface of the positioned medical device. A majority of the contacted fluid may be removed from the surface of the implantable medical device. In certain embodiments, the modified portion of the surface may be substantially less thrombogenetic and substantially more mechanically stable than an unmodified surface.

Abstract: An insulation film comprising an organosilicon polymer and an organic polymer such as polyarylene, polyarylene ether, polyimide, and fluororesin is disclosed, wherein the organosilicon polymer has a relative dielectric constant of 4 or less and has a dry etching selection ratio of 1/3 or less to silicon oxide, fluorine-doped silicon oxide, organosilicate glass, carbon-doped silicon oxide, methyl silsesquioxane, hydrogen silsesquioxane, a spin-on-glass, or polyorganosiloxane. The insulation film is used as an etching stopper or a hard mask in a dry etching process of interlayer dielectric films for semiconductors and can produce semiconductors having excellent precision with minimal damages.

Abstract: Methods of reducing the intrusions or migrations of photolithography materials by introducing a sol-gel layer onto a porous thin film prior to applying the photolithography/photoresist material layer. Curing the sol-gel layer results in the sol-gel layer merging or unifying with the underlying porous thin film layer so that the combined sol-gel/thin layer exhibits substantially the same properties as the untreated porous thin film layer before the sol-gel was applied. As a result, a greater etching accuracy is achieved.

Abstract: A method for surface treatment includes: a first step in which a surface treatment apparatus 1 and a substrate 10 in a state where a front surface 102 of the substrate 10 faces the surface treatment apparatus 1 are conveyed to the inside of a decompression chamber to decompress a plurality of concave portions 32 (enclosed spaces); a second step in which the surface treatment apparatus 1 and the substrate 10 are brought out from the inside of the decompression chamber to environment under atmospheric pressure in a state where the substrate 10 is being attracted to the surface treatment apparatus 1 with the use of a difference between negative pressure inside the concave portions 32 and atmospheric pressure; and a third step in which the surface treatment is carried out to a back surface 101 of the substrate 10 with the substrate 10 being attracted by the surface treatment apparatus 1.

Abstract: The present invention discloses a surface treatment process for enhancing both the release rate of metal ions from a sacrificial electrode, and the working life of the electrode. A high density of micro pores are formed on the surface of the sacrificial electrode. Chlorine ions are then implanted into the pores. The chlorine ions prevent a passive film from forming on the sacrificial electrode during use, in which an electric current flows through the sacrificial electrode.

Abstract: The invention is directed to a method and composition for providing chemically-resistant roughened copper surfaces suitable for subsequent multilayer lamination. In one embodiment, a smooth copper surface is contacted with an adhesion promoting composition under conditions effective to provide a roughened copper surface, the adhesion promoting composition comprising an oxidizer, a pH adjuster, a topography modifier, and a sulfur-containing coating stabilizer. In another embodiment, a smooth copper surface is contacted with an adhesion promoting composition under conditions effective to provide a roughened copper surface, the adhesion promoting composition comprising an oxidizer, a pH adjuster, and a topography modifier. Then, in a subsequent step, the roughened copper surface is contacted with an acid resistance promoting composition.

Abstract: The present invention provides a prepreg and a circuit board that can achieve, e.g., low interstitial via connection resistance, excellent connection stability, and high durability, regardless of materials, physical properties, and a combination of the materials of an insulating layer. The present invention also provides a method for manufacturing the prepreg and the circuit board. The prepreg of the present invention includes a laminate including at least one first layer and at least one second layer. The first layer is an insulating layer that includes a resin. The second layer has pores that connect an upper and a lower surface of the second layer, and the upper and the lower surface of the second layer differ from each other in at least one selected from open are ratio and average pore diameter. Using this prepreg makes it possible to provide a circuit board that is characterized, e.g., by low interstitial via connection resistance, excellent connection stability, and high durability.

Abstract: A method and apparatus for making an imprinted conductive circuit using semi-additive plating. A plurality of indented channels is formed on the substrate. The surface is coated with a conductive layer. Portions of the surface other than the indented channels are coated with a non-conductive layer, and metal is plated on the conductive layer in the channels. The non-conductive layer and the first conductive layer are removed from portions of the surface other than the indented channels. In some embodiments, a first set of channels has a first depth and a second set of channels has a second depth. The plating adds a first amount of metal in the first set of channels and the second set of channels. The first set of channels is coated with a non-conductive layer, and a second amount of additional conductive material is plated in the second set of channels.