With Pretreatment Of Substrate Patents (Class 427/98.6)
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Patent number: 12025971Abstract: An apparatus includes a memory interposer including a socket including an inner surface, one or more memories disposed on the inner surface, a bottom surface opposite to the inner surface, and pogo pins disposed on the bottom surface and respectively corresponding to the one or more memories, the pogo pins being configured to connect the one or more memories to a printed circuit board (PCB) including a semiconductor die. The apparatus further includes an intermediate thermal head attached to the memory interposer. The memory interposer is movable with respect to the intermediate thermal head.Type: GrantFiled: February 9, 2022Date of Patent: July 2, 2024Assignee: Intel CorporationInventors: Navneet Singh, Samarth Alva, Amarjeet Kumar, Gaurav Hada
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Patent number: 11522306Abstract: An electrical connector including a substrate, a pitch transformation routing assembly formed on the substrate and including pitch transformation routing members, a first set of contact members, each contact member extends away from a first end of a corresponding pitch transformation routing member, and a second set of contact members, each contact member extends away from a second end of a corresponding pitch transformation routing member. A first subset of the pitch transformation routing members each includes a first routing section extending in a first direction and a second routing section extending in a second direction. A pitch of the first set of contact members associated with the first subset of the pitch transformation routing members is different from a pitch of the second set of contact members associated with the first subset of the pitch transformation routing members.Type: GrantFiled: February 19, 2021Date of Patent: December 6, 2022Assignee: GITech Inc.Inventor: John Williams
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Publication number: 20150114707Abstract: A method of and device for forming vias on an electronic board (such as a PCB board) comprises forming one or more holes on the electronic board, placing a nanomaterial inside the one or more holes, and forming one or more filled holes on the electronic board. The nanomaterial can be nanocopper, which can be either push/pull into the holes on the electronic board or a combination of push and pull. The push/pull can be performed by using a mechanical device or by a person. A capping layer can be on both side of the via. The vias formed by using the nanomaterials provides a high efficient vertical heat transferring path from one side of the electronic board to the other side of the electronic board.Type: ApplicationFiled: October 27, 2014Publication date: April 30, 2015Inventor: Michael James Glickman
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Publication number: 20150072070Abstract: A pretreatment agent for electroless plating is provided, which includes: a fluorine compound; a surfactant; and at least one solvent selected from ethylene-based glycol butyl ethers of formula: C4H9—(OC2H4)m—OH where m is an integer of 1 to 4, and propylene-based glycol butyl ethers of formula: C4H9—(OC3H6)n—OH where n is an integer of 1 to 4. Also provided are a method for pretreating a substrate to be used for a printed wiring board, and a process for producing a printed wiring board, both of which include using a pretreatment agent for electroless plating as described above.Type: ApplicationFiled: September 5, 2014Publication date: March 12, 2015Inventors: Yoshikazu SAIJO, Hisamitsu YAMAMOTO, Masayuki UTSUMI, Takuya OKAMACHI, Takuya KOMEDA
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Publication number: 20150011128Abstract: A circuit board that is to be mounted in a connector socket includes a plurality of electrical connectors located along a side edge of the circuit board. Retention bosses are formed on first and second opposite sides of the circuit board, each of the retention bosses protruding from a surface of the circuit board and extending parallel to and adjacent to the first edge of the circuit board. When the first edge of the circuit board is inserted into a slot of a connector socket, contact surfaces of the first and second retention bosses contact top surfaces of the connector socket to help immobilize the circuit board with respect to the connector socket. Adhesive layers on the contact surfaces of the first and second retention bosses may adhere to the top surfaces of the connector socket to help hold the circuit board immobile with respect to the connector socket.Type: ApplicationFiled: July 2, 2013Publication date: January 8, 2015Inventors: MICHAEL STOCK, SCOTT SEMMLER
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Publication number: 20140295065Abstract: A resin protrusion forming method includes: forming on a substrate a thermal curing resin layer that is in an uncured state; forming a protrusion by pressing a forming mold against the thermal curing resin layer; forming a retaining member that retains a side face of the protrusion; and heating the substrate on which the protrusion and the retaining member have been formed.Type: ApplicationFiled: March 3, 2014Publication date: October 2, 2014Applicant: FUJITSU LIMITEDInventors: Tomomi Sato, Tsutomu KOMURO
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Patent number: 8802183Abstract: The system of the present invention includes a conductive element, an electronic component, and a partial power source in the form of dissimilar materials. Upon contact with a conducting fluid, a voltage potential is created and the power source is completed, which activates the system. The electronic component controls the conductance between the dissimilar materials to produce a unique current signature. The system can also measure the conditions of the environment surrounding the system.Type: GrantFiled: July 11, 2011Date of Patent: August 12, 2014Assignee: Proteus Digital Health, Inc.Inventors: Jeremy Frank, Peter Bjeletich, Hooman Hafezi, Robert Azevedo, Robert Duck, Iliya Pesic, Benedict Costello, Eric Snyder
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Publication number: 20140154406Abstract: Methods and systems are provided for preparing a ruthenium containing liner/barrier for metal deposition, and are useful in the manufacture of integrated circuits. In accordance with one embodiment, a borohydride solution having a pH greater than 12 is mixed with DI water at the place of application to form a pretreatment solution. The pretreatment solution is applied to reduce a ruthenium-containing surface of a substrate. Following reduction of the ruthenium containing surface, copper deposition may be initiated.Type: ApplicationFiled: November 30, 2012Publication date: June 5, 2014Applicant: LAM RESEARCH CORPORATIONInventors: Yezdi Dordi, Dries Dictus
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Publication number: 20140079876Abstract: A structure (10) including (i) a casing (1) made of a dielectric and (ii) a conducting member (2) embedded in the casing (1) so as to be through the casing (1) is manufactured by insert molding. The conducting member (2) is provided with a recess (2c), and an upper mold (40) is provided with a protrusion (40a) corresponding to the recess (2c). The conducting member (2) is positioned to be fixed in the mold by fitting the protrusion (40a) in the recess (2c).Type: ApplicationFiled: July 27, 2012Publication date: March 20, 2014Applicant: SHARP KABUSHIKI KAISHAInventors: Tomofumi Katayama, Takashi Kakinoki
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Patent number: 8673390Abstract: There is disclosed a method of forming crystalline tantalum pentoxide on a ruthenium-containing material having an oxygen-containing surface wherein the oxygen-containing surface is contacted with a treating composition, such as water, to remove at least some oxygen. Crystalline tantalum pentoxide is formed on at least a portion of the surface having reduced oxygen content.Type: GrantFiled: September 13, 2012Date of Patent: March 18, 2014Assignee: Micron Technology, Inc.Inventors: Vishwanath Bhat, Rishikesh Krishnan, Daniel F. Gealy
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Patent number: 8575021Abstract: Methods for substrate processing are described. The methods include forming a material layer on a substrate. The methods include selecting constituents of a molecular masking layer (MML) to remove an effect of variations in the material layer as a result of substrate processing. The methods include normalizing the surface characteristics of the material layer by selectively depositing the MML on the material layer.Type: GrantFiled: March 14, 2013Date of Patent: November 5, 2013Assignee: Intermolecular, Inc.Inventors: Thomas R. Boussie, Tony P. Chiang, Anh Duong, Zachary Fresco, Nitin Kumar, Chi-I Lang, Sandra G. Malhotra, Jinhong Tong
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Patent number: 8551560Abstract: Methods for improving selective deposition of a capping layer on a patterned substrate are presented, the method including: receiving the patterned substrate, the patterned substrate including a conductive region and a dielectric region; forming a molecular masking layer (MML) on the dielectric region; preparing an electroless (ELESS) plating bath, where the ELESS plating bath includes: a cobalt (Co) ion source: a complexing agent: a buffer: a tungsten (W) ion source: and a reducing agent; and reacting the patterned substrate with the ELESS plating bath for an ELESS period at an ELESS temperature and an ELESS pH so that the capping layer is selectively formed on the conductive region. In some embodiments, methods further include a pH adjuster for adjusting the ELESS pH to a range of approximately 9.0 pH to 9.2 pH. In some embodiments, the pH adjuster is tetramethylammonium hydroxide (TMAH). In some embodiments, the MML is hydrophilic.Type: GrantFiled: May 22, 2009Date of Patent: October 8, 2013Assignee: Intermolecular, Inc.Inventors: Jinhong Tong, Zhi-Wen Sun, Chi-I Lang, Nitin Kumar, Bob Kong, Zachary Fresco
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Patent number: 8282988Abstract: There is disclosed a method of forming crystalline tantalum pentoxide on a ruthenium-containing material having an oxygen-containing surface wherein the oxygen-containing surface is contacted with a treating composition, such as water, to remove at least some oxygen. Crystalline tantalum pentoxide is formed on at least a portion of the surface having reduced oxygen content.Type: GrantFiled: August 16, 2011Date of Patent: October 9, 2012Assignee: Micron Technology, IncInventors: Vishwanath Bhat, Rishikesh Krishnan, Daniel F. Gealy
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Patent number: 8263177Abstract: A process is described for treating metal surfaces printed wiring boards and similar substrates to provide improved creep corrosion resistance on such surfaces. A modified organic solderability preservative composition is used in combination with an emulsion polymer to provide a modified polymer coating on the metal surface finish via a chemical reaction to provide enhanced corrosion protection of the surface.Type: GrantFiled: March 27, 2009Date of Patent: September 11, 2012Inventors: Kesheng Feng, Nilesh Kapadia, Witold Paw
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Patent number: 8202567Abstract: To improve the transmission properties of antennae manufactured with known methods, more specifically antennae for application in the UHF range, a method is proposed of producing pattern-forming metal structures on a carrier substrate. The method comprises the following method steps: providing the carrier substrate, forming the pattern on the carrier substrate with a composite material containing dispersed metal, bringing the carrier substrate into contact with halide ions, and thereafter depositing a metal layer onto the pattern formed by the composite material, producing thereby metal structures.Type: GrantFiled: August 4, 2006Date of Patent: June 19, 2012Assignee: Atotech Deutschland GmbHInventors: Franz Kohnle, Michael Guggemos, Matthias Dammasch, Wolfgang Ptak
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Publication number: 20120125514Abstract: Embodiments of the present invention relates generally to the manufacture of printed circuit boards (PCB's) or printed wiring boards (PWB's), and particularly to methods for treating smooth copper surfaces to increase the adhesion between a copper surface and an organic substrate. More particularly, embodiments of the present invention related to methods of achieving improved bonding strength of PCBs without roughening the topography of the copper surface. The bonding interface between the treated copper and the resin layer of the PCB exhibits excellent resistance to heat, moisture, and chemicals involved in post-lamination process steps.Type: ApplicationFiled: July 6, 2010Publication date: May 24, 2012Applicant: ZettaCore, Inc.Inventors: Jen-Chieh Wei, Zhiming Liu, Steven Z. Shi, Werner G. Kuhr
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Publication number: 20110291901Abstract: Technology is described for a slot antenna. The slot antenna can include a substrate having a metal layer on a first side of the substrate. A feed line can be located on a second side of the substrate. A first polygon shaped slot can be formed in the metal layer of a first side of the substrate. A second polygon shaped slot can also be formed in the metal layer of the first side of the substrate. The second polygon shaped slot can be recessed within a perimeter of the first polygon shaped slot and the second polygon shaped slot and first polygon shaped slot share a common side. Examples of the first and second polygon shapes may include square or diamond shapes.Type: ApplicationFiled: May 28, 2010Publication date: December 1, 2011Applicant: Microsoft CorporationInventor: Gerald R. DeJean
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Publication number: 20110214909Abstract: An enhanced substrate for making a printed circuit board (PCB) includes a hydrophobic silane coating of a silane composition intermixed with a silane coupling agent applied to a glass fiber substrate. The silane coupling agent is applied to the surface of the substrate for coupling the substrate to a varnish coating. Applying the silane coupling agent to the surface of the substrate creates surface silanols, which are implicated in conductive anodic filament (CAF) growth. A silane composition, which reacts with the surface silanols, is applied to the surface of the substrate having the silane coupling agent applied thereto to form the hydrophobic silane coating. The surface presented by the hydrophobic silane coating/substrate is hydrophobic and essentially silanol-free. This surface is then dried, and varnish is applied thereto. Then, the substrate, hydrophobic silane coating and varnish are subjected to curing conditions to define the PCB.Type: ApplicationFiled: March 5, 2010Publication date: September 8, 2011Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Dylan Joseph Boday, Joseph Kuczynski
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Patent number: 8012532Abstract: There is disclosed a method of forming crystalline tantalum pentoxide on a ruthenium-containing material having an oxygen-containing surface wherein the oxygen-containing surface is contacted with a treating composition, such as water, to remove at least some oxygen. Crystalline tantalum pentoxide is formed on at least a portion of the surface having reduced oxygen content.Type: GrantFiled: December 18, 2007Date of Patent: September 6, 2011Assignee: Micron Technology, Inc.Inventors: Vishwanath Bhat, Rishikesh Krishnan, Dan Gealy
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Publication number: 20110123724Abstract: A composite for a transducer facilitates an increased actuation force as compared to similar prior art composites for transducers. The composite facilitates increased compliance of the transducer in one direction, an improved reaction time as compared to similar prior art composites for transducers, and provides an increased lifetime of the transducer in which it is applied.Type: ApplicationFiled: January 28, 2011Publication date: May 26, 2011Applicant: Danfoss A/SInventors: Mohamed Yahia Benslimane, Peter Gravesen
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Patent number: 7910157Abstract: In the present invention, an insulating material is applied onto a substrate in a coating treatment unit to form a coating insulating film. The substrate is heated in the heating processing unit, whereby the coating insulating film is hardened partway. A brush is then pressed against the front surface of the coating insulating film in a planarization unit and moved along the front surface of the coating insulating film, thereby planarizing the coating insulating film. The substrate is then heated to completely harden the coating insulating film. According to the present invention, the coating film can be planarized without using the CMP technology.Type: GrantFiled: December 15, 2006Date of Patent: March 22, 2011Assignee: Tokyo Electron LimitedInventors: Shouichi Terada, Tsuyoshi Mizuno, Takeshi Uehara
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Patent number: 7897198Abstract: Electroless plating is performed to deposit conductive materials on work pieces such as partially fabricated integrated circuits. Components of an electroless plating bath are separately applied to a work piece by spin coating to produce a very thin conductive layer (in the range of a few hundred angstroms). The components are typically a reducing agent and a metal source.Type: GrantFiled: September 3, 2002Date of Patent: March 1, 2011Assignee: Novellus Systems, Inc.Inventors: Heung L. Park, Eric G. Webb, Jonathan D. Reid, Timothy Patrick Cleary
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Publication number: 20100319656Abstract: This invention describes how a blend of silicon polymers, mixed with the right combination of fillers applied to fiber reinforcement laminated with an embedded circuit and laser cut into vacuum formable preforms enables the production of “red heat” durable flexible ceramic multiple spark ignition devices which are vacuum formed into the head combustion chamber of IC engines for realizing fuel savings from up to 33% increased combustion efficiency. The MSI device also comprises a spark plug which is made with the steel adjustable grounding gap section removed. The spark plug electrode alignment for the fuel injectors is also used to align the spark plug electrode to insert during assembly into the MSI device (see FIG. 1) circuit port. This electrode insertion enables the electrode to arc within the 360° gap of the circuit port setting off the “in series” arcing of the two other electrodes within the surround combustion circuit completing the drop in potential at the ground attachment (see FIG. 1).Type: ApplicationFiled: June 19, 2008Publication date: December 23, 2010Applicant: FLEXIBLE CERAMICS, INC.Inventor: William A Clarke
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Publication number: 20100265012Abstract: The element size of a stripline filter that achieves a high efficiency percentage with optional stable filter characteristics, is reduced. A stripline filter includes substantially L-shaped top surface resonant lines. The top surface resonant lines include connection electrode parts, first line parts, and second line parts. The connection electrode parts are formed so as to have a width greater than line widths of side surface resonant lines. Each line part faces an edge of a corner portion of a central top surface resonant line at an interval. An edge of each first line part on an edge side of a dielectric substrate, other than a connection portion with the connection electrode part, faces an edge of the dielectric substrate at an interval.Type: ApplicationFiled: June 4, 2010Publication date: October 21, 2010Inventors: Nobuyoshi Honda, Tatsuya Tsujiguchi, Yasunori Takei
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Patent number: 7727578Abstract: Transparent conductors and methods for fabricating transparent conductors are provided. In one exemplary embodiment, a method for fabricating a transparent conductor comprises forming a dispersion comprising a plurality of conductive components and a solvent, applying the dispersion to a substrate in an environment having a predetermined atmospheric humidity that is based on a selected surface resistivity of the transparent conductor, and causing the solvent to at least partially evaporate such that the plurality of conductive components remains overlying the substrate.Type: GrantFiled: December 27, 2007Date of Patent: June 1, 2010Assignee: Honeywell International Inc.Inventors: James V. Guiheen, Lingtao Yu, Kwok-Wai Lem
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Patent number: 7700149Abstract: An approach is provided for depositing a material onto a printed circuit board layer. The approach includes steps of treating surface of a base film, forming a tie layer on the base film, forming a metal conductive layer on the tie layer, and depositing a metal on the metal conductive layer by radiating electronic beams to form a metal plated layer thereon. The above steps are continuously performed in a vacuum chamber. The approach also includes an unwinding roller, film guide rollers, a surface treating part, tie layer and copper conductive layer, a vacuum depositing part for depositing a metal plated layer on the metal conductive layer by radiating electronic beams, and a winding roller, all of which are provided in a vacuum chamber.Type: GrantFiled: August 1, 2005Date of Patent: April 20, 2010Assignee: Toray Saehan Inc.Inventor: Jeong Cho
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Publication number: 20100009070Abstract: A method for forming a solder layer on the surface of a conductive circuit on a printed-wiring board includes discharging slurry containing solder powder onto the surface and heating the substrate. The slurry is discharged by dint of the pressure in a tank for the slurry. In a discharging device to be used in the method, the tank for storing the slurry is provided with a discharge pipe (2) for the slurry and a delivery pipe (1) for gas or solvent to be used for adjusting the pressure in the tank. In this device, one common pipe may be used both for discharging the slurry from the tank and delivering the slurry to the tank and one common pipe may be used for both delivering gas into the tank and sucking the gas from the tank.Type: ApplicationFiled: October 12, 2007Publication date: January 14, 2010Applicant: SHOWA DENKO K.K.Inventors: Takashi Shoji, Takekazu Sakai
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Publication number: 20090246359Abstract: This invention pertains to fabrication of devices. One embodiment is a method of substrate cleaning and electroless deposition of a cap layer for an integrated circuit. The method is performed on a substrate having a surface comprising a metal and dielectric damascene metallization layer. The method comprises exposing the surface of the substrate to a cleaning solution sufficient to clean the surface of the substrate and exposing the surface of the substrate to an electroless deposition solution sufficient to deposit the cap layer. Other embodiments of the present invention include solutions to clean the substrate and solutions to accomplish electroless deposition.Type: ApplicationFiled: March 19, 2009Publication date: October 1, 2009Inventors: Artur KOLICS, Nanhai LI
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Publication number: 20090196980Abstract: A multilayer electrical device, such as a printed circuit board, having a tooth structure including a metal layer set in a dielectric. The device includes a base; a conductive layer adjacent to the base; a dielectric material adjacent to conductive layer; a tooth structure including a metal layer set in the dielectric material to join the dielectric material to the metal layer; and wherein the metal layer forms a portion of circuitry in a circuit board having multiple layers of circuitry.Type: ApplicationFiled: January 30, 2009Publication date: August 6, 2009Inventors: Brian J. McDermott, Daniel McGowan, Ralph Leo Spotts, JR., Sid Tryzbiak
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Publication number: 20090178828Abstract: A heat dissipating wiring board comprises: a metal wiring plate with a circuit pattern formed therein: a filler-containing resin layer embedded with the metal wiring plate such that a top surface of the metal wiring plate is exposed; and a heat dissipating plate arranged on an under surface of the filler-containing resin layer, wherein the circuit pattern is formed of a through groove provided in the metal wiring plate, and this through groove comprises: a fine groove that opens at the top surface of the metal wiring plate; and an expanded groove that expands from a lower end of the fine groove toward the under surface of the metal wiring plate. The heat dissipating wiring board is capable of improving reliability against electric insulation due to a dust or the like in a space of the through groove.Type: ApplicationFiled: June 13, 2007Publication date: July 16, 2009Inventors: Tetsuya Tsumura, Hiroharu Nishiyama, Etsuo Tsujimoto
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Publication number: 20090162537Abstract: One embodiment of the present invention is a method of fabricating an integrated circuit. The method includes providing a substrate having a metal and dielectric damascene metallization layer and depositing substantially on the metal a cap. After deposition of the cap, the substrate is cleaned with a solution comprising an amine to provide a pH for the cleaning solution of 7 to about 13. Another embodiment of the presented invention is a method of cleaning substrates. Still another embodiment of the present invention is a formulation for a cleaning solution.Type: ApplicationFiled: December 13, 2008Publication date: June 25, 2009Inventors: Artur KOLICS, Shijian LI, Tiruchirapalli ARUNAGIRI, William THIE
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Publication number: 20090123661Abstract: A system and method for forming high resolution electronic circuits on a substrate is provided. The system (10) includes a substrate (12), a source of radiant energy (34) and a focusing means (16). The source of radiant energy (34) directs an energy beam (14) through the focusing means (16) in order to direct a focused energy beam (18) onto the surface of the substrate (12). The focused energy beam (18) creates a plurality of channels (20) in the surface of the substrate (12). A paste applicator (22) fills the channels (20) with an electrically conductive paste (24). Once heated and cured, the electrically conductive paste (24) makes up the electrically conductive pathways of the electronic circuit.Type: ApplicationFiled: January 6, 2009Publication date: May 14, 2009Inventors: Christopher Wargo, Scott Mathews, Paul Kydd, Todd A. Kegresse, Chengping Zhang, Michael Duignan, Susan Gordon
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Patent number: 7507434Abstract: An approach is provided for laminating layers for a flexible printed circuit board. The approach includes a method and apparatus for providing a base substrate and the surface of the base substrate is treated by radiating ion beams using a gas mixture including oxygen and argon to improve adhesive strength and heat resistance. A tie layer can be formed on the based film to prevent a metal conductive layer from diffusion and to increase the adhesive strength.Type: GrantFiled: August 1, 2005Date of Patent: March 24, 2009Assignee: Toray Saehan Inc.Inventors: Jeong Cho, Young Kwan Lee, Young Seop Kim
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Publication number: 20090025967Abstract: Methods for attachment and devices produced using such methods are disclosed. In certain examples, the method comprises disposing a capped nanomaterial on a substrate, disposing a die on the disposed capped nanomaterial, drying the disposed capped nanomaterial and the disposed die, and sintering the dried disposed die and the dried capped nanomaterial at a temperature of 300° C. or less to attach the die to the substrate. Devices produced using the methods are also described.Type: ApplicationFiled: July 17, 2008Publication date: January 29, 2009Inventors: Monnir Boureghda, Nitin Desai, Anna Lifton, Oscar Khaselev, Michael T. Marczi, Bawa Singh
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Publication number: 20080296757Abstract: A fluid spreader includes a first surface, wherein the first surface has at least one channel that continuously or discontinuously extends to an outer periphery of the first surface, allowing fluid to flow easily and thereby reducing the thickness of the fluid between the fluid spreader and another device or component.Type: ApplicationFiled: May 30, 2007Publication date: December 4, 2008Inventors: Paul Hoffman, Rajiv Tandon, Chun-Hou Chan
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Publication number: 20080099121Abstract: There is provided a conductive paste obtained by kneading conductive particles into an epoxy resin and having good filling ability into a via hole, which can form a connected portion wherein the connection resistance does not change with time even under high temperature and high humidity conditions. Also, there is provided a method for manufacturing a multilayer printed wiring board using the conductive paste. A conductive paste containing conductive particles and a resin mixture wherein the content of the epoxy resin having a molecular weight of 10,000 or more is from 30 to 90% by weight in the total resin component and whose elastic modulus at 85° C. after curing is 2 GPa or less, the content of the conductive particle being from 30 to 75% by volume. Furthermore, a method for manufacturing a multilayer printed wiring board using the conductive paste.Type: ApplicationFiled: September 26, 2005Publication date: May 1, 2008Inventors: Yoshio Oka, Hitoshi Takii, Noriki Hayashi
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Patent number: 7276267Abstract: A method making possible the production of an injection molded conductor carrying means composed of a first supporting substrate and a second supporting substrate. The first supporting substrate comprises a basically metallizeable plastic material and the second supporting substrate a basically non-metallizeable plastic material. However the plastic material of the second supporting substrate is able to be activated by a laser beam. The laser activation produces a metallization pattern on it and such pattern is connected with uncovered areas of the first supporting substrate, following which a common treatment takes place which results in an electrical conductor arrangement being produced. The invention furthermore relates to a conductor carrying means produced by the method.Type: GrantFiled: July 11, 2003Date of Patent: October 2, 2007Assignee: Festo AG & Co.Inventor: Stephan Schauz