Immersion Metal Plating From Solution (e.g., Electroless Plating, Etc.) Patents (Class 427/99.5)
  • Patent number: 11562773
    Abstract: Some embodiments include a method of forming a conductive structure. A metal-containing conductive material is formed over a supporting substrate. A surface of the metal-containing conductive material is exposed to at least one radical form of hydrogen and to at least one oxidant. The exposure alters at least a portion of the metal-containing conductive material to thereby form at least a portion of the conductive structure. Some embodiments include a conductive structure which has a metal-containing conductive material with a first region adjacent to a second region. The first region has a greater concentration of one or both of fluorine and boron relative to the second region.
    Type: Grant
    Filed: September 27, 2019
    Date of Patent: January 24, 2023
    Assignee: Micron Technology, Inc.
    Inventors: John D. Hopkins, Jordan D. Greenlee, Peng Xu
  • Patent number: 11062914
    Abstract: Methods for removing a passivation film from a copper surface can include exposing the passivation film to a vapor phase organic reactant, for example at a temperature of 100° C. to 400° C. In some embodiments, the passivation film may have been formed by exposure of the copper surface to benzotriazole, such as can occur during a chemical mechanical planarization process. The methods can be performed as part of a process for integrated circuit fabrication. A second material can be selectively deposited on the cleaned copper surface relative to another surface of the substrate.
    Type: Grant
    Filed: August 7, 2020
    Date of Patent: July 13, 2021
    Assignee: ASM IP Holding B.V.
    Inventors: Antti Juhani Niskanen, Jaakko Anttila
  • Patent number: 10990144
    Abstract: A system may include a tank configured to hold a dielectric liquid, a rack located within the tank and having a plurality of bays, each bay configured to receive a corresponding device, an air pump configured to drive an air flow, at least one variable-buoyancy chamber mechanically coupled to at least one of the tank and the rack, each of the at least one variable-buoyancy chamber comprising a fluidically-sealed plenum and wherein the at least one variable-buoyancy chamber is configured to mechanically couple to a device-in-service, and a control subsystem configured to control a buoyancy of the at least one variable-buoyancy chamber in order to cause movement of the device-in-service relative to the rack.
    Type: Grant
    Filed: November 9, 2018
    Date of Patent: April 27, 2021
    Assignee: Dell Products L.P.
    Inventors: Nan Wang, Austin M. Shelnutt
  • Patent number: 10975475
    Abstract: The present invention provides an electroless gold plating bath having excellent plating bath stability without containing a cyanide compound under long term plating bath heating time. An electroless gold plating bath of the present invention solving above problems includes: a water-soluble gold salt; a reducing agent; and a phosphine compound represented by a following formula (1) wherein R1, R2, and R3 represent identically or differently either a phenyl group, or an alkyl group having 1 to 5 carbons, and at least one of the phenyl group or the alkyl group is substituted by a sulfonate group or its salt, a cyano group, or a carboxy group or its salt.
    Type: Grant
    Filed: March 2, 2020
    Date of Patent: April 13, 2021
    Assignee: C. UYEMURA & CO., LTD.
    Inventors: Yohei Kaneko, Naoshi Nishimura, Tsuyoshi Maeda, Katsuhisa Tanabe
  • Patent number: 10741411
    Abstract: Methods for removing a passivation film from a copper surface can include exposing the passivation film to a vapor phase organic reactant, for example at a temperature of 100° C. to 400° C. In some embodiments, the passivation film may have been formed by exposure of the copper surface to benzotriazole, such as can occur during a chemical mechanical planarization process. The methods can be performed as part of a process for integrated circuit fabrication. A second material can be selectively deposited on the cleaned copper surface relative to another surface of the substrate.
    Type: Grant
    Filed: September 27, 2018
    Date of Patent: August 11, 2020
    Assignee: ASM IP Holding B.V.
    Inventors: Antti Juhani Niskanen, Jaakko Anttila
  • Patent number: 10366919
    Abstract: The present disclosure relates to semiconductor structures and, more particularly, to fully aligned via structures and methods of manufacture. The structure includes: a plurality of minimum ground rule conductive structures formed in a dielectric material each of which comprises a recessed conductive material therein; at least one conductive structure formed in the dielectric material which is wider than the plurality of minimum ground rule conductive structures; an etch stop layer over a surface of the dielectric layer with openings to expose the conductive material of the least one conductive structure and the recessed conductive material of a selected minimum ground rule conductive structure; and an upper conductive material fully aligned with and in direct electrical contact with the at least one conductive structure and the selected minimum ground rule conductive structure, through the openings of the etch stop layer.
    Type: Grant
    Filed: September 20, 2017
    Date of Patent: July 30, 2019
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Nicholas V. Licausi, Xunyuan Zhang
  • Patent number: 10115603
    Abstract: Methods for removing a passivation film from a copper surface can include exposing the passivation film to a vapor phase organic reactant, for example at a temperature of 100° C. to 400° C. In some embodiments, the passivation film may have been formed by exposure of the copper surface to benzotriazole, such as can occur during a chemical mechanical planarization process. The methods can be performed as part of a process for integrated circuit fabrication. A second material can be selectively deposited on the cleaned copper surface relative to another surface of the substrate.
    Type: Grant
    Filed: October 21, 2016
    Date of Patent: October 30, 2018
    Assignee: ASM IP HOLDING B.V.
    Inventors: Antti Juhani Niskanen, Jaakko Anttila
  • Patent number: 10079174
    Abstract: An embodiment contact plug includes a bilayer structure and a diffusion barrier layer on a sidewall and a bottom surface of the bilayer structure. The bilayer structure includes a conductive core and a conductive liner on a sidewall and a bottom surface of the conductive core. In the embodiment contact plug, the conductive liner comprises cobalt or ruthenium.
    Type: Grant
    Filed: June 24, 2014
    Date of Patent: September 18, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Hung Lin, Sheng-Hsuan Lin, Chih-Wei Chang, You-Hua Chou, Chia-Lin Hsu
  • Patent number: 10056328
    Abstract: A method is provided for at least partially filling a feature in a substrate. The method includes providing a substrate containing a feature, depositing a ruthenium (Ru) metal layer to at least partially fill the feature, and heat-treating the substrate to reflow the Ru metal layer in the feature.
    Type: Grant
    Filed: July 17, 2017
    Date of Patent: August 21, 2018
    Assignee: Tokyo Electron Limited
    Inventors: Kai-Hung Yu, Gerrit J. Leusink, Cory Wajda, Tadahiro Ishizaka, Takahiro Hakamata
  • Patent number: 9773649
    Abstract: Provided herein are methods of selectively etching silicon-containing block copolymer (BCP) materials. The methods involve exposing a BCP material that includes at least one silicon-containing block and at least one non-silicon-containing block to a plasma that has a reducing chemistry. The reducing plasma selectively removes the non-silicon-containing block, the silicon-containing block to be used in further processing. In some embodiments, the silicon-containing block is used as an etch mask. The reducing plasma reduces or eliminates profile bowing and undercut of the silicon-containing domains, allowing processing of high aspect ratio features. Examples of reducing chemistries include nitrogen (N2), hydrogen (H2), ammonia (NH3), hydrazine (N2H4), and mixtures thereof. Also provided are apparatuses to perform the methods.
    Type: Grant
    Filed: November 17, 2014
    Date of Patent: September 26, 2017
    Assignee: Lam Research Corporation
    Inventor: Stephen M. Sirard
  • Patent number: 9589892
    Abstract: An interconnect structure and a method of forming an interconnect structure are disclosed. The interconnect structure includes a contact layer over a substrate, a dielectric layer over the contact layer, a silicide layer over the exposed portion of the contact layer, a barrier layer along sidewalls of the opening, an alloy layer over the barrier layer, a glue layer over the alloy layer, and a conductive plug over the glue layer, wherein the dielectric layer has an opening, and the opening exposes a portion of the contact layer.
    Type: Grant
    Filed: May 20, 2016
    Date of Patent: March 7, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Hung Lin, Mei-Hui Fu, Wei-Jung Lin, You-Hua Chou, Chia-Lin Hsu, Hon-Lin Huang, Shih-Chi Lin
  • Patent number: 9385080
    Abstract: An interconnect structure and a method of forming an interconnect structure are disclosed. The interconnect structure includes a contact layer over a substrate; a dielectric layer over the contact layer, wherein the dielectric layer has an opening, the opening exposing a portion of the contact layer; a silicide layer over the exposed portion of the contact layer; a barrier layer along sidewalls of the opening; an alloy layer over the barrier layer; a glue layer over the alloy layer; and a conductive plug over the glue layer.
    Type: Grant
    Filed: August 15, 2014
    Date of Patent: July 5, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Hung Lin, Mei-Hui Fu, Wei-Jung Lin, You-Hua Chou, Chia-Lin Hsu, Hon-Lin Huang, Shih-Chi Lin
  • Patent number: 9136170
    Abstract: A through silicon via structure is located in a recess of a substrate. The through silicon via structure includes a barrier layer, a buffer layer and a conductive layer. The barrier layer covers a surface of the recess. The buffer layer covers the barrier layer. The conductive layer is located on the buffer layer and fills the recess, wherein the contact surface between the conductive layer and the buffer layer is smoother than the contact surface between the buffer layer and the barrier layer. Moreover, a through silicon via process forming said through silicon via structure is also provided.
    Type: Grant
    Filed: May 30, 2012
    Date of Patent: September 15, 2015
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Jia-Jia Chen, Chi-Mao Hsu, Tsun-Min Cheng, Chun-Ling Lin, Huei-Ru Tsai, Ching-Wei Hsu, Chin-Fu Lin, Hsin-Yu Chen
  • Patent number: 8961669
    Abstract: Stable zero-valent metal compositions and methods of making and using these compositions are provided. Such compositions are useful as catalysts for subsequent metallization of non-conductive substrates, and are particularly useful in the manufacture of electronic devices.
    Type: Grant
    Filed: November 26, 2013
    Date of Patent: February 24, 2015
    Assignee: Rohm and Haas Electronic Materials LLC
    Inventors: Feng Liu, Maria Anna Rzeznik
  • Patent number: 8962070
    Abstract: The present invention relates to an electrolyte for the electroless deposition of a metal layer on a substrate, wherein the electrolyte is free of heavy metal stabilizers, cyanides, selenium compounds and sulfur compounds comprising sulfur in an oxidation state between ?2 and +5, and in which instead a ?-amino acid is used as stabilizer. In particular, the inventive electrolyte can comprise 3-aminopropionic acid, 3-aminobutyric acid, 3-amino-4-methylvaleric acid, and 2-aminoethane-sulfonic acid. Furthermore, the invention is directed to a method for the electroless deposition of metal layers utilizing an inventive electrolyte as well as the use of ?-amino acids as stabilizer in electrolytes for the electroless deposition of metal layers in general.
    Type: Grant
    Filed: July 6, 2010
    Date of Patent: February 24, 2015
    Assignee: Enthone Inc.
    Inventors: Franz-Josef Stark, Christoph Werner
  • Patent number: 8911608
    Abstract: The present invention provides a circuit creation technology that improves conductive line manufacture by adding active and elemental palladium onto the surface of a substrate. The palladium is disposed in minute amounts on the surface and does not form a conductive layer by itself, but facilitates subsequent deposition of a metal onto the surface, according to the pattern of the palladium, to form the conductive lines.
    Type: Grant
    Filed: May 13, 2010
    Date of Patent: December 16, 2014
    Assignee: SRI International
    Inventors: Sunity Sharma, Jaspreet Singh Dhau
  • Patent number: 8906446
    Abstract: An apparatus is provided having a closable chamber that can be sealed and is capable of withstanding an increased pressure and high temperature. The chamber has several inlet ports for the supply of various process liquids, such as deposition solutions, DI water for rinsing, etc., and a port for the supply of a gas under pressure. The apparatus also includes a solution heater and a control system for controlling temperature and pressure in the chamber. Uniform deposition is achieved by carrying out the deposition process under pressure and under temperature slightly below the boiling point of the solution. The solution can be supplied from above via a shower head formed in the cover, or through the bottom of the chamber. Rinsing or other auxiliary solutions are supplied via a radially moveable chemical dispensing arm that can be arranged above the substrate parallel thereto.
    Type: Grant
    Filed: February 29, 2012
    Date of Patent: December 9, 2014
    Assignee: Lam Research Corporation
    Inventors: Igor C. Ivanov, Jonathan Weiguo Zhang, Artur Kolics
  • Publication number: 20140332259
    Abstract: A wiring substrate includes an electrode including Cu or a Cu alloy, and a plated film including an electroless nickel-plated layer formed on the electrode and an electroless gold-plated layer formed on the electroless nickel-plated layer. The electroless nickel-plated layer is formed by co-precipitation of Ni, P, Bi, and S, the electroless nickel-plated layer includes a content of P of 5% by mass or more and less than 10% by mass, a content of Bi of 1 ppm by mass to 1,000 ppm by mass, and a content of S of 1 ppm by mass to 2,000 ppm by mass, and a mass ratio of the content of S to the content of Bi (S/Bi) is more than 1.0.
    Type: Application
    Filed: July 28, 2014
    Publication date: November 13, 2014
    Applicants: TOPPAN PRINTING CO., LTD., NATIONAL UNIVERSITY CORPORATION GUNMA UNIVERSITY
    Inventors: Tetsuyuki TSUCHIDA, Toshikazu OKUBO, Ikuo SHOHJI, Takahiro KANO
  • Publication number: 20140262470
    Abstract: A method includes forming a plurality of metal posts. The plurality of metal posts is interconnected to form a metal-post row by weak portions between neighboring ones of the plurality of metal posts. The weak portions include a same metal as the plurality of metal posts. A majority of each of the plurality of metal posts is separated from respective neighboring ones of the plurality of metal posts. An end portion of each of the plurality of metal posts is plated with a metal. The plurality of metal posts is disposed into a metal post-storage. The method further includes retrieving one of the metal posts from a metal-post storage, and bonding the one of the metal posts on a metal pad.
    Type: Application
    Filed: June 25, 2013
    Publication date: September 18, 2014
    Inventors: Yi-Li Hsiao, Su-Chun Yang, Chih-Hang Tung, Da-Yuan Shih, Chen-Hua Yu
  • Patent number: 8834958
    Abstract: A process of electroless plating a tin or tin-alloy active material onto a metal substrate for the negative electrode of a rechargeable lithium battery comprising steps of (1) immersing the metal substrate in an aqueous plating solution containing metal ions to be plated, (2) plating tin or tin-alloy active material onto the metal substrate by contacting the metal substrate with a reducing metal by swiping one on the other, and (3) removing the plated metal substrate from the plating bath and rinsing with deionized water. A rechargeable lithium battery using tin or tin-alloy as the anode active material.
    Type: Grant
    Filed: July 8, 2011
    Date of Patent: September 16, 2014
    Assignee: The United States of America as represented by the Secretary of the Army
    Inventor: Shengshui Zhang
  • Publication number: 20140242264
    Abstract: The invention relates to an electroless aqueous copper plating solution, comprising a source of copper ions, a source of glyoxylic acid as reducing agent, and at least one polyamino disuccinic acid or at least one polyamino monosuccinic acid, or a mixture of at least one polyamino disuccinic acid and at least one polyamino monosuccinic acid as complexing agent, as well as to a method for electroless copper plating utilizing said solution and the use of the solution for the plating of substrates.
    Type: Application
    Filed: October 1, 2012
    Publication date: August 28, 2014
    Applicant: ATOTECH DEUTSCHLAND GMBH
    Inventors: Edith Stenhäuser, Sandra Röseler, Stefanie Wiese, Tang Cam Lai Nguyen, Lutz Stamp
  • Publication number: 20140242265
    Abstract: The present invention concerns an aqueous plating bath composition for electroless deposition of palladium and/or palladium alloys and a method which utilises such aqueous plating bath compositions. The aqueous plating bath comprises a source of palladium ions, a reducing agent, a nitrogenated complexing agent which is free of phosphorous and at least one organic stabilising agent comprising 1 to 5 phosphonate residues. The aqueous plating bath and the method are particularly useful if the aqueous plating bath comprises copper ions.
    Type: Application
    Filed: August 22, 2012
    Publication date: August 28, 2014
    Applicant: ATOTECH DEUTSCHLAND GMBH
    Inventors: Isabel-Roda Hirsekorn, Jens Wegricht, Arnd Kilian
  • Patent number: 8815334
    Abstract: The invention relates to an adhesion assisting agent-bearing metal foil comprising a layer of an adhesion assisting agent containing an epoxy resin as an indispensable component on a metal, wherein the adhesion assisting agent layer has a thickness of 0.1 to 10 ?m. The invention also relates to a printed wiring board being a multilayer wiring board having a plurality of layers, wherein an adhesion assisting agent layer is formed between insulating layers.
    Type: Grant
    Filed: February 9, 2009
    Date of Patent: August 26, 2014
    Assignee: Hitachi Chemical Co., Ltd.
    Inventors: Kenji Takai, Norio Moriike, Kenichi Kamiyama, Takako Watanabe, Shin Takanezawa, Koji Morita, Katsuyuki Masuda, Kiyoshi Hasegawa
  • Patent number: 8784638
    Abstract: A resin board that consists of at least one of a mixture of a plurality of types of resins having different degrees of susceptibility to erosion by an ozone solution, and a resin having, in a molecule, a plurality of types of components having different degrees of susceptibility to erosion by the ozone solution is treated with ozone water to form a reformed layer, and a catalyst metal is adsorbed by the reformed layer so as to form a resin-metal composite layer, on which a plating process is performed. In the resin board, a component or components that is/are likely to be eroded on by the ozone solution dissolves into the ozone solution, and pores or clearances on the order of nanometers are formed between the component(s) and a component or components that is/are less likely to be eroded by the ozone solution. With the plating deposited in the pores or clearances, the adhesion strength is improved due to an anchoring effect.
    Type: Grant
    Filed: October 18, 2012
    Date of Patent: July 22, 2014
    Assignee: Toyota Jidosha Kabushiki Kaisha
    Inventors: Takeshi Bessho, Kyoko Kumagai, Takashi Yoshida, Manabu Osamura, Toshihisa Shimo
  • Patent number: 8784931
    Abstract: A method of manufacturing ULSI wiring in which wiring layers are separately formed via a diffusion prevention layer and an insulating interlayer portion made of SiO2. The method comprises the steps of treating, with a silane compound, a SiO2 surface of the insulating interlayer portion on which the diffusion layer is to be formed, performing catalyzation with an aqueous solution containing a palladium compound, forming the diffusion prevention layer by electroless plating, and then forming the wiring layer on this diffusion prevention layer. A capping layer may be formed on the wiring layer by electroless plating. Consequently, a diffusion prevention layer having good adhesive properties can be formed through a simple wet process, and, the wiring layer can directly be formed on this diffusion prevention layer by a wet process. The capping layer can also be directly formed on the wiring layer by electroless plating.
    Type: Grant
    Filed: September 23, 2009
    Date of Patent: July 22, 2014
    Assignees: Waseda University, Renesas Electronics Corporation
    Inventors: Kazuyoshi Ueno, Tetsuya Osaka, Nao Takano
  • Publication number: 20140191418
    Abstract: The present invention provides a stabilized fine textured metal microstructure that constitutes a durable activated surface usable for bonding a 3D stacked chip. A fine-grain layer that resists self anneal enables metal to metal bonding at moderate time and temperature and wider process flexibility.
    Type: Application
    Filed: January 9, 2013
    Publication date: July 10, 2014
    Applicant: International Business Machines Corporation
    Inventors: Tien-Jen Cheng, Mukta G. Farooq, John A. Fitzsimmons
  • Publication number: 20140178572
    Abstract: The copper electroless baths are formaldehyde free and are environmentally friendly. The electroless copper baths include one or more sulfinate compounds as reducing agents to replace formaldehyde. The electroless baths are stable and deposit a bright copper on substrates.
    Type: Application
    Filed: February 17, 2013
    Publication date: June 26, 2014
    Applicant: ROHM AND HAAS ELECTRONIC MATERIALS LLC
    Inventors: Andy Lok-Fung CHOW, Dennis Kwok-Wai YEE, Crystal P. L. LI
  • Patent number: 8703232
    Abstract: The present disclosure describes an article and a method of forming a microstructure. The method includes providing a substrate having a structured surface region comprising one or more recessed features with recessed surfaces. The structured surface region is substantially free of plateaus. The method includes disposing a fluid composition comprising a functional material and a liquid onto the structured surface region. The method includes evaporating liquid from the fluid composition. The functional material collects on the recessed surfaces such that a remainder of the structured surface region is substantially free of the functional material.
    Type: Grant
    Filed: June 25, 2009
    Date of Patent: April 22, 2014
    Assignee: 3M Innovative Properties Company
    Inventors: Matthew S. Stay, Mikhail L. Pekurovsky, Cristin E. Moran, Matthew H. Frey
  • Publication number: 20140099433
    Abstract: The present invention relates to a basket jig for an electroless plating apparatus and an electroless plating method. A basket jig for an electroless plating apparatus in accordance with the present invention includes a basket loaded thereon a plurality of printed circuit boards, a rotating structure coupled to top portions of both sides of the basket and a tube in a shape of a rectangular plate coupled to bottom portions of the basket.
    Type: Application
    Filed: March 14, 2013
    Publication date: April 10, 2014
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Hyo Seung NAM, Chang Sup Ryu
  • Patent number: 8679591
    Abstract: An embodiment is a method for forming a semiconductor assembly including cleaning a connector including copper formed on a substrate, applying cold tin to the connector, applying hot tin to the connector, and spin rinsing and drying the connector.
    Type: Grant
    Filed: September 27, 2010
    Date of Patent: March 25, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien Ling Hwang, Yi-Li Hsiao, Chung-Shi Liu
  • Publication number: 20130344235
    Abstract: This invention discloses compositions and methods that afford sustainable deposition of electroless copper coatings, using aqueous hypophosphite compositions as opposed to formaldehyde (FA) The invention thus obviates the use of nefarious FA, a suspected carcinogen, presently the predominant reducer for plating electroless copper. The patent enables to plate “heavy” copper thicknesses currently unobtainable by the prior art teachings of electroless copper processes, that are based on hypophosphite reducers. The process and compositions of this patent are especially attractive for horizontal plating machines, currently using (FA) compositios. It is also beneficial for plating electroless copper on aluminum or zinc diecastings The patent further envisions electroless plating of silver in a cyanide-free composition.
    Type: Application
    Filed: June 9, 2013
    Publication date: December 26, 2013
    Inventor: John J. Grunwald
  • Patent number: 8591985
    Abstract: A method is provided which includes dispensing a deposition solution at a plurality of locations extending different distances from a center of a microelectronic topography each at different moments in time during an electroless plating process. An electroless plating apparatus used for the method includes a substrate holder, a moveable dispense arm, and a storage medium comprising program instructions executable by a processor for positioning the moveable dispense arm. Another method and accompanying electroless deposition chamber are configured to introduce a gas into an electroless plating chamber above a plate which is suspended above a microelectronic topography and distribute the gas to regions extending above one or more discrete portions of the microelectronic topography.
    Type: Grant
    Filed: July 19, 2010
    Date of Patent: November 26, 2013
    Assignee: Lam Research Corporation
    Inventor: Igor C. Ivanov
  • Publication number: 20130270216
    Abstract: A method of thin printed circuit board wet process consistency on the same carrier, and more particularly to a printed circuit board in the developing, copper plating, stripping, etching and other wet processes uses the same frame as a carrier from the beginning to the end of the wet process, such that the thin printed circuit board is conducted a continuous and automatic wet process to avoid disassembly, storage and transportation between each process. Moreover, when using the flame, the thin printed circuit board is smooth and flattening in the wet process for avoiding “water effect,” the effective area is not exposed to any mechanical members for preventing scratches, and there are point contacts between the thin printed circuit board and the frame for preventing chemical residue. Accordingly, the present invention can not only enhance the yield of the thin printed circuit board but also shorten the production time.
    Type: Application
    Filed: April 17, 2012
    Publication date: October 17, 2013
    Applicant: KINSUS INTERCONNECT TECHNOLOGY CORP.
    Inventor: CHENG-HSIUNG YANG
  • Patent number: 8555806
    Abstract: An apparatus for making an electrode of a dye-sensitized solar cell, includes a dye container, a number of nozzles, a roller and a number of holders. The dye container has a chamber for receiving a dye material, and the chamber has a top wall and a number of through holes formed through the top wall. The nozzles each have an opening facing toward a substrate to be formed into the electrode and configured for jetting a working material to the substrate. The roller rolls the working material on the substrate. The holders are rotatably mounted on the top wall and each hold a corresponding substrate to first receive the working material and then to be submerged into the dye material through one of the through holes of the dye container by rotation, thereby obtaining the electrode of a dye-sensitized solar cell.
    Type: Grant
    Filed: August 11, 2011
    Date of Patent: October 15, 2013
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventor: Shao-Kai Pei
  • Patent number: 8551560
    Abstract: Methods for improving selective deposition of a capping layer on a patterned substrate are presented, the method including: receiving the patterned substrate, the patterned substrate including a conductive region and a dielectric region; forming a molecular masking layer (MML) on the dielectric region; preparing an electroless (ELESS) plating bath, where the ELESS plating bath includes: a cobalt (Co) ion source: a complexing agent: a buffer: a tungsten (W) ion source: and a reducing agent; and reacting the patterned substrate with the ELESS plating bath for an ELESS period at an ELESS temperature and an ELESS pH so that the capping layer is selectively formed on the conductive region. In some embodiments, methods further include a pH adjuster for adjusting the ELESS pH to a range of approximately 9.0 pH to 9.2 pH. In some embodiments, the pH adjuster is tetramethylammonium hydroxide (TMAH). In some embodiments, the MML is hydrophilic.
    Type: Grant
    Filed: May 22, 2009
    Date of Patent: October 8, 2013
    Assignee: Intermolecular, Inc.
    Inventors: Jinhong Tong, Zhi-Wen Sun, Chi-I Lang, Nitin Kumar, Bob Kong, Zachary Fresco
  • Patent number: 8524329
    Abstract: A method for providing electroless plating is provided. An amorphous carbon barrier layer is formed over the low-k dielectric layer by providing a flow a deposition gas, comprising a hydrocarbon, H2, and an oxygen free diluent, forming a plasma from the deposition gas, and stopping the flow of the deposition gas. The amorphous carbon barrier layer is conditioned by providing a flow of a conditioning gas comprising H2 and a diluent, forming a plasma from the conditioning gas, which conditions a top surface of the amorphous carbon barrier layer, and stopping the flow of the conditioning gas. The amorphous carbon barrier layer is functionalized by providing a flow of a functionalizing gas comprising NH3 or H2 and N2, forming a plasma from the functionalizing gas, and stopping the flow of the functionalizing gas. An electroless process is provided to form an electrode over the barrier layer.
    Type: Grant
    Filed: December 13, 2011
    Date of Patent: September 3, 2013
    Assignee: Lam Research Corporation
    Inventors: Yezdi N. Dordi, Richard P. Janek, Dries Dictus
  • Patent number: 8524629
    Abstract: Presented are one or more aspects and/or one or more embodiments of catalysts, methods of preparation of catalyst, methods of deoxygenation, and methods of fuel production.
    Type: Grant
    Filed: December 16, 2011
    Date of Patent: September 3, 2013
    Assignee: Energia Technologies, Inc.
    Inventors: Thien Duyen Thi Nguyen, Krishniah Parimi
  • Patent number: 8507400
    Abstract: Presented are one or more aspects and/or one or more embodiments of catalysts, methods of preparation of catalyst, methods of deoxygenation, and methods of fuel production.
    Type: Grant
    Filed: March 1, 2012
    Date of Patent: August 13, 2013
    Assignee: Energia Technologies, Inc.
    Inventors: Thien Duyen Thi Nguyen, Krishniah Parimi
  • Patent number: 8499446
    Abstract: A method of manufacturing a multilayer printed wiring board includes forming a first interlaminar resin insulating layer, a first conductor circuit on the first interlaminar resin insulating layer, a second interlaminar resin insulating layer, opening portions in the second interlaminar resin insulating layer to expose a face of the first conductor circuit, an electroless plating film on the second interlaminar resin insulating layer and the exposed face, and a plating resist on the electroless plating film. The method further includes substituting the electroless plating film with a thin film conductor layer, having a lower ion tendency than the electroless plating film, and a metal of the exposed face, forming an electroplating film including the metal on a portion of the electroless plating film and the thin film conductor layer, stripping the plating resist, and removing the electroless plating film exposed by the stripping.
    Type: Grant
    Filed: July 20, 2011
    Date of Patent: August 6, 2013
    Assignee: Ibiden Co., Ltd.
    Inventors: Toru Nakai, Sho Akai
  • Patent number: 8475867
    Abstract: A method for forming electrical traces on a substrate includes the steps of: providing a substrate; printing an ink pattern using an ink on the substrate, the ink including a aqueous medium containing silver ions and a heat sensitive reducing agent; heating the ink pattern to reduce silver ions into silver particles thereby forming an semi-finished traces; and forming a metal overcoat on the semi-finished traces by electroless plating thereby obtaining patterned electrical traces.
    Type: Grant
    Filed: September 30, 2009
    Date of Patent: July 2, 2013
    Assignees: FuKui Precision Component (Shenzhen) Co., Ltd., Zhen Ding Technology Co., Ltd.
    Inventors: Yao-Wen Bai, Cheng-Hsien Lin
  • Patent number: 8409656
    Abstract: A method of manufacturing a coated needle electrode comprising the steps 5 of holding an uncoated sharpened needle by the tip, dipping the uncoated sharpened needle into a bath of coating material, and withdrawing the sharpened needle from the bath of coating material. In this way, the coating can be applied after the needle has been sharpened thereby allowing more precision during the sharpening process. The invention also provides an apparatus for use with the method.
    Type: Grant
    Filed: April 25, 2008
    Date of Patent: April 2, 2013
    Assignee: AMBU A/S
    Inventors: Lasse Bay, Marc Skov Hansen, Brian Nielsen
  • Patent number: 8349393
    Abstract: Compositions and methods for silver plating onto metal surfaces such as PWBs in electronics manufacture to produce a silver plating which is greater than 80 atomic % silver, tarnish resistant, and has good solderability.
    Type: Grant
    Filed: July 29, 2004
    Date of Patent: January 8, 2013
    Assignee: Enthone Inc.
    Inventors: Yung-Herng Yau, Thomas B. Richardson, Joseph A. Abys, Karl F. Wengenroth, Anthony Fiore, Chen Xu, Chonglun Fan, John Fudala
  • Publication number: 20130003332
    Abstract: Disclosed herein are an electroless surface treatment plated layer of a printed circuit board, a method for preparing the same, and printed circuit board including the same. The electroless surface treatment plated layer includes: electroless nickel (Ni) plated coating/palladium (Pd) plated coating/gold (Au) plated coating, wherein each of the electroless nickel, palladium, and gold plated coatings has a thickness of 0.02 to 1 ?m, 0.01 to 0.3 ?m, and 0.01 to 0.5 ?m. In the electroless surface treatment plated layer of the printed circuit board, a thickness of the nickel plated coating is specially minimized to 0.02 to 1 ?m, thereby making it possible to form an optimized electroless Ni/Pd/Au surface treatment plated layer.
    Type: Application
    Filed: June 25, 2012
    Publication date: January 3, 2013
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Dong Jun Lee, Dong Ju Jeon, Jung Youn Pang, Seong Min Cho, Chi Seong Kim
  • Patent number: 8339031
    Abstract: A substrate for an organic light-emitting device, especially a transparent glass substrate, which includes, on a first main face, a bottom electrode film, the electrode film being formed from a thin-film multilayer coating comprising, in succession, at least: a contact layer based on a metal oxide and/or a metal nitride; a metallic functional layer having an intrinsic electrical conductivity property; an overlayer based on the metal oxide and/or a metal nitride, especially for matching the work function of said electrode film, said substrate including a base layer, said base layer covering said main face.
    Type: Grant
    Filed: September 5, 2007
    Date of Patent: December 25, 2012
    Assignee: Saint-Gobain Glass France
    Inventors: Svetoslav Tchakarov, Hadia Gerardin, Pascal Reutler, Didier Jousse, Eric Mattmann, Pascal Nael
  • Publication number: 20120305300
    Abstract: A method for manufacturing an electrical contact pad, including a pad mounting and at least one contact layer, and a method for manufacturing an electrical contact, including a contact mounting and at least one contact layer are described. The methods include a step of depositing, via cold gas dynamic spraying, a first powder onto the pad or contact mounting so as to form the contact layer, the first powder containing at least particles including grains made of at least one refractive material, the grains being built into a matrix made of conductive metal selected from among silver or copper. The pads and the electrical contacts obtained in the respective manufacturing methods are also described.
    Type: Application
    Filed: December 16, 2010
    Publication date: December 6, 2012
    Applicant: METALOR TECHNOLOGIES INTERNATIONAL SA
    Inventors: Christine Bourda, Gilles Rolland, Michel Jeandin
  • Patent number: 8323739
    Abstract: A method for forming a metal pattern on a substrate via printing and electroless plating is disclosed, which includes printing a pattern on the substrate with an ink composition, drying the printed pattern, and contacting the dried pattern with an electroless plating solution. The ink composition either contains components (i), (ii) and (iii), components (i) and (iv), or components (i) and (v), which are dissolved or dispersed in a solvent, wherein (i) is a binder; (ii) is a sulfate terminated polymer of an ethylenically unsaturated monomer; (iii) is a catalytic metal precursor; (iv) is a polymer of an ethylenically unsaturated monomer deposited with particles of catalytic metal; and (v) is a copolymer of an ethylenically unsaturated monomer and a hydrophilic monomer deposited with particles of catalytic metal. The binder (i) is a water swellable resin. The catalytic metal may be Au, Ag, Pd, Pt or Ru.
    Type: Grant
    Filed: November 8, 2007
    Date of Patent: December 4, 2012
    Assignee: National Defense University
    Inventors: Yuh Sung, Ming-Der Ger, Chang-Ping Chang, Chun-Chieh Tseng, Wen-Ding Chen
  • Patent number: 8318254
    Abstract: A copolymer deposited with particles of catalytic metal is disclosed in the present invention, which is formed from an ethylenically unsaturated monomer and a hydrophilic monomer, and the catalytic metal is Au, Ag, Pd, Pt or Ru. The copolymer is hydrophilic when the temperature is lower than a specific temperature, and will become hydrophobic when the temperature is greater than the specific temperature. The present invention also discloses a method for forming a metal layer on a substrate via electroless plating, which includes contacting the substrate with an ink composition, drying the ink composition on the substrate, and contacting the dried ink composition with an electroless plating solution, wherein the ink composition contains the copolymer of the present invention in an aqueous phase. The present invention further discloses a method for forming metal conductors in through holes of a substrate.
    Type: Grant
    Filed: October 30, 2008
    Date of Patent: November 27, 2012
    Assignee: National Defense University
    Inventors: Yuh Sung, Ming-Der Ger, Chang-Ping Chang, Chun-Chieh Tseng, Wen-Ding Chen
  • Patent number: 8309164
    Abstract: A metallized substrate having, disposed in the order mentioned: a ceramics substrate; a high-melting point metal layer; a base nickel plating layer; a layered nickel-phosphorous plating layer; a diffusion-inhibiting plating layer; and a gold plating layer. The base nickel plating layer being any one of a nickel plating layer, a nickel-boron plating layer, or a nickel-cobalt plating layer. The diffusion-inhibiting plating layer being any one of a columnar nickel-phosphorous plating layer, a palladium-phosphorous plating layer, or a palladium plating layer. According to the above composition, even after heating the semiconductor chips in a mounted state, the metallized substrate can make the connection strength of wire bonding favorable.
    Type: Grant
    Filed: June 10, 2008
    Date of Patent: November 13, 2012
    Assignee: Tokuyama Corporation
    Inventors: Tetsuo Imai, Osamu Yatabe, Masakatsu Maeda
  • Patent number: 8277668
    Abstract: A method of forming printed circuit boards and packaging substrates. After blind vias are created in a dielectric layer, a first seed layer is provided in the vias and on the dielectric layer. Copper is applied to fill the vias and to form a copper layer over the vias and over the first seed layer. The first seed layer and the copper layer are removed and a second seed layer is formed on the dielectric layer and the exposed surfaces of the vias. A wire pattern is then formed using a photo-sensitive thin film applied to the second seed layer, and the wires in the wire pattern are thickened. The photo-sensitive thin film and the exposed portions of the second seed layer are removed to form a first conductive pattern of wires. The process may be repeated to form a second conductive pattern of wires on the first pattern.
    Type: Grant
    Filed: March 25, 2008
    Date of Patent: October 2, 2012
    Assignee: Shanghai Meadville Science & Technology Co., Ltd.
    Inventors: FanXiong Cheng, Peifeng Chen, Haitao Fu, Yonghong Luo
  • Patent number: RE45297
    Abstract: A method for enhancing the solderability of a metallic surface is disclosed where the metallic surface is plated with an immersion silver plate prior to soldering, which immersion silver plate is treated with an additive selected from the group consisting of fatty amines, fatty amides, quaternary salts, amphateric salts, resinous amines, resinous amides, fatty acids, resinous acids, ethoxylated derivatives of any of the foregoing, and mixtures of any of the foregoing. The immersion silver deposits created are resistant to electromigration.
    Type: Grant
    Filed: February 13, 2012
    Date of Patent: December 23, 2014
    Inventors: Ronald Redline, David Sawoska, Peter Kukanskis, Donald Ferrier, Eric Yakobson