Printed Circuit Patents (Class 428/901)
  • Patent number: 6207265
    Abstract: A water soluble, non-ionic masking agent is used in the manufacture of printed circuit boards. The masking agent masks portions of the circuit board to prevent adhesion of solder, flux and the like. The masking agent includes a water soluble non-ionic binder resin, a cellulosic non-ionic filler, a non-ionic surfactant, at least one non-ionic associative thickener, and deionized water. The masking agent material is readily removed from the circuit board after manufacture and does not render further wash water processing ineffective. The masking agent is non-ionic, and thus does not agglomerate or clump downstream ion-exchange or filtration media.
    Type: Grant
    Filed: September 24, 1999
    Date of Patent: March 27, 2001
    Assignee: Illinois Tool Works Inc.
    Inventors: John W. Holdren, II, Eric Martini
  • Patent number: 6207259
    Abstract: A wiring board comprising an insulating substrate containing at least an organic resin, a plurality of electrically conducting wiring layers formed on the surface and/or inside of said insulting substrate, and via-hole conductors formed in said insulating substrate in order to electrically connect the plurality of electrically conducting wiring layers, wherein said via-hole conductors contain an organic binder as well as a Cu—Sn intermetallic compound as an electrically conducting component. The via-hole conductors formed in the wiring board exhibit a high electric conductivity and a large heat resistance, making it possible to very highly reliably connect the electrically conducting wiring layers together.
    Type: Grant
    Filed: October 28, 1999
    Date of Patent: March 27, 2001
    Assignee: Kyocera Corporation
    Inventors: Yuji Iino, Riichi Sasamori, Katsura Hayashi, Masaaki Hori, Hidenori Shikada, Masaaki Harazono
  • Patent number: 6203891
    Abstract: A method for forming a through-via in a laminated substrate by laser drilling the through-via in a laminated substrate from a top exposed surface of the substrate to a bottom exposed surface of the substrate using a plurality of laser pulses that are trepanned in a first predetermined pattern. Each pulse trepanned in the first predetermined pattern has a first energy density per pulse. Then, the through-via is laser drilled using a plurality of laser pulses that are trepanned in a second predetermined pattern. Each pulse trepanned in the second predetermined pattern has a second energy density per pulse that is greater than the first energy density per pulse. The second predetermined pattern is within the first predetermined pattern.
    Type: Grant
    Filed: February 22, 2000
    Date of Patent: March 20, 2001
    Assignee: W. L. Gore & Associates, Inc.
    Inventor: David B. Noddin
  • Patent number: 6197407
    Abstract: Through holes formed in an electrical insulating substrate having adhesive layers on its both surfaces are filled with a conductor. Then, supporting bases having wiring layers with a predetermined pattern are laminated on both the surfaces of the electrical insulating substrate, which are then heated and pressurized. After that, the supporting bases are removed, thus obtaining a circuit board in which the wiring layers have been embedded in the adhesive layers. The conductor within the through holes are compressed sufficiently, thus forming minute via holes with high reliability.
    Type: Grant
    Filed: May 4, 1999
    Date of Patent: March 6, 2001
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Daizou Andou, Toshio Sugawa, Tadashi Nakamura, Hideki Higashitani, Masahide Tsukamoto
  • Patent number: 6197433
    Abstract: A rolled copper foil for flexible printed circuits contains not more than 10 ppm by weight of oxygen and has a softening-temperature rise index T defined as T=0.60[Bi]+0.55[Pb]+0.60[Sb]+0.64 [Se]+1.36[S]+0.32[As]+0.09[Fe]+0.02[Ni]+0.76[Te]+0.48[Sn]+0.16[Ag]+1.24[P] (each symbol in the brackets representing the concentration in ppm by weight of the element) in the range of 4 to 34. The concentrations of the elements are in the ranges of[Bi]<5, [Pb]<10, [Sb]<5, [Se]<5, [S]<15, [As]<5, [Fe]<20, [Ni]<20, [Te]<5, [Sn]<20, [Ag]<50, and [P]<15 (each symbol in the brackets representing the concentration in ppm by weight of the element).
    Type: Grant
    Filed: January 12, 2000
    Date of Patent: March 6, 2001
    Assignee: Nippon Mining & Metals Co., Ltd.
    Inventor: Takaaki Hatano
  • Patent number: 6197435
    Abstract: An article comprising a metal circuit and/or a heat-radiating metal plate formed on a ceramic substrate, wherein the metal circuit and/or the heat-radiating metal plate comprise either (1) the following first metal-second metal bonded product, wherein the first metal and the second metal are different, or (2) the following first metal-third metal-second metal bonded product, and wherein in (1) and (2), the first metal is bonded to the ceramic substrate; first metal: a metal selected from the group consisting of aluminum (Al), lead (Pb), platinum (Pt) and an alloy containing at least one of these metal components; second metal: a metal selected from the group consisting of copper (Cu), silver (Ag), gold (Au), aluminum (Al) and an alloy containing at least one of these metal components; and third metal: a metal selected from the group consisting of titanium (Ti), nickel (Ni), zirconium (Zr), molybdenum (Mo), tungsten (W) and an alloy containing at least one of these metal components.
    Type: Grant
    Filed: October 20, 1998
    Date of Patent: March 6, 2001
    Assignee: Denki Kagaku Kogyo Kabushiki Kaisha
    Inventors: Yoshihiko Tsujimura, Miyuki Nakamura, Yasuhito Fushii
  • Patent number: 6197425
    Abstract: A multilayer printed circuit board having resinous insulating layers and conductor layers alternately superposed on a circuit board with ample adhesive strength, a method for the production thereof, and a curable resin composition useful for the formation of resinous insulating layers are disclosed. The manufacture of the multilayer printed circuit board is accomplished by applying the curable resin composition to the surface of conductor layer of the circuit board, thermally curing the applied layer thereby forming resinous insulating layer, then boring a through-hole in the circuit board, treating the resinous insulating layer with a coarsening agent thereby imparting undulating coarsened surface thereto, subsequently coating the surface of resinous insulating layer and the inner surface of the through-hole with a conductor layer as by electroless plating, and thereafter forming a prescribed circuit pattern in the conductor layer.
    Type: Grant
    Filed: March 16, 1998
    Date of Patent: March 6, 2001
    Assignee: Taiyo Ink Manufacturing Co., Ltd.
    Inventors: Akio Sekimoto, Shinichi Yamada
  • Patent number: 6194072
    Abstract: An electrochromic unit (1) having an electrochemical cell with at least two electrodes (3, 4) applied to a carrier, an electrolyte (2) located between the electrodes (3, 4) and an electrochromic material (7), such as an electrochromic polymer, applied to one of the electrodes (3), is characterized by a proton exchange membrane (2) as a solid electrolyte and carrier for the bilaterally applied electrodes (3, 4), the electrochromic material (7) being positioned on the side of the electrode (3) carrying it remote from the membrane (2).
    Type: Grant
    Filed: June 3, 1997
    Date of Patent: February 27, 2001
    Assignee: Fraunhofer-Gesellschaft zur Forderung der angewandten Forschung e.V.
    Inventors: Günther Hambitzer, Ulrike Dörflinger, Ingo Stassen, Clemens Schmidt
  • Patent number: 6194053
    Abstract: The present invention relates generally to a new method and apparatus to enable high yielding double sided and/or multipass screening in the manufacture of multilayer ceramic packages. Also, the present invention enables the screened features to be buried partially or fully with flat surface being available for high yielding post-sinter operations.
    Type: Grant
    Filed: February 26, 1998
    Date of Patent: February 27, 2001
    Assignee: International Business Machines Corporation
    Inventors: Govindarajan Natarajan, Edward James Pega
  • Patent number: 6190759
    Abstract: A composition for use in making high optical contrast and UV light fluorescing dielectric material usuable in printed circuit boards, which in turn may form part of an electronic package. The composition comprises a resin, a coloring agent, and a fluorescing agent. A dielectric material is also defined that comprises a reinforcing material combined with the composition, the dielectric material forming at least one layer in combination with at least one conductive layer for the electronic package.
    Type: Grant
    Filed: February 18, 1998
    Date of Patent: February 20, 2001
    Assignee: International Business Machines Corporation
    Inventors: Gary A. Johansson, Konstantinos I. Papathomas
  • Patent number: 6187417
    Abstract: A dielectric for use in making high optical contrast and UV light fluorescing substrates usable in printed circuit boards, which in turn may form part of an electronic package. The dielectric comprises a resin, a coloring agent, and a fluorescing agent and does not include a reinforcing material. The substrate also includes a first conductive layer on the dielectric layer.
    Type: Grant
    Filed: December 9, 1999
    Date of Patent: February 13, 2001
    Assignee: International Business Machines Corporation
    Inventors: Donald S. Farquhar, Konstantinos I. Papathomas
  • Patent number: 6187886
    Abstract: In accordance with the present invention, there are provided novel hydrophobic compositions comprising a defined hydrophobic maleimide moiety and optionally, a hydrophobic cyanate ester moiety. Invention compositions have excellent moisture resistance (and, hence are much less prone to give rise to “popcorning”), excellent handling properties (i.e., generally existing as a fluid material which does not require the addition of solvent to facilitate the use thereof), and excellent performance properties (e.g., good dielectric properties).
    Type: Grant
    Filed: June 29, 1998
    Date of Patent: February 13, 2001
    Assignee: Dexter Corporation
    Inventors: Frank D. Husson, Jr., Benjamin Neff, Stephen M. Dershem
  • Patent number: 6188027
    Abstract: An electronic structure, and associated method of formation, in which a plated metallic layer such as a copper layer, of a plated through hole (PTH) is adhesively coupled to holefill material distributed within the PTH. The holefill material includes a resin such as an epoxy and optionally includes a particulate component such as a copper powder. The adhesive coupling is accomplished by forming an adhesion promoter film on the plated metallic layer such that the adhesion promoter film is bonded to the resin. The adhesion promoter film may include a metallic oxide layer such as layer containing cupric oxide and cuprous oxide, which could be formed from bathing the PTH in a solution of sodium chlorite. Application of a reducing solution of dimethylamine borane to the cuprous oxide layer would convert some of the cuprous oxide to cupric oxide in the metallic oxide layer.
    Type: Grant
    Filed: June 30, 1999
    Date of Patent: February 13, 2001
    Assignee: International Business Machines Corporation
    Inventors: Thomas R. Miller, Kristen A. Stauffer, Michael Wozniak
  • Patent number: 6183880
    Abstract: This invention provides a composite foil comprising an aluminum carrier layer and an ultra-thin copper foil having a protective layer disposed between them comprising a porous copper layer and an interpenetrating zinc layer. A process for producing such composite foils comprises the steps of preparing the surface of the aluminum carrier, electrodepositing a porous copper layer on the aluminum carrier layer followed by electrodepositing a zinc layer, and then electrodepositing two layers of copper to form the ultra-thin copper foil. The composite foil provides a uniform bond strength between the aluminum carrier and the protective layer which is adequate to prevent separation of the carrier and ultra-thin copper foil during handling and lamination, but which is significantly lower than the peel strength of a copper/substrate bond, so that the carrier can easily be removed after lamination of the composite foil to an insulating substrate.
    Type: Grant
    Filed: August 7, 1998
    Date of Patent: February 6, 2001
    Assignee: Mitsui Mining & Smelting Co., Ltd.
    Inventors: Junshi Yoshioka, Shinichi Obata, Makoto Dobashi, Takashi Kataoka
  • Patent number: 6180261
    Abstract: A low thermal expansion circuit board 1 on which a semiconductor element can be mounted with ease and high reliability, which comprises an insulating layer 3 having an Ni—Fe-based alloy foil or a titanium foil as a core, a wiring conductor 4 on both sides thereof, and an adhesive resin layer 5 on the side on which a semiconductor element is to be mounted.
    Type: Grant
    Filed: October 5, 1998
    Date of Patent: January 30, 2001
    Assignee: Nitto Denko Corporation
    Inventors: Yasushi Inoue, Masakazu Sugimoto, Amane Mochizuki
  • Patent number: 6180215
    Abstract: Disclosed is a multilayer (e.g., 4-layer) printed circuit board and method of manufacture thereof. The multilayer printed circuit board has at least one inner substrate (inner core) that includes a phenolic resin (e.g., a phenolic resin-laminated paper). Outer insulating layers of the multilayer printed circuit board can have a low dielectric constant (e.g., 3.8-4.4) and a high Tg (e.g., 180°-200° C.). The multilayer printed circuit board can be provided by steps including forming electrical circuit patterns from a copper foil on the inner substrate, to form a printed circuit board, forming a stack of at least one printed circuit board and outer copper foil layers, with insulating layers of, e.g., a semi-cured resin (e.g., prepreg layers) interposed between adjacent conductive metal layers, and then laminating the stack.
    Type: Grant
    Filed: July 14, 1999
    Date of Patent: January 30, 2001
    Assignee: Intel Corporation
    Inventors: John T. Sprietsma, James V. Noval
  • Patent number: 6180187
    Abstract: A method is disclosed for preparing an electronic assembly using a reworkable underfill encapsulant in which the encapsulant is cured in situ from a curable composition comprising one or more mono-functional maleimide compounds, or one or more mono-functional vinyl compounds other than maleimide compounds, or a combination of maleimide and vinyl compounds, a curing initiator and optionally, one or more fillers or adhesion promoters.
    Type: Grant
    Filed: December 22, 1999
    Date of Patent: January 30, 2001
    Assignee: National Starch and Chemical Investment Holding Corporation
    Inventors: Bodan Ma, Quinn K. Tong, Chaodong Xiao
  • Patent number: 6178093
    Abstract: An information handling system is provided which comprises: a metal enclosure; at least one circuit assembly positioned within said metal enclosure, said circuit assembly including a circuitized substrate having at least one dielectric interior layer including a first surface and at least one hole therein; means for providing electrical power to said circuitized substrate within said metal enclosure; a filler material, wherein said filler material substantially fills said at least one hole within said at least one dielectric interior layer; a first wiring layer positioned on said first surface of said at least one dielectric interior layer, wherein said first wiring layer substantially covers said at least one hole having said filler material therein, said first wiring layer assisting in retaining said filler material within said at least one hole in said at least one dielectric interior layer; a first dielectric photoresist layer positioned on said first wiring layer and on said first surface of said at lea
    Type: Grant
    Filed: March 3, 1998
    Date of Patent: January 23, 2001
    Assignee: International Business Machines Corporation
    Inventors: Anilkumar Chinuprasad Bhatt, Donald Herman Glatzel, Allen F. Moring, Voya Rista Markovich, Kostas Papathomas, David John Russell
  • Patent number: 6174606
    Abstract: A conductive composite is described containing silver particles and a polymer which covers each silver particle and wherein a heterocyclic organic compound containing nitrogen such as benzotriazole (BTA) is present to reduce Ag dissolution and ion mobility by forming a water insoluble complex with the Ag ion. The invention overcomes the problem of silver dissolution or corrosion a conductive composite as a result of normal high Ag ion mobility in the presence of moisture and an electric field.
    Type: Grant
    Filed: November 24, 1997
    Date of Patent: January 16, 2001
    Assignee: International Business Machine Corporation
    Inventors: Vlasta Agnes Brusic, Judith Marie Roldan, Ravi F. Saraf
  • Patent number: 6174591
    Abstract: Separators with direct heating medium and method for manufacturing thermally curable laminates thereof. Metal separators used in a book to separate board from board after lamination are engineered to incorporate a thin metal layer or multiple circuits as an electrical heating medium. The electrically heatable separators can then heat the boards directly in contact with individual boards, so that the temperature differences among the boards in a book as well as in an individual board are minimized. This reduction of the difference in temperature minimizes the characteristic difference in chemorheology of the thermally curable bonding sheets. Laminates manufactured by this process exhibit low levels of variation in physical properties, making it suitable for printed circuit board of high density integration.
    Type: Grant
    Filed: April 29, 1999
    Date of Patent: January 16, 2001
    Assignees: Anico Industrial Corporation, CSS International Corporation
    Inventors: Myung Chul Chu, Chang Kyu Choi
  • Patent number: 6174589
    Abstract: A printed circuit board includes insulating layers formed by impregnating a base material with a resin and a metal foil pattern formed on a desired layer of the insulating layers. Ions for forming a hardly soluble metal salt by combining with metal ions free from a portion of the board or a sulfur-containing compound for reacting with the metal ion are present in the insulating layer or on a surface of the metal foil pattern. Furthermore, a method for producing the printed circuit board includes any one of the steps of adding the ions or the sulfur-containing compound to the resin varnish, impregnating a base material with the solution of the ions or the sulfur-containing compound, or applying the solution onto the surface of the metal foil pattern, in order to allow the ions or the sulfur-containing compound to exist in the printed circuit board.
    Type: Grant
    Filed: September 23, 1998
    Date of Patent: January 16, 2001
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yoshihiro Kawakita, Seiichi Nakatani, Masakazu Tanahashi
  • Patent number: 6168855
    Abstract: A polyolefin composite for a printed circuit board or antenna base material, a base material including the composite and electronic modules including the base material. The base material includes at least one dielectric layer including a polyolefin composite and at least one electroconductive layer including an electroconductive material, the dielectric and electroconductive layers being intimately bonded to one another.
    Type: Grant
    Filed: October 15, 1999
    Date of Patent: January 2, 2001
    Assignee: Polyeitan Composites Ltd.
    Inventors: Yachin Cohen, Dmitry Rein, Lev Vaykhansky
  • Patent number: 6168854
    Abstract: A method of manufacturing a printed circuit board comprising a high density conductive pattern comprising at least one pad suitable for forming a solder connection with at least one surface mounted component. The method comprises the steps of forming the pattern; and forming a protective coating on the pattern suitable for soldering without solder resist adjacent the pad. The pad can adjoin land surrounding via hole, thereby increasing density of the circuit board layout. A further process for manufacturing printed circuits applies an etch resist to a conductive pattern, etches the pattern and uses the etch resist to form a protective coating on the pattern. The etch resist may be heated to cause the etch resist to form an alloy.
    Type: Grant
    Filed: June 23, 1999
    Date of Patent: January 2, 2001
    Assignee: Nortel Networks Limited
    Inventor: Frank Robert Gibbs
  • Patent number: 6163957
    Abstract: Multilayer circuit lamination methods and circuit layer structures are disclosed which enable one to manufacture high-density multichip module boards and the like at lower cost, with higher yield, with higher signal densities, and with fewer processing steps.
    Type: Grant
    Filed: November 13, 1998
    Date of Patent: December 26, 2000
    Assignee: Fujitsu Limited
    Inventors: Hunt Hang Jiang, Thomas Massingill, Mark Thomas McCormack, Michael Guang-Tzong Lee
  • Patent number: 6166915
    Abstract: A method of forming a circuit board includes, a) providing a temporary substrate; b) depositing an uncured electrically insulative circuit board material over the temporary substrate, the circuit board material adhering to the temporary substrate; c) substantially curing the uncured circuit board material into at least one self supporting sheet; d) providing circuit traces atop the cured self supporting sheet; e) mounting an electronic circuit component atop the cured self supporting sheet in electrical communication with the circuit traces; and f) peeling the temporary substrate and cured self supporting sheet from one another.
    Type: Grant
    Filed: January 29, 1997
    Date of Patent: December 26, 2000
    Assignee: Micron Technology, Inc.
    Inventors: Rickie C. Lake, Joe Mousseau, Mark E. Tuttle
  • Patent number: 6165595
    Abstract: A parts-packaging substrate comprising a metal wiring plate having a mask coated on its surface with several openings. This structure eliminates the need for a thick base formed of an insulating body and a resist layer required in prior art substrates. By bending a terminal of the metal wiring plate to form a connecting terminal, a connector used to connect to another substrate can be eliminated, reducing the cost of manufacture.
    Type: Grant
    Filed: February 9, 1998
    Date of Patent: December 26, 2000
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Koichi Kumagai, Yoshinori Wada, Teruki Edahiro
  • Patent number: 6159322
    Abstract: A photosensitive ceramic green sheet having an inorganic powder including 30% or more of a glass powder and a photosensitive organic component as essential components, characterized by satisfying -0.05.ltoreq.N2-N1.ltoreq.0.1 where N1 is the average refractive index of the organic component and N2 is the average refractive index of the inorganic powder is used to provide a highly accurate ceramic package with a high aspect ratio.
    Type: Grant
    Filed: February 17, 1998
    Date of Patent: December 12, 2000
    Assignee: Toray Industries, Inc.
    Inventors: Tomohiko Ogata, Takaki Masaki, Yuichiro Iguchi, Tuyosi Tanaka, Keiji Iwanaga
  • Patent number: 6159586
    Abstract: The present invention relates to a multilayer wiring substrate for mounting a semiconductor chip, etc. The multilayer wiring substrate is comprised of a plurality of double-sided circuit substrates, each comprised of an organic high molecular weight insulating layer and wiring conductor. An adhesive is used for laminating the double-sided circuit substrates. A Ni--Fe based alloy foil or a titanium foil is embedded within the organic high molecular weight insulating layer.
    Type: Grant
    Filed: September 11, 1998
    Date of Patent: December 12, 2000
    Assignee: Nitto Denko Corporation
    Inventors: Yasushi Inoue, Masakazu Sugimoto
  • Patent number: 6156445
    Abstract: The present invention provides an ablatively photodecomposable polymer having a photoabsorber bound to the polymer (the "ablatively photodecomposable polymer") which does not phase separate, nor does it crystallize. The ablatively photodecomposable polymer provides even ablation, high resolution and in preferred embodiments, can withstand potassium permanganate etchant and ferric chloride etchant. The ablatively photodecomposable polymer is strippable, although it can remain on the substrate if desired. The ablatively photodecomposable polymer comprises a polymer to which a photoabsorber is bound, either covalently or ionically. The present invention is also directed to a process for forming a metal pattern on a substrate employing the ablatively photodecomposable polymer.
    Type: Grant
    Filed: February 24, 1998
    Date of Patent: December 5, 2000
    Assignee: International Business Machines Corporation
    Inventors: Francis Charles Burns, William Weathers Fleming, Victor Yee-Way Lee, Randy William Snyder
  • Patent number: 6156408
    Abstract: The method (400, 500) and device (200) for reworkable direct chip attachment include a thermal-mechanical and mechanical stable solder joint for arranging connection pads on a top surface of the circuit board to facilitate connection for electronic elements, and affixing a reinforcement having apertures to accommodate solder joints to the top surface of the circuit board to facilitate solder attachment of the connection pads to the electronic elements wherein the reinforcement constrains deformation of the circuit board to provide reliable solder joints and facilitates attachment and removal of electronic elements from the circuit board.
    Type: Grant
    Filed: August 29, 1997
    Date of Patent: December 5, 2000
    Assignee: Motorola, Inc.
    Inventors: Wen Xu Zhou, Daniel Roman Gamota, Sean Xin Wu, Chao-pin Yeh, Karl W. Wyatt, Chowdary Ramesh Koripella
  • Patent number: 6146743
    Abstract: The present invention relates to multi-layer ceramic packaging of hybrid micro-electronic devices, including those for implantable medical devices. The invention permits size reduction and design simplification in such packaging by eliminating the need for electrolytic or electroless plating, and by eliminating or substantially eliminating the shrinkage variation typically associated with surface metallization techniques.
    Type: Grant
    Filed: March 31, 1999
    Date of Patent: November 14, 2000
    Assignee: Medtronic, Inc.
    Inventors: Samuel F. Haq, Patrick F. Malone, Donald P. Varner
  • Patent number: 6146480
    Abstract: Method of forming a flexible circuit laminate for use in the production of flexible circuits, comprising the steps of electrodepositing a continuous layer of copper on a first side of a generally continuous strip of polyimide having a layer of metal on the first side, modifying a second side of the polyimide strip to increase the surface energy thereof, applying a preformed adhesive film on the second side of the generally continuous strip of polyimide, the adhesive strip being formed of a substantially uncured polymeric material, and curing the adhesive film wherein at least the outmost layer of the adhesive film is only partially cured.
    Type: Grant
    Filed: March 12, 1999
    Date of Patent: November 14, 2000
    Assignee: GA-TEK Inc.
    Inventors: Michael A. Centanni, Mark Kusner
  • Patent number: 6143401
    Abstract: An electronic chip package is provided having a laminated substrate. The laminated substrate includes at least one conductive layer and at least one dielectric layer which is bonded to the conductive layer. The dielectric layer has a glass transition temperature T.sub.g greater than 200.degree. C. and a volumetric coefficient of thermal expansion of .ltoreq.75 ppm/.degree.C. A semiconductor device is electrically attached to the laminated substrate.
    Type: Grant
    Filed: January 16, 1998
    Date of Patent: November 7, 2000
    Assignee: W. L. Gore & Associates, Inc.
    Inventors: Paul J. Fischer, Joseph Korleski
  • Patent number: 6139983
    Abstract: This invention relates to a corrosion-resistant member having a resistance to plasma of a halogen based corrosive gas, which comprises a main body and a corrosion-resistant layer formed on a surface of the main body and containing a fluoride of at least one element selected from the group consisting of rare earth elements and alkaline earth elements.
    Type: Grant
    Filed: June 23, 1998
    Date of Patent: October 31, 2000
    Assignee: NGK Insulators, Ltd.
    Inventors: Tsuneaki Ohashi, Kiyoshi Araki, Sadanori Shimura, Yuji Katsuda
  • Patent number: 6139777
    Abstract: A paste for via-hole filling is provided, and the paste comprises at least (a) 30-70 volume % of conductive particles whose average diameter ranges from 0.5 to 20 .mu.m and whose specific surface area ranges from 0.05 to 1.5 m.sup.2 /g, and (b) 70-30 volume % of resin comprising at least 10 weight % of epoxy resin comprising at least one epoxy group per molecule, in which the total amount of a hydroxyl group, an amino group and a carboxyl group is not more than 5 mol % of the epoxy group, and the epoxy equivalent ranges from 100 to 350 g/eq. The conductive paste for filling via-holes and a printed circuit board comprising thereof can be used to provide an inner-via-hole connection between electrode layers without using a through-hole plating technique. The conductive paste comprises a metallic particle such as copper, an epoxy resin, a hardener and a dispersant if necessary. The paste having low viscosity and low volatility is used to fill holes disposed in a laminated substrate.
    Type: Grant
    Filed: May 4, 1999
    Date of Patent: October 31, 2000
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kazunori Omoya, Takeshi Suzuki, Tatsuo Ogawa, Takashi Oobayashi
  • Patent number: 6136131
    Abstract: A method for shielding and obtaining access to a component on a printed circuit board including providing a printed circuit board having a component encompassed by a shielding enclosure including a plurality of side walls and an integral top surface having a scored line which defines an interior portion, severing the scored line, removing the interior portion leaving the shielding enclosure with a remaining perimeter rim and allowing access to the component, providing a replacement cover for the shielding enclosure, and attaching the replacement cover to the shielding enclosure to replace the interior portion and to thereby encompass and shield the component. The replacement cover may be attached by soldering or by an adhesive surface of the replacement cover.
    Type: Grant
    Filed: June 2, 1998
    Date of Patent: October 24, 2000
    Assignee: Instrument Specialties Company, Inc.
    Inventor: Anthony Michael Sosnowski
  • Patent number: 6132851
    Abstract: This invention relates to an adhesive composition, comprising: (A) at least one phenolic resole resin; and (B) the product made by reacting (B-1) at least one difunctional epoxy resin, with (B-2) at least one compound represented by the formula ##STR1## wherein in Formulae (I) and (II): G, T and Q are each independently functional groups selected from the group consisting of COOH, OH, SH, NH.sub.2, NHR.sup.1, (NHC(.dbd.NH)).sub.m NH.sub.2, R.sup.2 COOH, NR.sup.1.sub.2, C(O)NHR.sup.1, R.sup.2 NR.sup.1.sub.2, R.sup.2 OH, R.sup.2 SH, R.sup.2 NH.sub.2 and R.sup.2 NHR.sup.1, wherein R.sup.1 is a hydrocarbon group, R.sup.2 is an alkylene or alkylidene group and m is a number in the range of 1 to about 4; T can also be R.sup.1, OR.sup.1 or SO.sub.2 C.sub.6 H.sub.4 --NH.sub.2 ; and Q can also be H. The invention also relates to copper foils having the foregoing adhesive composition adhered to at least one side thereof to enhance the adhesion between said foils and dielectric substrates.
    Type: Grant
    Filed: June 28, 1994
    Date of Patent: October 17, 2000
    Assignee: GA-TEK Inc.
    Inventor: Charles A. Poutasse
  • Patent number: 6133377
    Abstract: The present invention provides an epoxy resin composition comprising: (a) an epoxy resin having two or more epoxy groups in each molecule; (b) a phenolic resin composition comprising a condensation product of: (i) a phenol; (ii) a compound having a triazine ring; and (iii) an aldehyde, the mixture or condensation product being substantially free from any unreacted aldehydes, or methylol groups; (c) a rubber component; and (d) a curing accelerator. The epoxy resin composition has minute protrusions having a maximum height (Ry) .ltoreq.1.0 .mu.m, formed on its surface by thermosetting at or above 80.degree. C. The invention also provides a process for manufacturing a multilayer printed-wiring board of the build-up type which has a formed copper plating layer.
    Type: Grant
    Filed: April 17, 1998
    Date of Patent: October 17, 2000
    Assignee: Ajinomoto Co., Inc.
    Inventors: Shigeo Nakamura, Yuki Miyazawa, Tadahiko Yokota
  • Patent number: 6129976
    Abstract: The exothermic instrument for firing an explosive comprises a circuit board 1 having a heat resist layer 6 on a substrate 11 and an exothermic resistance 4, which connects to a pair of through hole conductive electrodes 13 passing through the substrate 11, contacting with the explosive 19 on the heat resist layer 6, a pair of electrode pins 8, each one thereof is inserted into each one of the through hole conductive electrodes, and an insulator for holding the circuit board 1 through which the electrode pins 8 pass.
    Type: Grant
    Filed: March 10, 1998
    Date of Patent: October 10, 2000
    Assignees: Nikko Company, Nichiyu Giken Kogyo Co., Ltd.
    Inventors: Kiyoshi Mizushima, Mamoru Mouri, Motoharu Miyakoshi, Satoshi Nakamura, Hiroshi Sato, Shinzo Tsuji, Masashi Watanabe, Eiji Arai
  • Patent number: 6127038
    Abstract: A conformal coating and method for applying same to a printed electrical circuit board, components and leads for providing corrosion resistance. In a preferred embodiment, the conformal coating comprises a first coating layer of parylene which is vacuum deposited and removably bonded onto an ultra-clean surface of a printed circuit board including attached components and leads. Additionally, a second coating layer of a corrosion inhibiting viscous fluid is deposited onto the first coating layer to form a continuous, stratified, conformal coating which is sealed and corrosion resistant.
    Type: Grant
    Filed: December 11, 1997
    Date of Patent: October 3, 2000
    Assignee: American Meter Company
    Inventors: Randy L. L. McCullough, John Lee Wayt, James N. Butch
  • Patent number: 6124041
    Abstract: A copper-based paste is disclosed for filling vias in, and forming conductive surface patterns on, ceramic substrate packages for semiconductor chip devices. The paste contains copper aluminate powder in proper particle size and weight proportion to achieve grain size and shrinkage control of the via and thick film copper produced by sintering. The shrinkage of the copper material during sintering is closely matched to that of the ceramic substrate.
    Type: Grant
    Filed: March 11, 1999
    Date of Patent: September 26, 2000
    Assignee: International Business Machines Corporation
    Inventors: Farid Youssif Aoude, Lawrence Daniel David, Renuka Shastri Divakaruni, Shaji Farooq, Lester Wynn Herron, Hal Mitchell Lasky, Anthony Mastreani, Govindarajan Natarajan, Srinivasa S. N. Reddy, Vivek Madan Sura, Rao Venkateswara Vallabhaneni, Donald Rene Wall
  • Patent number: 6124004
    Abstract: A laminate comprising a metallic foil and a layer made of a liquid crystal polyester resin composition comprising a liquid crystal polyester(A) as a continuous phase and rubber(B) having a functional group reactive with the liquid crystal polyester as a dispersed phase. The laminate has excellent flexibility and electric properties, and additionally is cheap, therefore, suitable as a print wiring board. The laminate comprising a metallic foil, a layer made of a liquid crystal polyester resin composition and a layer made of a fiber material of the present invention has an excellent heat resistance, a low relative dielectric constant and a low dielectric loss tangent, an excellent appearance, and additionally, the laminate can be produced in an industrially inexpensive and simple manner. The laminate can be widely used in the industrial field for electric and electronic parts, precision parts and the like.
    Type: Grant
    Filed: March 19, 1998
    Date of Patent: September 26, 2000
    Assignee: Sumitomo Chemical Company, Limited
    Inventors: Motonobu Furuta, Takanari Yamaguchi
  • Patent number: 6124220
    Abstract: A laminated board comprising an intermediate layer and two surface layers formed thereon, in which board the intermediate layer comprises a central layer made of a nonwoven glass fiber fabric impregnated with a resin composition containing a thermosetting resin and an inorganic filler and upper and lower layers formed on the central layer, each being made of said resin composition containing a thermosetting resin and an inorganic filler, and the two surface layers formed on the intermediate layer are made of a thermosetting resin-impregnated fiber substrate; and a process for production of the laminated board.
    Type: Grant
    Filed: September 17, 1996
    Date of Patent: September 26, 2000
    Assignee: Sumitomo Bakelite Company Limited
    Inventors: Takahiro Nakata, Takahisa Iida, Takashi Yamaguchi, Toshihide Kanazawa
  • Patent number: 6121553
    Abstract: An adhesive composition including (a) a polyamide-imide resin preferably having a molecular weight of 80,000 or more and (b) a thermosetting component preferably including an epoxy resin and a curing agent and/or a curing accelerator therefor is used for providing an insulating adhesive layer having a storage elastic modulus at 300.degree. C. of 30 MPa or more and a glass transition temperature of 180.degree. C. or higher. The insulating adhesive is suitable for use in wire scribed circuit boards, multilayer printed circuit boards, and circuit boards for chip carriers.
    Type: Grant
    Filed: October 23, 1997
    Date of Patent: September 19, 2000
    Assignee: Hitachi Chemical Company, Ltd.
    Inventors: Eiichi Shinada, Masao Kanno, Yuuichi Shimayama, Yoshiyuki Tsuru, Takeshi Horiuchi
  • Patent number: 6120885
    Abstract: A socketable ball grid array structure is disclosed which comprises mechanically rigid (compared to solder alloys) balls coated with noble contact metals joined to the chip carrier terminals by means of a novel electrically conducting adhesive. Because of the nature of the filler that includes conducting particles with a fusible coating and the appropriate selection of the polymer resin used in the adhesive, the balls are attached to the module in a compliant and resilient manner while leaving the majority of the bottom surface of the balls pristine. The array of balls can therefore be plugged into mating sockets in a printed circuit board forming a demountable contact. This facilitates easy removal of the socketable BGA from a board for repair or upgrade purposes as well as allows ease of plugging and unplugging of these BGA's into test and burn-in boards.
    Type: Grant
    Filed: June 30, 1998
    Date of Patent: September 19, 2000
    Assignee: International Business Machines Corporation
    Inventors: Anson J. Call, Stephen Anthony DeLaurentis, Shaji Farooq, Sung Kwon Kang, Sampath Purushothaman, Kathleen Ann Stalter
  • Patent number: 6118671
    Abstract: Ceramic circuit substrate which is sintered at 900 to 1,050.degree. C. and have low relative dielectric constant, thermal expansion coefficient comparable to that of silicon, and high bending strength, and a method of manufacturing are provided by using a glass with a softening point of 850 to 1,100.degree. C., that is, a glass having a composition included in an area in FIG. 1 (triangular composition diagram of SiO.sub.2 --B.sub.2 O.sub.3 --R.sub.2 O, a composition is represented by the position of a small circle, the number in a small circle represents the composition number) defined with lines connecting points representing the first, third, tenth, eleventh, and fourth compositions respectively as raw material.
    Type: Grant
    Filed: June 24, 1998
    Date of Patent: September 12, 2000
    Assignee: Hitachi, Ltd.
    Inventors: Hirayoshi Tanei, Shoichi Iwanaga, Masahide Okamoto, Masato Nakamura, Kousaku Morita, Shousaku Ishihara, Fumikazu Tagami, Norio Sengoku, Tsuyoshi Fujita, Fumiyuki Kobayashi
  • Patent number: 6117536
    Abstract: The present invention relates to an adhesion promoting layer which exhibits high temperature stability and high peel strengths when used in a multi-layer structure for a printed circuit board. More specifically, the present invention relates to a multi-layer structure, containing a prepreg layer wherein the prepreg layer is made from an epoxy resin and a non-amine curing agent; and an adhesion promoting layer comprising a nitrogen containing silane compound. The present invention also relates to a multi-layer structure containing a metal foil layer; an epoxy prepreg layer wherein the epoxy prepreg layer is made from an epoxy resin and a non-amine curing agent comprising at least one of an acid, an anhydride, an alkoxide, a phenoxide, a polymeric thiol and a phenol; and an adhesion promoting layer comprising a nitrogen containing silane compound, wherein the adhesion promoting layer is between the metal foil layer and the epoxy prepreg layer.
    Type: Grant
    Filed: September 10, 1998
    Date of Patent: September 12, 2000
    Assignee: GA-TEK Inc.
    Inventor: Charles A. Poutasse
  • Patent number: 6110569
    Abstract: The invention is a conductor paste composition comprising a conductive material that contains silver as the essential component, and an inorganic binder as dispersed in a vehicle, wherein said inorganic binder contains, in terms of oxides, from 10 to 60% by weight of lead oxide (PbO), from 5 to 15% by weight of boron oxide (B.sub.2 O.sub.3), from 2 to 15% by weight of silicon oxide (SiO.sub.2), from 0.1 to 15% by weight of manganese oxide (MnO), and from 0.1 to 80% by weight of vanadium oxide (V.sub.2 O.sub.5). The invention realizes a conductor paste for outer electrodes having excellent mountability, high reliability in mounting and excellent electric properties for inner electrode co-fired, non reciprocal devices, and also realizes non reciprocal devices comprising it.
    Type: Grant
    Filed: October 16, 1998
    Date of Patent: August 29, 2000
    Assignee: TDK Corporation
    Inventor: Katsuhiko Igarashi
  • Patent number: 6109175
    Abstract: An intaglio printing method and an intaglio printer are proposed, which are suitable for forming a wiring pattern and/or bumps such as bump electrodes on a print receiving material on which printing is to be performed, such as a substrate and a semiconductor package, using a paste or a fused metal. In addition, a method of forming the wiring pattern and the bumps such as bump electrodes on the printing substrate, using the intaglio printing method, a method for forming a wiring pattern, an apparatus for carrying out the method of forming the wiring pattern, the bump electrode and the wiring pattern are proposed.
    Type: Grant
    Filed: February 20, 1998
    Date of Patent: August 29, 2000
    Assignee: Ricoh Microelectronics Co., Ltd.
    Inventor: Makoto Kinoshita
  • Patent number: 6110563
    Abstract: The invention relates to a method and an arrangement for shielding an electronic means (40, 41) against external electromagnetic interference on one hand, and preventing the electronic means from interfering with closeby electric devices on the other hand. According to the invention, a shielding film (42, 43) with one or more layers is formed comprising one or more intrinsically conductive polymer films (43) and one or more insulating films (42). The shielding film (42, 43) so formed is attached to the surface of the electronic means (40, 41) using a heat treatment or a vacuum treatment or the combination of the two and, if necessary, a separate layer of glue. The invention also relates to a method for electrically connecting (44, 45, 46, 47) the intrinsic polymer layer (43) reliably to the electronic means (40, 41). The invention further relates to a method for using the electromagnetic shield to form capacitors and resistors for the electronic means.
    Type: Grant
    Filed: December 20, 1996
    Date of Patent: August 29, 2000
    Assignee: Nokia Mobile Phones, Ltd.
    Inventors: Seppo Pienimaa, Tapio Taka, Heikki Isotalo, Salme Jussila, Olli Salmela, Henrik Stubb