Printed Circuit Patents (Class 428/901)
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Patent number: 8221880Abstract: An adhesive composition is provided which is capable of providing good adhesion strength to the polyimide surface of a flexible circuit board that is exposed on the metal wiring surface and between the traces even when the polyimide surface is relatively smooth. The adhesive composition contains a thermoplastic resin, a polyfunctional acrylate, and a radical polymerization initiator and further contains a monofunctional urethane acrylate having a urethane residue at its terminal end. The monofunctional urethane acrylate is represented by the formula (1): CH2?CR0—COO—R1—NHCOO—R2??(1) wherein R0 is a hydrogen atom or a methyl group, R1 is a divalent hydrocarbon group, and R2 is an optionally substituted lower alkyl group.Type: GrantFiled: June 9, 2008Date of Patent: July 17, 2012Assignee: Sony Chemical & Information Device CorporationInventors: Yasushi Akutsu, Yasunobu Yamada, Kouichi Miyauchi
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Patent number: 8211538Abstract: A security coating on an electronic circuit assembly comprises a mesh coating that may have a unique signature pattern and comprise materials that easily produce an image of the signature so that it is possible to determine if reverse engineering has been attempted. Spaces in the mesh may include electrical components to erase circuit codes to destroy the functionality and value of the protected die if the mesh coated is disturbed. The voids may include compositions to enhance the mesh signature and abrade the circuit if tampering takes place.Type: GrantFiled: June 15, 2010Date of Patent: July 3, 2012Assignee: Honeywell International Inc.Inventor: Kenneth H. Heffner
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Patent number: 8206819Abstract: A varnish includes an epoxy resin, a curing agent, an accelerator agent and fillers. The fillers include inorganic mineral powders. The inorganic mineral powders have composition of SiO2 in weight ratio of 55±5% and a composition of aluminum compound in weight above 35%. Glass fabric cloth is dipped into the varnish so as to form a prepreg with better machined-work capability.Type: GrantFiled: January 27, 2010Date of Patent: June 26, 2012Assignee: Iteq CorporationInventor: Lai Tu Liu
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Patent number: 8187706Abstract: An adhesive composition is provided which is capable of providing good adhesion strength to the polyimide surface of a flexible circuit board that is exposed on the metal wiring surface and between the traces even when the polyimide surface is relatively smooth. The adhesive composition contains a thermoplastic resin, a polyfunctional acrylate, and a radical polymerization initiator and further contains a monofunctional urethane acrylate having a urethane residue at its terminal end. The monofunctional urethane acrylate is represented by the formula (1): CH2?CR0—COO—R1—NHCOO—R2??(1) wherein R0 is a hydrogen atom or a methyl group, R1 is a divalent hydrocarbon group, and R2 is an optionally substituted lower alkyl group.Type: GrantFiled: June 9, 2008Date of Patent: May 29, 2012Assignee: Sony Chemical & Information Device CorporationInventors: Yasushi Akutsu, Yasunobu Yamada, Kouichi Miyauchi
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Patent number: 8182904Abstract: Provided is a laminated ceramic package. The laminated ceramic package includes a laminated ceramic substrate having a conductive pattern therein, a first ceramic layer on the laminated ceramic substrate, and a second ceramic layer on the first ceramic layer. The first ceramic layer has a firing area shrinkage rate of about 1% or less. The second ceramic layer has a cavity receiving electronic components and a different firing shrinkage rate from the first ceramic layer.Type: GrantFiled: December 5, 2008Date of Patent: May 22, 2012Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Beom Joon Cho, Jong Myeon Lee
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Patent number: 8178191Abstract: A multilayer wiring board includes a core insulating layer with a first conductive wiring, a first insulating layer with a softening temperature lower than the core insulating layer, and a second insulating layer formed on the core insulating layer through the first insulating layer, the second insulating layer with a second conductive wiring electrically connected to the first conductive wiring and a softening temperature higher than the first insulating layer. The first insulating layer is mainly formed of a liquid crystal polymer. The core insulating layer and the second insulating layer are mainly formed of a polyimide resin or a bismaleimide triazine resin. The first conductive wiring and the second conductive wiring are electrically connected through a conductive via formed penetrating through the first insulating layer and the second insulating layer in a thickness direction.Type: GrantFiled: June 13, 2008Date of Patent: May 15, 2012Assignee: Hitachi Cable, Ltd.Inventors: Shigeo Nishino, Hiroyuki Takasaka, Nagayoshi Matsuo, Hiroyuki Okabe
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Patent number: 8173040Abstract: Disclosed is a composition for forming a board including a benzoxazine-based compound and a liquid crystal polymer or oligomer, and a board fabricated using the same. A board comprising the composition including the benzoxazine-based compound and the liquid crystal compound, and a prepreg comprising the cured composition, are also disclosed.Type: GrantFiled: January 11, 2010Date of Patent: May 8, 2012Assignee: Samsung Electronics Co., Ltd.Inventors: Kwang-Hee Kim, Seong-Woo Choi, Myung-Sup Jung, Chung-Kun Cho, Jae-Jun Lee, Kalinina Fedosya
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Patent number: 8147903Abstract: A circuit pattern forming method that can reduce a possibility of undesired short-circuits being produced in the circuit by satellites formed when fabricating a conductive pattern. Thereby, a highly reliable printed circuit board can be formed. A conductive pattern and an insulating pattern of a predetermined thickness are overlappingly drawn by scanning a liquid ejection head and a substrate relative to each other a plurality of times, while ejecting droplets of a conductive pattern forming solution and an insulating pattern forming solution. When forming the conductive pattern and the insulating pattern that adjoin each other on the substrate, the step of forming the insulating pattern of at least one scan is executed between the conductive pattern forming steps that are executed the plurality of times, until the conductive pattern has a predetermined thickness.Type: GrantFiled: June 20, 2006Date of Patent: April 3, 2012Assignee: Canon Kabushiki KaishaInventors: Masao Furukawa, Yuji Tsuruoka, Takashi Mori, Nobuhito Yamaguchi, Seiichi Kamiya
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Patent number: 8142840Abstract: An adhesion promotion process and composition for enhancing adhesion between a copper conducting layer and a dielectric material during manufacture of a printed circuit board. The composition contains a corrosion inhibitor, an inorganic acid, and an alcohol which is effective to increase copper-loading in the composition.Type: GrantFiled: June 7, 2007Date of Patent: March 27, 2012Assignee: Enthone Inc.Inventors: Abayomi I. Owei, Hiep X. Nguyen, Eric Yakobson
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Patent number: 8142878Abstract: In one embodiment, a substrate includes a core material formed from a filler including aluminum trihydrate and a secondary filler material. The secondary filler material has a secondary decomposition reaction that occurs at a temperature higher than a reflow temperature reached during processing of the substrate, or the secondary filler traps water released at reflow temperature by aluminum trihydrate. Other embodiments are described and claimed.Type: GrantFiled: August 22, 2007Date of Patent: March 27, 2012Assignee: Intel CorporationInventors: Amruthavalli P. Alur, Omar J. Bchir
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Patent number: 8124226Abstract: The present invention provides a circuit creation technology that improves conductive line manufacture by adding active and elemental palladium onto the surface of a substrate. The palladium is disposed in minute amounts on the surface and does not form a conductive layer by itself, but facilitates subsequent deposition of a metal onto the surface, according to the pattern of the palladium, to form the conductive lines.Type: GrantFiled: April 1, 2011Date of Patent: February 28, 2012Assignee: SRI InternationalInventors: Sunity Sharma, Jaspreet Singh Dhau
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Patent number: 8110247Abstract: A method of depositing various materials onto heat-sensitive targets, particularly oxygen-sensitive materials. Heat-sensitive targets are generally defined as targets that have thermal damage thresholds that are lower than the temperature required to process a deposited material. The invention uses precursor solutions and/or particle or colloidal suspensions, along with optional pre-deposition treatment and/or post-deposition treatment to lower the laser power required to drive the deposit to its final state. The present invention uses Maskless Mesoscale Material Deposition (M3D™) to perform direct deposition of material onto the target in a precise, highly localized fashion. Features with linewidths as small as 4 microns may be deposited, with little or no material waste. A laser is preferably used to heat the material to process it to obtain the desired state, for example by chemical decomposition, sintering, polymerization, and the like.Type: GrantFiled: May 8, 2006Date of Patent: February 7, 2012Assignee: Optomec Design CompanyInventors: Michael J. Renn, Bruce H. King, Marcelino Essien, Manampathy G. Giridharan, Jyh-Cherng Sheu
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Patent number: 8110254Abstract: The present invention provides a circuit creation technology that improves conductive line manufacture by adding active and elemental palladium onto the surface of a substrate. The palladium is disposed in minute amounts on the surface and does not form a conductive layer by itself, but facilitates subsequent deposition of a metal onto the surface, according to the pattern of the palladium, to form the conductive lines.Type: GrantFiled: September 12, 2007Date of Patent: February 7, 2012Assignee: SRI InternationalInventors: Sunity Sharma, Jaspreet Singh Dhau
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Patent number: 8105663Abstract: Disclosed herein is a composition for forming a substrate, comprising: a liquid crystal thermosetting oligomer having one or more soluble structural units in the main chain thereof and having thermosetting groups at one or more ends of the main chain thereof; and a metal alkoxide compound having reaction groups which can be covalently bonded with the thermosetting groups.Type: GrantFiled: July 22, 2009Date of Patent: January 31, 2012Assignee: Samsung Electro-Mechanics Co., LtdInventors: Keun Yong Lee, Jun Rok Oh, Seong Hyun Yoo
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Patent number: 8101266Abstract: A multilayer printed circuit board includes a first printed circuit board, a second printed circuit board, an adhesive film, and a function layer. The adhesive film is sandwiched between the first printed circuit board and the second printed circuit board. The function layer is disposed between the first printed circuit board and the second printed circuit board for blocking water from passing therethrough and for screening electromagnetic interference between the first printed circuit board and the second printed circuit board.Type: GrantFiled: June 9, 2008Date of Patent: January 24, 2012Assignee: Zhen Ding Technology Co., Ltd.Inventors: Wen-Chin Lee, Cheng-Hsien Lin
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Patent number: 8101248Abstract: Disclosed herein is a composition for forming a substrate, including: a compound prepared by polymerizing a liquid crystal thermosetting oligomer having one or more soluble structural units in a main chain thereof and having a thermosetting group at one or more of two ends of the main chain thereof with a fluorine compound having a functional group which can react with the main chain of the liquid crystal thermosetting oligomer.Type: GrantFiled: January 22, 2010Date of Patent: January 24, 2012Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Geum Hee Yun, Jun Rok Oh, Keun Yong Lee
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Patent number: 8097545Abstract: It is an objective of this invention to obtain: a composition superior in processability, dielectric properties, heat resistance, and adhesiveness by controlling phase separation of a 1,2-polybutadiene resin composition without deterioration of dielectric properties exhibited in high-frequency regions; and a multilayer printed wiring board using the same. This invention relates to a polybutadiene resin composition, comprising: a crosslinking component (A) comprising repeating units represented by the following formula (1) and having a number average molecular weight of 1000 to 20000; a radical polymerization initiator (B), the one-minute half-life temperature of which is 80° C. to 140° C.; and a radical polymerization initiator (C), the one-minute half-life temperature of which is 170° C. to 230° C.; wherein 3 to 10 parts by weight of the component (B) and 5 to 15 parts by weight of the component (C) are contained relative to 100 parts by weight of the component (A).Type: GrantFiled: October 4, 2007Date of Patent: January 17, 2012Assignee: Hitachi Chemical Company, Ltd.Inventors: Satoru Amou, Haruo Akahoshi, Hiroshi Shimizu, Akinori Hanawa
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Patent number: 8092900Abstract: It is an object of the present invention to provide a component for plating suitably used in, for example, producing a printed circuit board, a solution, and a printed circuit board including the component, the component for plating having satisfactory adhesion to an electroless plating film provided on a surface of the component even when the surface roughness of the surface of the component is small. The object is achieved by a component for electroless plating including at least a surface a for electroless plating, the surface a having a surface roughness of 0.5 ?m or less in terms of arithmetic average roughness measured with a cutoff value of 0.002 mm, and the surface a containing a polyimide resin having a siloxane structure.Type: GrantFiled: August 4, 2005Date of Patent: January 10, 2012Assignee: Kaneka CorporationInventors: Kanji Shimoosako, Takashi Ito, Masaru Nishinaka, Shigeru Tanaka, Mutsuaki Murakami
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Patent number: 8088490Abstract: A halogen-free varnish includes (A) resin, (B) curing agent, (C) flame inhibitor (flame-retarding agent), (D) accelerator and (E) additives. Resin of (A) has novolac epoxy resin, DOPO-CNE and DOPO-HQ-CNE. Curing agent of (B) includes Benzoxazine resin and phenol novolac resin. Glass fabric cloth is dipped into the halogen-free varnish so as to form a prepreg with better thermal stability, anti-flammability, low absorbent ability and higher curing rate. Furthermore, the prepreg has more toughness.Type: GrantFiled: October 25, 2009Date of Patent: January 3, 2012Assignee: Iteq CorporationInventor: Li-Chun Chen
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Patent number: 8053077Abstract: A composite-forming process includes impregnating a reinforcing structure with a curable composition at a temperature of about 10 to about 40° C. The curable composition includes specific amounts of an epoxy resin, a poly(arylene ether), a solvent, and a curing promoter. The poly(arylene ether) includes, on average, about 1.6 to about 2.4 phenolic hydroxy groups per molecule, and it has a polydispersity index less than or equal to 2.2 and an intrinsic viscosity of about 0.03 to about 0.2 deciliter per gram. These characteristics substantially improve the solubility of the poly(arylene ether) in the curable composition and allow the curable composition to be formed and used at or near room temperature. Composites formed by the process and circuit boards including the composites are also described.Type: GrantFiled: November 12, 2009Date of Patent: November 8, 2011Assignee: Sabic Innovative Plastics IP B.V.Inventors: Christina Louise Braidwood, Hua Guo, Edward Norman Peters
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Patent number: 8053378Abstract: A modified phenolic resin that is an alternate copolymer of at least one phenolic compound selected from phenol, naphthols, and their derivatives and a compound having a divalent connecting group, said modified phenolic resin having a side chain attached to an aromatic ring having a hydroxy group, said side chain being represented by defined formula (1-1). The modified phenolic resin can be used as a hardener for epoxy resins and a cured product thereof has excellent adhesion and flame retardancy without impairing properties of conventional phenolic resins such as gel time, glass transition temperature, moisture absorption, and mechanical properties. The epoxy resin composition can provide excellent adhesion and flame retardancy as hardeners for semiconductor sealing epoxy resins, insulating materials for electrical/electronic components, and laminates (printed circuit boards).Type: GrantFiled: December 16, 2005Date of Patent: November 8, 2011Assignee: Mitsui Chemicals, Inc.Inventors: Takaharu Abe, Sunao Maeda, Tatsuhiro Urakami, Yukio Fukui, Masanobu Maeda, Hiroaki Narisawa
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Patent number: 8048510Abstract: A liner for an appliance is formed by a plastic sheet formed into a three dimensional shape corresponding to at least a portion of a compartment of the appliance. A plurality of electrically conductive ink pathways are applied on a surface of the plastic sheet, and a sealer material is applied to the plastic sheet to cover said pathways.Type: GrantFiled: September 21, 2005Date of Patent: November 1, 2011Assignee: Whirlpool CorporationInventors: Martin Shawn Egan, Michael E. Stagg, Jr.
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Patent number: 8035037Abstract: The core substrate is capable of securely preventing short circuit between an electrically conductive core section and a plated through-hole section. The core substrate comprises: an electrically conductive core section having a pilot hole, through which a plated through-hole section is formed; electrically conductive layers coating the inner face of the pilot hole and a surface of the core section; a gas purging hole being formed in the conductive layer coating the surface of the core section; an insulating material filling a space between the inner face of the pilot hole and an outer circumferential face of the plated through-hole section; and cable layers being laminated on both side faces of the core section.Type: GrantFiled: July 10, 2008Date of Patent: October 11, 2011Assignee: Fujitsu LimitedInventors: Kenji Iida, Tomoyuki Abe, Yasutomo Maehara, Shin Hirano, Takashi Nakagawa, Hideaki Yoshimura, Seigo Yamawaki, Norikazu Ozaki
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Patent number: 8029903Abstract: Provided are a silicon nitride substrate and a silicon nitride circuit board with excellent electrical characteristics, and power control parts utilizing them. A silicon nitride substrate comprises a silicon nitride sintered body obtainable by sintering a silicon nitride powder in the presence of a sintering aid comprising MgO, Y2O3 and SiO2 in a proportion of (1) MgO/(MgO+SiO2)=34-59 mol %, and (2) Y2O3/(Y2O3+SiO2)=50-66 mol %, and a silicon nitride circuit board utilizes it.Type: GrantFiled: July 27, 2006Date of Patent: October 4, 2011Assignee: Denki Kagaku Kogyo Kabushiki KaishaInventors: Takeshi Gotoh, Motoharu Fukazawa, Tetsumi Ohtsuka
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Patent number: 8012801Abstract: A flip chip mounting process includes the steps of supplying a resin (13) containing solder powder and a convection additive (12) onto a wiring substrate (10) having a plurality of electrode terminals (II), then bringing a semiconductor chip (20) having a plurality of connecting terminals (11) into contact with a surface of the supplied resin (13), and then heating the wiring substrate (10) to a temperature that enables the solder powder to melt. The heating step is carried out at a temperature that is higher than the boiling point of the convection additive (12) to allow the boiling convection additive (12) to move within the resin (12). During this heating step, the melted solder powder is allowed to self-assemble into the region between each electrode terminal (11) of the wiring substrate (10) and each connecting terminal (21) of the semiconductor chip to form an electrical connection between each electrode terminal (11) and each connecting terminal (21).Type: GrantFiled: March 4, 2010Date of Patent: September 6, 2011Assignee: Panasonic CorporationInventors: Seiji Karashima, Yoshihisa Yamashita, Satoru Tomekawa, Takashi Kitae, Seiichi Nakatani
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Patent number: 7989081Abstract: A resin composite copper foil comprising a copper foil and a resin layer containing a block copolymer polyimide and a maleimide compound, the resin layer being formed on one surface of the copper foil, a production process thereof, a copper-clad laminate using the resin composite copper foil, a production process of a printed wiring board using the copper-clad laminate, and a printed wiring board obtained by the above process.Type: GrantFiled: January 25, 2007Date of Patent: August 2, 2011Assignees: Mitsubishi Gas Chemical Company, Inc., PI R&D Co., Ltd.Inventors: Mitsuru Nozaki, Morio Gaku, Yasuo Tanaka, Eiji Nagata, Yasuo Kikuchi, Masashi Yano
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Patent number: 7989048Abstract: A flexible base includes a main region configured for forming flexible printed circuit board units; and two conveying regions respectively arranged on two sides of the main region. Each of the conveying regions includes an insulating substrate, a plurality of sprocket holes, and a patterned supporting layer. The sprocket holes are defined along a lengthwise direction of the insulating substrate. The patterned supporting layer is formed on the insulating substrate. The patterned supporting layer extends from an edge of each sprocket hole towards a periphery region of the corresponding sprocket.Type: GrantFiled: December 19, 2007Date of Patent: August 2, 2011Assignee: Foxconn Advanced Technology Inc.Inventors: Tso-Hung Yeh, Chia-Cheng Chen, Pei-Yu Chao
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Patent number: 7985482Abstract: A stiffener sheet for flexible printed flexible printed circuit boards, includes alternately laminated polyimide layers and polyamideimide layers, wherein a molecular structure of the polyamideimide is represented by the following formula: wherein Ar and Ar? represents different substituted aromatic groups.Type: GrantFiled: June 23, 2008Date of Patent: July 26, 2011Assignee: Foxconn Advanced Technology Inc.Inventors: Yung-Wei Lai, Cheng-Wei Kuo, Shing-Tza Liou
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Patent number: 7981508Abstract: The present invention provides a circuit creation technology that improves conductive line manufacture by adding active and elemental palladium onto the surface of a substrate. The palladium is disposed in minute amounts on the surface and does not form a conductive layer by itself, but facilitates subsequent deposition of a metal onto the surface, according to the pattern of the palladium, to form the conductive lines.Type: GrantFiled: September 12, 2007Date of Patent: July 19, 2011Assignee: SRI InternationalInventors: Sunity Sharma, Jaspreet Singh Dhau
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Patent number: 7955701Abstract: A composition for preparing a resin is provided. The composition includes a brominated epoxy resin, a urethane-modified copolyester, a curing agent and a solvent. A prepreg is also provided. The prepreg includes a glass fabric and a resin layer on the glass fabric. The resin layer is made from the foregoing resin.Type: GrantFiled: June 19, 2009Date of Patent: June 7, 2011Assignee: ITEQ CorporationInventors: Bin Jian, Lai-Tu Liu
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Patent number: 7943856Abstract: A composition for producing a printed circuit board is provided. The composition includes a polyamic acid having one or two crosslinkable functional groups introduced at one or both ends thereof, a liquid crystal polymer (LCP) or a liquid crystalline thermoset (LCT) oligomer, and an organic solvent. Therefore, the composition can be used as a material for next-generation boards that are becoming gradually lighter in weight and smaller in thickness and size. Further provided is a printed circuit board produced using the composition.Type: GrantFiled: December 4, 2008Date of Patent: May 17, 2011Assignees: Samsung Electronics Co., Ltd., Samsung Electro-Mechanics Co., Ltd., Samsung Fine Chemicals Co., Ltd.Inventors: Yoo Seong Yang, Myung Sup Jung, Chung Kun Cho, Sang Hyuk Suh, Bon Hyeok Gu
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Patent number: 7935408Abstract: An electrical structure and method of forming. The electrical structure includes a first substrate, first dielectric layer, an underfill layer, and a second substrate. The first dielectric layer is formed over a top surface of the first substrate. The first dielectric layer includes a first opening extending through a top surface and a bottom surface of said first dielectric layer. The underfill layer is formed over the top surface of the first dielectric layer and within the first opening. The second substrate is formed over and in contact with the underfill layer.Type: GrantFiled: October 26, 2007Date of Patent: May 3, 2011Assignee: International Business Machines CorporationInventors: Timothy Harrison Daubenspeck, Jeffrey Peter Gambino, Christopher David Muzzy, Wolfgang Sauter
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Patent number: 7906213Abstract: An epoxy resin curable composition for a prepreg, comprising the following components (A) to (E): (A) a polyamide compound having a structure derived from an aromatic diamine including a phenolic hydroxyl group, the aromatic diamine having the phenolic hydroxyl group in a position adjacent to an amino group; (B) an epoxy resin; (C) an epoxy resin curing agent; (D) a filler; and (E) a solvent.Type: GrantFiled: February 8, 2007Date of Patent: March 15, 2011Assignee: Adeka CorporationInventors: Yoshinori Takahata, Takahiro Mori, Seiichi Saito, Mitsunori Ide, Yoshihiro Fukuda
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Patent number: 7892626Abstract: A substrate with plane patterns formed in a liquid process wherein the plane patterns are formed based on a combination of plane shapes by which a difference in internal pressure of a solution between any two points of the solution is small, the solution being ejected onto the substrate so as to form the plane patterns by the liquid process.Type: GrantFiled: September 8, 2005Date of Patent: February 22, 2011Assignee: Future Vision Inc.Inventors: Makoto Abe, Hiroki Kaneko, Takuya Takahashi, Etsuko Nishimura, Yoshitaka Tsutsui, Takaaki Suzuki
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Patent number: 7892651Abstract: A resin composite metal foil comprising a metal foil and a layer of a block copolymer polyimide resin formed on one surface of the metal foil, a metal-foil-clad laminate using the above resin composite metal foil, a printed wiring board using the above metal-foil-clad laminate, and a process for the production of a printed wiring board comprising removing an external layer metal foil of a metal-foil-clad laminate and forming a conductor layer on an external layer insulating layer by plating, wherein the metal-foil-clad laminate comprises a layer of a block copolymer polyimide resin which layer is in contact with the external layer metal foil.Type: GrantFiled: September 13, 2005Date of Patent: February 22, 2011Assignees: Mitsubishi Gas Chemical Company, Inc., PI R&D Co., Ltd.Inventors: Takabumi Omori, Mitsuru Nozaki, Eiji Nagata, Masashi Yano
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Patent number: 7883783Abstract: An electrodeposited copper foil with carrier foil on which a resin layer for forming an insulating layer is formed, comprising a carrier foil, a bonding interface layer, an electrodeposited copper foil with smooth surfaces on both sides and a resin layer. The resin layer is composed of 20 to 80 parts by weight of an epoxy resin and a curing agent, 20 to 80 parts by weight of a solvent soluble aromatic polyamide resin polymer and optionally a curing accelerator in a suitable amount.Type: GrantFiled: March 15, 2005Date of Patent: February 8, 2011Assignee: Mitsui Mining & Smelting Co., Ltd.Inventor: Seiji Nagatani
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Patent number: 7858199Abstract: The flexible metal-clad laminate of the present invention comprises at least one polyimide layer made of a polyimide having repeating units represented by the following formula I: wherein R and ? are as defined in the specification, and at least one metal layer. The polyimide is soluble in solvents and excellent in heat resistance and adhesion property, and shows a low dielectric constant even in a high frequency range.Type: GrantFiled: May 6, 2004Date of Patent: December 28, 2010Assignee: Mitsubishi Gas Chemical Company, Inc.Inventors: Shuta Kihara, Ko Kedo
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Patent number: 7829480Abstract: The present invention is to provide a printed circuit board (PCB) supporting woven fabric and a PCB having the same. The PCB includes a supporting woven fabric, a filling resin body enveloping the supporting woven fabric and at least one signal trace arranged on the surface of the filling resin body. The supporting woven fabric is made by a number of warp fiberglass strands and weft fiberglass strands interlaced mutually, wherein each of the warp fiberglass strands initially crosses above one weft fiberglass strand to separately form a bump upwardly and passes through under the next at least two weft fiberglass strands. The invention aims to decrease the number of the bumps bulged thereof to make the PCB improved in effectiveness and speed of signal transmission.Type: GrantFiled: January 24, 2008Date of Patent: November 9, 2010Assignee: Inventec CorporationInventor: Mu-Chih Chuang
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Patent number: 7828924Abstract: An intermediate material which is adapted to manufacture a circuit board includes a prepreg sheet having a through-hole provided therein, a first film provided on a surface of the prepreg sheet and having a first hole communicating with the through-hole, a second film provided on another surface of the prepreg sheet and having a second hole communicating with the through-hole, and a conductive paste filling the though-hole, the first hole, and the second hole. The thickness t1 of the prepreg sheet, the minimum diameter rmin of the through-hole, the thickness tf1 of the first film, the diameter rf1 of the first hole, the thickness tf2 of the second film, the diameter rf2 of the second hole satisfy a relation: rf1/tf1?3, rf2/tf2?3, and rmin/(t1+tf1+tf2)?1.5. This intermediate material provides a circuit board having a fine via-conductor connected to a metal foil securely and stably.Type: GrantFiled: December 6, 2006Date of Patent: November 9, 2010Assignee: Panasonic CorporationInventors: Yoshihiro Kawakita, Toshiaki Takenaka
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Patent number: 7820260Abstract: A package particularly for horticultural products and food products in general, which can be manufactured with automatic packaging machines, comprising a sheet-like element in reel form, which is constituted by a biaxially-stretched polyethylene net which has a first plurality of filaments arranged substantially parallel to the longitudinal unreeling direction of the reel and a second plurality of filaments which are substantially perpendicular to the first plurality of filaments, the sheet-like element being folded and welded to itself at least at portions of the edges of the manufactured package.Type: GrantFiled: May 16, 2006Date of Patent: October 26, 2010Assignee: Tenax S.p.A.Inventor: Pierluigi Maggioni
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Patent number: 7820274Abstract: A prepreg having low dielectric constant, low dielectric loss, and high heat cycle resistance. The prepreg includes a sheet-like preform and a resin-impregnated, sheet-like, fiber-reinforced material thermal pressure adhered to the sheet-like preform. The sheet-like preform includes a graft copolymer (a) in which 15 to 40 parts by mass of an aromatic vinyl monomer are grafted to 60 to 85 parts by mass of a random or block copolymer comprising monomer units selected from nonpolar ?-olefin monomers and nonpolar conjugated diene monomers. The resin-impregnated, sheet-like, fiber-reinforced material includes a sheet-like, fiber-reinforced material (b1) and a thermoplastic resin (b2) into which the sheet-like, fiber-reinforced material (b1) is impregnated. The thermoplastic resin (b2) is a random or block copolymer composed of 60 to 90 mass % of a monomer unit, which is selected from nonpolar ?-olefin monomers and nonpolar conjugated diene monomers, and 10 to 40 mass % of an aromatic vinyl monomer unit.Type: GrantFiled: May 30, 2007Date of Patent: October 26, 2010Assignee: NOF CorporationInventors: Toshihiro Ohta, Tomiho Yamada, Shigeru Asami
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Patent number: 7811667Abstract: A carbon nanotube (CNT) film having a transformed substrate structure and a manufacturing method thereof. The CNT film includes a transparent substrate, a plurality of three-dimensional (3D) structures formed distant from each other on the transparent substrate, and carbon nanotubes (CNTs) deposited on the transparent substrate where the plurality of 3D structures is not formed. The method includes forming a plurality of 3D structures distant from each other on a transparent substrate, and depositing a CNT solution on the substrate with the plurality of 3D structures formed thereon, wherein the CNT solution is deposited into a portion of the transparent substrate where the 3D structures are not formed. Thus, the deposition mechanism of the CNT solution is controlled to thereby increase the transparency of the CNT film and the electrical conductivity of an electrode including the CNT film.Type: GrantFiled: March 26, 2008Date of Patent: October 12, 2010Assignee: Samsung Electronics Co., Ltd.Inventors: Hyeon Jin Shin, Seonmi Yoon, Jaeyoung Choi, Jin Sueng Sohn, Eun Hyoung Cho
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Patent number: 7811655Abstract: Disclosed is a metal-ceramic substrate made up of at least one ceramic layer which is provided with metallizations on both faces. In order to obtain a partial discharge resistance of less than 10 pC at a predefined measuring voltage, the thickness of the ceramic layer amounts to about one sixth of the measuring voltage.Type: GrantFiled: April 23, 2005Date of Patent: October 12, 2010Assignee: Curamic Electronics GmbHInventors: Jurgen Schulz-Harder, Karl Exel
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Patent number: 7794820Abstract: Disclosed herein are a printed circuit board and a fabrication method thereof, which can improve electrical properties, shorten processing time, and reduce the thickness of a chip package by achieving an ultra-thin fine circuit pattern. The printed circuit board includes an insulating material; a via-hole formed in a given location of the insulating material; a copper seed layer formed through ion beam surface treatment and vacuum deposition on the surface of the insulating material having the via-hole formed therein; and a copper pattern plating layer formed on a given region of the insulating material, which has the copper seed layer formed thereon, and in the via-hole.Type: GrantFiled: July 20, 2007Date of Patent: September 14, 2010Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Dong Sun Kim, Taehoon Kim, Jong Seok Song, Sam Jin Her, Jun Heyoung Park
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Patent number: 7786029Abstract: A resin composition contains a solvent and a solid content dispersed in the solvent. The solid content does not contain phenolic resin. The solid content contains a benzoxazine resin and a phosphorus-containing epoxy resin. The weight ratio of the benzoxazine resin to phosphorus-containing epoxy resin is about 0.6:1 to about 3.0:1. A circuit board substrate and a copper clad laminate fabricated with the resin composition mentioned above are disclosed too.Type: GrantFiled: January 5, 2009Date of Patent: August 31, 2010Assignee: ITEQ CorporationInventors: Li-Chun Chen, Jeng-I Chen, Bill Weng
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Patent number: 7741411Abstract: A carboxyl group-containing polyurethane is capable of giving cured products excellent in adhesion with substrates, low warpage, flexibility, plating resistance, soldering heat resistance and long-term reliability. The carboxyl group-containing polyurethane includes a structure derived from a polyol compound having 1 to 10 hydroxyl groups and 18 to 72 carbon atoms per molecule. The carboxyl group-containing polyurethane is produced by reacting: (A) a polyisocyanate compound; (B) a polyol compound having 1 to 10 hydroxyl groups and 18 to 72 carbon atoms per molecule; and (C) a carboxyl group-containing dihydroxy compound (other than the compound (B)).Type: GrantFiled: October 4, 2006Date of Patent: June 22, 2010Assignee: Showa Denko K.K.Inventors: Hiroshi Uchida, Ritsuko Azuma
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Patent number: 7737368Abstract: A circuit board includes: a plurality of wiring layers; an insulating layer which insulates the plurality of wiring layers, the insulating layer containing a fibrous filler and a resin; and a conductor part formed on a sidewall of a via piercing through the insulating layer. The fibrous filler protrudes from the sidewall and is covered with the conductor part, with a length greater than the thickness of the conductor layer.Type: GrantFiled: September 28, 2006Date of Patent: June 15, 2010Assignee: Sanyo Electric Co., Ltd.Inventors: Yasuhiro Kohara, Ryosuke Usui, Noriaki Kojima
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Patent number: 7738249Abstract: An electrical assembly which includes a circuitized substrate including a first plurality of dielectric and electrically conductive circuit layers alternatively oriented in a stacked orientation, a thermal cooling structure bonded to one of the dielectric layers and at least one electrical component mounted on the circuitized substrate. The circuitized substrate includes a plurality of electrically conductive and thermally conductive thru-holes located therein, selected ones of the thermally conductive thru-holes thermally coupled to the electrical component(s) and extending through the first plurality of dielectric and electrically conductive circuit layers and being thermally coupled to the thermal cooling structure, each of these selected ones of thermally conductive thru-holes providing a thermal path from the electrical component to the thermal cooling structure during assembly operation.Type: GrantFiled: October 25, 2007Date of Patent: June 15, 2010Assignee: Endicott Interconnect Technologies, Inc.Inventors: Benson Chan, Frank D. Egitto, How T. Lin, Roy H. Magnuson, Voya R. Markovich, David L. Thomas
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Patent number: 7737207Abstract: A resin composition characterized as containing (A) a synthetic resin having a melting temperature of 300° C. or above and (B) a platy inorganic filler incorporated in the resin and having the following properties; pH of aqueous dispersion: 5.5-8.0, amount of extracted alkalis: Na 30 ppm or below and K 40 ppm or below, maximum diameter a: 50 ?m or below, thickness b: 1.0 ?m or below, and aspect ratio (a/b): 20 or above.Type: GrantFiled: February 23, 2009Date of Patent: June 15, 2010Assignee: Otsuka Chemical Co., Ltd.Inventors: Akiyoshi Kawaguchi, Yoshiaki Ishii, Hideyuki Tsutsumi, Tomohiro Tanaka
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Patent number: RE43509Abstract: A printed circuit board is by formed by laminating an interlaminar insulating layer on a conductor circuit of a substrate, in which the conductor circuit is comprised of an electroless plated film and an electrolytic plated film and a roughened layer is formed on at least a part of the surface of the conductor circuit.Type: GrantFiled: December 18, 1997Date of Patent: July 17, 2012Assignee: Ibiden Co., Ltd.Inventors: Motoo Asai, Yasuji Hiramatsu, Yoshinori Wakihara, Kazuhito Yamada