Plural Exposure Steps Patents (Class 430/394)
  • Patent number: 11518096
    Abstract: A build plate for a three-dimensional printer includes: a rigid, optically transparent, gas-impermeable planar base having an upper surface and a lower surface; and a flexible, optically transparent, gas-permeable sheet having an upper and lower surface, the sheet upper surface comprising a build surface for forming a three-dimensional object, the sheet lower surface positioned on the base upper surface. The build plate includes a gas flow enhancing feature configured to increase gas flow to the build surface.
    Type: Grant
    Filed: January 15, 2021
    Date of Patent: December 6, 2022
    Assignee: Carbon, Inc.
    Inventors: David Moore, John R. Tumbleston, Edward T. Samulski, Alexander Ermoshkin, Jason P. Rolland, Ariel M. Herrmann, Bob E. Feller
  • Patent number: 11519373
    Abstract: A method for producing an injector which is designed in particular to inject fuel into an induction pipe or directly into a combustion chamber of an internal combustion engine. The method includes providing an injector base element, providing a rod that is insertible into a through hole of the injector base element, producing a negative matrix of a spray orifice element on an axial end of the rod, inserting the rod into the through hole of the injector base element, positioning the negative matrix situated on the rod relative to the injector base element, producing the spray orifice element having at least one spray orifice by applying a galvanization layer on a downstream end, in the injection direction, of the injector base element and on the negative matrix, and removing the rod and the negative matrix.
    Type: Grant
    Filed: February 28, 2019
    Date of Patent: December 6, 2022
    Assignee: Robert Bosch GmbH
    Inventors: Thomas Stach, James Doetsch, Jan Tremel, Markus Feigl, Peter Rueck, Roman Poltoratski, Timo Dehm
  • Patent number: 11491711
    Abstract: This invention relates to the field of 3D printing used to make a 3D object where a 3D printed object is formed using electromagnetic radiation emitted from a visual display screen or emissive pixel array screen illuminated by radiation sources with effectively non-overlapping wavelength emission spectra with the effect of creating two different polymerised properties in the object.
    Type: Grant
    Filed: February 11, 2020
    Date of Patent: November 8, 2022
    Assignee: PhotoCentriC Limited
    Inventors: Paul Holt, Sarah Karmel
  • Patent number: 11464115
    Abstract: The present invention relates to a printing method comprising a step of printing a pattern on a substrate, preferably by ink jet printing, followed by a gold plating step by means of contact between the pre-printed pattern to be gold plated and a gold plating deposition device, such as a preferably conductive metal sheet, e.g. a multilayer film comprising a preferably conductive metal sheet.
    Type: Grant
    Filed: March 8, 2018
    Date of Patent: October 4, 2022
    Assignees: MGI DIGITAL TECHNOLOGY, INKJET ENGINE TECHNOLOGY
    Inventors: Edmond Abergel, Louis Gautier Le Boulch, Clement Beges
  • Patent number: 11444107
    Abstract: A manufacturing method of a display panel includes providing a substrate having a first surface and a second surface opposite to the first surface; forming a high-shielding position layer on the first surface, wherein the light-shielding positioning layer has at least one first alignment pattern; forming a transparent material layer on the second surface; forming a photoresist layer on the transparent material layer; performing an exposure process, such that a light beam passes through the at least one first alignment pattern to penetrate through the substrate and the transparent material layer to the photoresist layer; performing a developing process to pattern the photoresist layer and form a patterned photoresist layer; and performing an etching process to pattern the transparent positioning layer having at least one second alignment pattern. In a direction perpendicular to the substrate, at least one first alignment pattern overlaps with at least one second alignment pattern.
    Type: Grant
    Filed: September 30, 2020
    Date of Patent: September 13, 2022
    Assignee: AU Optronics Corporation
    Inventors: Peng-Bo Xi, Chun-Cheng Cheng
  • Patent number: 11443661
    Abstract: A flexible display substrate and a method for manufacturing the same are provided. The method includes: forming a first insulating layer on a flexible base substrate; forming an etching barrier layer on a side of the first insulating layer away from the flexible base substrate; forming a second insulating layer covering the etching barrier layer on the side of the first insulating layer away from the flexible base substrate; and forming a first opening in the first insulating layer and a second opening in the second insulating layer through one patterning process, so that an orthographic projection of the first opening on the flexible base substrate falls within an orthographic projection of the second opening on the flexible base substrate, so as to form a step portion at a connection position where the first opening is connected to the second opening.
    Type: Grant
    Filed: April 10, 2020
    Date of Patent: September 13, 2022
    Assignees: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BEIJING BOE TECHNOLOGY DEVELOPMENT CO., LTD.
    Inventors: Liang Song, Yufei Ji, Pengyu Liao, Jiahao Xu, Hao Cheng, Wuyang Zhao, Long Jiang, Fei Ou, Jun Peng
  • Patent number: 11413856
    Abstract: A method and apparatus for making a three-dimensional object by solidifying a solidifiable material are shown and described. A photohardening inhibitor is admitted into a surface of a photohardenable material to create a “dead zone” where little or no solidification occurs. The dead zone prevents the exposed surface of the photohardenable material from solidifying in contact with a container bottom or film. As the solidified object areas get larger and the build platform speed increases, the dead zone increases which can cause the formation of channels in the resulting objects and delamination. A number of techniques including continuous/discontinuous mode switching, multiple illuminations of portions of the same layer, and the use of gray scaling are disclosed for regulating the size of the dead zone.
    Type: Grant
    Filed: July 3, 2020
    Date of Patent: August 16, 2022
    Assignee: Global Filtration Systems
    Inventors: Ali El-Siblani, Mohamad Janbain
  • Patent number: 11373679
    Abstract: A recording head includes a near-field transducer proximate a media-facing surface of the recording head and a waveguide that overlaps and delivers light to the near-field transducer. The recording head includes subwavelength-sized focusing mirror comprising first and second reflectors disposed on cross track sides of the near-field transducer. Each of the first and second reflectors is spaced apart from the media-facing surface by a distance, D, measured along an axis normal to the media-facing surface.
    Type: Grant
    Filed: August 19, 2021
    Date of Patent: June 28, 2022
    Assignee: SEAGATE TECHNOLOGY LLC
    Inventors: Ruoxi Yang, YongJun Zhao, Nan Zhou, Weibin Chen, Huaqing Yin, Michael Allen Seigler
  • Patent number: 11373899
    Abstract: According to the present embodiment, the pattern generation device includes a misalignment value calculation unit configured to acquire a layout information, calculate a layout function from the layout information, and calculate a misalignment value by a convolution of the layout function and an integral kernel having a predetermined parameter, and a pattern correction unit configured to correct a pattern to generate a modified layout information using a calculated result by the misalignment value calculation unit, and output the modified layout information.
    Type: Grant
    Filed: March 4, 2020
    Date of Patent: June 28, 2022
    Assignee: Kioxia Corporation
    Inventors: Taiki Kimura, Tetsuaki Matsunawa
  • Patent number: 11353845
    Abstract: A model-adaptive multi-source large-scale mask projection 3D printing system configured to conduct the following steps: projecting pure-color images of first and second colors having identical attributes, capturing an image of an overlapping portion and calculating height and width information of the overlapping portion; splitting a pre-processed slice and respectively recording width and height information of two slices resulting from the splitting and generating two gray scale images having identical attributes thereto; counting power values of identical positions of slices in different gray scale values, performing a further calculation to obtain a projection mapping function, using the projection mapping function as a basis for performing optimization on gray scale interpolation of the generated images; and fusing the processed gray scale images and the originally split two slices to obtain a mask projection 3D printing slice having a uniform shaping brightness, and forming a final product.
    Type: Grant
    Filed: August 25, 2020
    Date of Patent: June 7, 2022
    Assignee: Beijing University of Technology
    Inventors: Lifang Wu, Lidong Zhao, Zechao Liu, Jiankang Qiu, Xiaohua Guo, Meng Jian, Ziming Zhang
  • Patent number: 11322398
    Abstract: A process for making an interconnect of a group III-V semiconductor device includes the steps of applying a positive photoresist layer and an image-reversible photoresist layer, subjecting the image-reversible photoresist and positive photoresist layers to patternwise exposure, subjecting the image-reversible photoresist layer to image reversal bake, subjecting the image-reversible photoresist and positive photoresist layers to flood exposure, subjecting the image-reversible photoresist and positive photoresist layers to development, depositing a diffusion barrier layer, depositing a copper layer, and removing the image-reversible photoresist and positive photoresist layers.
    Type: Grant
    Filed: December 3, 2019
    Date of Patent: May 3, 2022
    Assignee: NATIONAL CHIAO TUNG UNIVERSITY
    Inventors: Edward-Yi Chang, Yueh-Chin Lin, Ming-Yen Tsai, Po-Sheng Chang
  • Patent number: 11079338
    Abstract: In detecting the structure of a lithography mask, a portion of the lithography mask is firstly illuminated with illumination light of an at least partially coherent light source in the at least one preferred illumination direction. A diffraction image of the illuminated portion is then recorded by spatially resolved detection of a diffraction intensity of the illumination light diffracted from the illuminated portion in a detection plane. The steps of “illuminating” and “recording the diffraction image” are then carried out for further portions of the lithography mask. Between at least two portions of the lithography mask that are thereby detected, there is in each case an overlap region whose surface extent measures at least 5% or more of the smaller of the two portions of the lithography mask. The repetition takes place until the detected portions of the lithography mask completely cover a region of the lithography mask to be detected.
    Type: Grant
    Filed: June 25, 2019
    Date of Patent: August 3, 2021
    Assignee: Carl Zeiss SMT GmbH
    Inventors: Ulrich Matejka, Thomas Scheruebl, Markus Koch, Christoph Husemann, Lars Stoppe, Beat Marco Mout
  • Patent number: 11067895
    Abstract: After printing common features from a primary mask into a photoresist layer located over a substrate, a functional feature which is suitable for changing functionalities or the configurations of the common features according to a chip design is selected from a library of additional functional features in a secondary mask. The selected functional feature from the secondary mask is printed into the photoresist layer to modify the common features that already exist in the photoresist layer. The selection and printing of functional feature processes can be repeated until a final image corresponding to the chip design is obtained in the photoresist layer.
    Type: Grant
    Filed: January 13, 2017
    Date of Patent: July 20, 2021
    Assignee: International Business Machines Corporation
    Inventors: John B. Deforge, Bassem M. Hamieh, Terence B. Hook, Theresa A. Newton, Kirk D. Peterson
  • Patent number: 10884336
    Abstract: A method for fabricating a semiconductor device, includes dividing a pattern region of a desired pattern that is to be formed on a semiconductor substrate into a plurality of sub-regions; calculating combination condition including a shape of illumination light for transferring and a mask pattern obtained by correcting a partial pattern in the sub-region of the desired pattern formed on a mask used during transferring for each of the plurality of sub-regions, to make a dimension error of the partial pattern of each of the plurality of sub-regions smaller when transferred to the semiconductor substrate; and forming the desired pattern by making multiple exposures on the semiconductor substrate in such a way that the partial patterns of the sub-regions divided are sequentially transferred by transferring a pattern to the semiconductor substrate using the combination conditions calculated for each of the sub-regions.
    Type: Grant
    Filed: November 18, 2016
    Date of Patent: January 5, 2021
    Assignee: NuFlare Technology, Inc.
    Inventor: Takayuki Abe
  • Patent number: 10684552
    Abstract: Various methods are disclosed herein for reducing (or eliminating) printability of mask defects during lithography processes. An exemplary method includes performing a first lithography exposing process and a second lithography exposing process using a mask to respectively image a first set of polygons oriented substantially along a first direction and a second set of polygons oriented substantially along a second direction on a target. During the first lithography exposing process, a phase distribution of light diffracted from the mask is dynamically modulated to defocus any mask defect oriented at least partially along both the first direction and a third direction that is different than the first direction. During the second lithography exposing process, the phase distribution of light diffracted from the mask is dynamically modulated to defocus any mask defect oriented at least partially along both the second direction and a fourth direction that is different than the third direction.
    Type: Grant
    Filed: May 4, 2018
    Date of Patent: June 16, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yen-Cheng Lu, Chia-Hao Hsu, Shinn-Sheng Yu, Chia-Chen Chen, Jeng-Horng Chen, Anthony Yen
  • Patent number: 10551743
    Abstract: A method for critical dimension control in which a substrate is received having an underlying layer and a radiation-sensitive material layer thereon. The radiation-sensitive material is exposed through a patterned mask to a first wavelength of light in the UV spectrum, and developed a first time. The radiation-sensitive material is flood exposed to a second wavelength of light different from the first wavelength of light and developed a second time to form a pattern.
    Type: Grant
    Filed: May 12, 2017
    Date of Patent: February 4, 2020
    Assignee: Tokyo Electron Limited
    Inventors: Michael A. Carcasi, Anton J. deVilliers
  • Patent number: 10409152
    Abstract: Techniques are disclosed for realizing a two-dimensional target lithography feature/pattern by decomposing (splitting) it into multiple unidirectional target features that, when aggregated, substantially (e.g., fully) represent the original target feature without leaving an unrepresented remainder (e.g., a whole-number quantity of unidirectional target features). The unidirectional target features may be arbitrarily grouped such that, within a grouping, all unidirectional target features share a common target width value. Where multiple such groupings are provided, individual groupings may or may not have the same common target width value. In some cases, a series of reticles is provided, each reticle having a mask pattern correlating to a grouping of unidirectional target features. Exposure of a photoresist material via the aggregated series of reticles substantially (e.g., fully) produces the original target feature/pattern.
    Type: Grant
    Filed: January 30, 2017
    Date of Patent: September 10, 2019
    Assignee: INTEL CORPORATION
    Inventors: Charles H. Wallace, Hossam A. Abdallah, Elliot N. Tan, Swaminathan Sivakumar, Oleg Golonzka, Robert M. Bigwood
  • Patent number: 10208104
    Abstract: The present invention provides novel methods and compositions useful for a fast and efficient chemical conjugation method of making hetero-arm polymers based on thiourea-catechol coupling. This novel conjugation method are useful in a wide variety of applications relating to the modification, ligation, and conjugation of large or small molecules to each other as well as to solid surface, including the making of adhesive materials such as hydrogels.
    Type: Grant
    Filed: November 28, 2016
    Date of Patent: February 19, 2019
    Assignee: The Chinese University of Hong Kong
    Inventors: Liming Bian, Yang Xu, Kongchang Wei, Pengchao Zhao
  • Patent number: 9746774
    Abstract: A method for mitigating shot noise in extreme ultraviolet (EUV) lithography and patterning of photo-sensitized chemically-amplified resist (PS-CAR) is described. The method includes a first EUV patterned exposure to generate a photosensitizer and a second flood exposure at a wavelength different than the wavelength of the first EUV patterned exposure, to generate acid in regions exposed during the first EUV patterned exposure, wherein the photosensitizer acts to amplify acid generation and improve contrast. The resist may be exposed to heat, liquid solvent, solvent atmosphere, or a vacuum to mitigate the effects of EUV shot noise on photosensitizer concentration which may accrue during the first EUV patterned exposure.
    Type: Grant
    Filed: February 23, 2015
    Date of Patent: August 29, 2017
    Assignee: Tokyo Electron Limited
    Inventors: Michael A. Carcasi, Mark H. Somervell
  • Patent number: 9698070
    Abstract: In various embodiments, an arrangement is provided. The arrangement may include a plurality of chips; a chip carrier carrying the plurality of chips, the chip carrier including a chip carrier notch; and encapsulation material encapsulating the chip carrier and filling the chip carrier notch; wherein the outer circumference of the encapsulation material is free from a recess.
    Type: Grant
    Filed: April 11, 2013
    Date of Patent: July 4, 2017
    Assignee: Infineon Technologies AG
    Inventors: Michael Ledutke, Edward Fuergut
  • Patent number: 9465287
    Abstract: Methods of forming a pattern in a semiconductor device structure include deprotecting an outer portion of a first photosensitive resist material, forming a second photosensitive resist material, exposing portions of the first and second photosensitive resist materials to radiation, and removing the deprotected outer portion of the first photosensitive resist material and the exposed portions of the first and second photosensitive resist materials. Additional methods include forming a first resist material over a substrate to include a first portion and a relatively thicker second portion, deprotecting substantially the entire first portion and an outer portion of the second portion while leaving an inner portion of the second portion protected, and forming a second resist material over the substrate. A portion of the second resist material is exposed to radiation, and deprotected and exposed portions of the first and second resist materials are removed.
    Type: Grant
    Filed: October 30, 2015
    Date of Patent: October 11, 2016
    Assignee: Micron Technology, Inc.
    Inventors: Scott L. Light, Yuan He, Michael A. Many, Michael Hyatt
  • Patent number: 9406499
    Abstract: A semiconductor structure includes a wafer including a first surface and a periphery, a plurality of protrusions protruded from the first surface and a plurality of recesses spaced from each other by the plurality of protrusions, and each of the plurality of recesses is extended from the periphery of the wafer and is elongated across the first surface of the wafer.
    Type: Grant
    Filed: February 12, 2014
    Date of Patent: August 2, 2016
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chen-Chun Chen, Chiu-Jung Chen, Fu-Tsun Tsai, Shiu-Ko Jangjian, Chi-Cherng Jeng, Hsin-Chi Chen
  • Patent number: 9354510
    Abstract: An extreme ultraviolet (EUV) mask can be used in lithography, such as is used in the fabrication of a semiconductor wafer. The EUV mask includes a low thermal expansion material (LTEM) substrate and a reflective multilayer (ML) disposed thereon. A capping layer is disposed on the reflective ML and a patterned absorption layer disposed on the capping layer. The pattern includes an antireflection (ARC) type pattern.
    Type: Grant
    Filed: April 4, 2014
    Date of Patent: May 31, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ching-Fang Yu, Ting-Hao Hsu, Sheng-Chi Chin
  • Patent number: 9310698
    Abstract: A lithographic exposure process is performed on a substrate using a scanner. The scanner comprises several subsystems. There are errors in the overlay arising from the subsystems during the exposure. The overlay errors are measured using a scatterometer to obtain overlay measurements. Modeling is performed to separately determine from the overlay measurements different subsets of estimated model parameters, for example field distortion model parameters, scan/step direction model parameters and position/deformation model parameters. Each subset is related to overlay errors arising from a corresponding specific subsystem of the lithographic apparatus. Finally, the exposure is controlled in the scanner by controlling a specific subsystem of the scanner using its corresponding subset of estimated model parameters. This results in a product wafer being exposed with a well controlled overlay.
    Type: Grant
    Filed: January 24, 2011
    Date of Patent: April 12, 2016
    Assignee: ASML Netherlands B.V.
    Inventors: Boris Menchtchikov, Alexander Viktorovych Padiy
  • Patent number: 9278504
    Abstract: The present invention relates to a decorative film to be attached to an outside surface of a home appliance and a method for manufacturing the same, and more particularly, to a decorative film to be attached to an outside surface of a home appliance which is to be attached to an outside of a home appliance, such as a refrigerator, an air conditioner or a washing machine, replacing stainless steel panel etched to form a pattern to have metal feeling; and a method for manufacturing the same. The decorative film to be attached to an outside surface of a home appliance comprises a base layer, a pattern layer on a back side of the base layer, the pattern layer having a micro pattern, a metal layer on a back side of the pattern layer, and a protective layer of synthetic resin attached to a back side of the metal layer for protecting the metal layer.
    Type: Grant
    Filed: August 17, 2010
    Date of Patent: March 8, 2016
    Assignee: LG ELECTRONICS INC.
    Inventors: Hyun Woo Jun, Hyun Gi Jung, Min Ju Son
  • Patent number: 9235119
    Abstract: A method that forms a film of photoresist composition on a substrate and exposes a first and second region of the film to radiation through a first and second mask having a first and second image pattern, respectively. The photoresist composition includes a polymer comprising at least one acid labile group, a photosensitive acid generator capable of generating a first amount of acid upon exposure to a first dose of radiation and of generating a second amount of acid upon exposure to a second dose of radiation, and a photosensitive base generator capable of generating a first amount of base upon exposure to the first dose of radiation and of generating a second amount of base upon exposure to the second dose of radiation. The photosensitive acid generator includes (trifluoro-methylsulfonyloxy)-bicyclo[2.2.1]hept-5-ene-2,3-dicarboximide (MDT), N-hydroxy-naphthalimide dodecane sulfonate (DDSN), or a combination thereof. The photosensitive base generator includes a quaternary ammonium salt.
    Type: Grant
    Filed: August 12, 2014
    Date of Patent: January 12, 2016
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Kuang-Jung Chen, Wu-Song Huang, Ranee Wai-Ling Kwong, Sen Liu, Pushkara R. Varanasi
  • Patent number: 9217927
    Abstract: Provided is a method for fabricating a microstructure. The method includes disposing an X-ray mask on photosensitive material and exposing the photosensitive material by radiating X-rays to the photosensitive material, etching the exposed photosensitive material, forming a mold having a micro-pattern by filing the etched photosensitive material with metal, forming a mold module by combining a plurality of molds, and forming a microstructure using the mold module.
    Type: Grant
    Filed: November 2, 2009
    Date of Patent: December 22, 2015
    Assignee: POSTECH ACADEMY-INDUSTRY FOUNDATION
    Inventors: Bong-Kee Lee, Dong Sung Kim, Tai-Hun Kwon, Young Ok Lee
  • Patent number: 9122176
    Abstract: A method for fabricating a semiconductor device, includes dividing a pattern region of a desired pattern that is to be formed on a semiconductor substrate into a plurality of sub-regions; calculating combination condition including a shape of illumination light for transferring and a mask pattern obtained by correcting a partial pattern in the sub-region of the desired pattern formed on a mask used during transferring for each of the plurality of sub-regions, to make a dimension error of the partial pattern of each of the plurality of sub-regions smaller when transferred to the semiconductor substrate; and forming the desired pattern by making multiple exposures on the semiconductor substrate in such a way that the partial patterns of the sub-regions divided are sequentially transferred by transferring a pattern to the semiconductor substrate using the combination conditions calculated for each of the sub-regions.
    Type: Grant
    Filed: March 27, 2012
    Date of Patent: September 1, 2015
    Assignee: NuFlare Technology, Inc.
    Inventor: Takayuki Abe
  • Patent number: 9104833
    Abstract: A mask set for double exposure process and method of using said mask set. The mask set is provided with a first mask pattern having a first base and a plurality of first teeth and protruding portions, and a second mask pattern having a second base and a plurality of second teeth, wherein the second base may at least partially overlap the first base such that each of the protruding portions at least partially overlaps one of the second teeth.
    Type: Grant
    Filed: May 26, 2014
    Date of Patent: August 11, 2015
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Fang Kuo, Ming-Jui Chen, Ting-Cheng Tseng, Cheng-Te Wang
  • Patent number: 9017904
    Abstract: A method of providing a photolithography pattern can be provided by identifying at least one weak feature from among a plurality of features included in a photolithography pattern based on a feature parameter that is compared to a predetermined identification threshold value for the feature parameter. A first region of the weak feature can be classified as a first dosage region and a second region of the weak feature can be classified as a second dosage region. Related methods and apparatus are also disclosed.
    Type: Grant
    Filed: July 25, 2013
    Date of Patent: April 28, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jin Choi, Heung-Suk Oh, Sin-jeung Park, Rae-won Yi
  • Patent number: 9005854
    Abstract: A conductive pattern is formed using a reactive polymer comprising pendant tertiary alkyl ester groups, a compound that provides an acid upon exposure to radiation, and a crosslinking agent. A polymeric layer is patternwise exposed to form first exposed regions with a polymer comprising carboxylic acid groups that are contacted with electroless seed metal ions, and then contacted with a halide to form corresponding electroless seed metal halide. Another exposure converts electroless seed metal halide to electroless seed metal nuclei and forms second exposed regions. A reducing agent is used to develop the electroless seed metal nuclei in the second exposed regions, or to develop the electroless seed metal halide in the first exposed regions. Fixing is used to remove any remaining electroless seed metal halide. The electroless seed metal nuclei are then electrolessly plated in various exposed regions.
    Type: Grant
    Filed: November 5, 2013
    Date of Patent: April 14, 2015
    Assignee: Eastman Kodak Company
    Inventors: Mark Edward Irving, Thomas B. Brust
  • Patent number: 9005875
    Abstract: A method of fabricating a substrate including coating a first resist onto a hardmask, exposing regions of the first resist to electromagnetic radiation at a dose of 10.0 mJ/cm2 or greater and removing a portion of said the and forming guiding features. The method also includes etching the hardmask to form isolating features in the hardmask, applying a second resist within the isolating features forming regions of the second resist in the hardmask, and exposing regions of the second resist to electromagnetic radiation having a dose of less than 10.0 mJ/cm2 and forming elements.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: April 14, 2015
    Assignee: Intel Corporation
    Inventors: Robert L. Bristol, Paul A. Nyhus, Charles H. Wallace
  • Patent number: 8993217
    Abstract: Innovative techniques are disclosed for fabricating microelectronic devices using an alternating phase shift mask. Some embodiments of the invention encompass a double exposure technique that utilize high resolution line patterning such that two opaque lines intersect at an angle. After development, substantially circular images may be formed. In certain embodiments, high resolution disk imaging as small as 60 nm is possible.
    Type: Grant
    Filed: May 30, 2013
    Date of Patent: March 31, 2015
    Assignee: Western Digital (Fremont), LLC
    Inventors: Ling Wang, Dujiang Wan, Miao Wang, Hai Sun
  • Patent number: 8993224
    Abstract: One illustrative method disclosed herein involves identifying an overall target pattern comprised of at least one hole-type feature, decomposing the overall target pattern into at least a first sub-target pattern and a second sub-target pattern, wherein the first sub-target pattern and the second sub-target pattern each comprise at least one common hole-type feature, generating a first set of mask data information corresponding to the first sub-target pattern, and generating a second set of mask data information corresponding to the second sub-target pattern.
    Type: Grant
    Filed: May 23, 2014
    Date of Patent: March 31, 2015
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Yuyang Sun, Norman S. Chen, Jian Liu
  • Patent number: 8986554
    Abstract: A method of forming patterns includes forming a photoresist film on a substrate. The photoresist film is exposed with a first dose of light to form a first area and a second area in the photoresist film. A first hole and a second hole are formed by removing the first area and the second area with a first developer. The photoresist film is re-exposed with a second dose of the light to form a third area in the photoresist film between the first hole and the second hole. A third hole is formed between the first hole and the second hole by removing the third area with a second developer.
    Type: Grant
    Filed: December 19, 2012
    Date of Patent: March 24, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Eun-sung Kim, Kyoung-seon Kim, Jae-woo Nam, Chul-ho Shin, Shi-young Yi
  • Patent number: 8980540
    Abstract: A solid-state image sensor is manufactured through a plurality of photolithography processes. The plurality of photolithography processes includes at least one first lithography process including a dividing exposure step of exposing a substrate using a plurality of photomasks, and at least one second lithography process including a non-dividing exposure step of exposing the substrate using one photomask. The at least one first lithography process includes a process for forming a resist pattern to define active regions on the substrate, and a process for forming a resist pattern to define charge accumulation region.
    Type: Grant
    Filed: February 21, 2013
    Date of Patent: March 17, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventor: Hideomi Kumano
  • Patent number: 8974683
    Abstract: A method of reducing roughness in an opening in a surface of a resist material disposed on a substrate, comprises generating a plasma having a plasma sheath and ions therein. The method also includes modifying a shape of a boundary defined between the plasma and the plasma sheath with a plasma sheath modifier so that a portion of the boundary facing the resist material is not parallel to a plane defined by the surface of the substrate. The method also includes providing a first exposure of ions while the substrate is in a first position, the first exposure comprising ions accelerated across the boundary having the modified shape toward the resist material over an angular range with respect to the surface of the substrate.
    Type: Grant
    Filed: September 9, 2011
    Date of Patent: March 10, 2015
    Inventors: Ludovic Godet, Patrick M. Martin, Joseph C. Olson, Andrew J. Hornak
  • Patent number: 8956791
    Abstract: According to one embodiment, an exposure tolerance estimation method is disclosed. The method can include setting a plurality of regions along a first surface of a substrate. The method can form a plurality of patterns for estimation by performing exposure on each of the regions using at least three levels of exposure condition using an exposure mask. The method can measure dimensions of the patterns for estimation and find relationships between the exposure condition and the dimensions. The method can select a first region from the regions. In the first region, a first dimension of a first pattern for estimation formed by exposure using a first exposure condition of an intermediate level out of the at least three levels falls within a previously set range. In addition, the method can calculate an exposure tolerance from a relationship between the first exposure condition and the first dimension.
    Type: Grant
    Filed: September 16, 2013
    Date of Patent: February 17, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Osamu Yamane, Kazuyuki Masukawa, Yasunobu Kai
  • Patent number: 8945811
    Abstract: A system and method for forming encoded microparticles is described. One embodiment includes an encoded microparticle, the microparticle comprising a plurality of segments aligned along an axis, wherein the plurality of segments define a code for the microparticle; and an outer cuboid encapsulating the plurality of segments, wherein the plurality of segments are detectable through the outer cuboid.
    Type: Grant
    Filed: February 6, 2013
    Date of Patent: February 3, 2015
    Assignee: Affymetrix, Inc.
    Inventor: Randall J. True
  • Patent number: 8945797
    Abstract: A mask, a pattern disposing method thereof and an exposing method thereof are provided. A plurality of geometric patterns are arranged on the mask along a plurality of columns. The arrangement of the patterns arranged along odd columns is similar to that of the patterns arranged along even columns. Two odd columns or two even columns are selected to be a first edge column and a second edge column respectively. At each corresponding position of the first edge column and the second edge column, only one of the first edge column and the second edge column is selected to be disposed one geometric pattern.
    Type: Grant
    Filed: January 16, 2013
    Date of Patent: February 3, 2015
    Assignee: Macronix International Co., Ltd.
    Inventors: Shih-Rung Wu, Shao-Wei Hsieh
  • Patent number: 8945800
    Abstract: In a multiple patterning techniques, where two or more exposures are used to form a single layer of a device, the splitting of features in a single layer between the multiple exposures is carried out additionally with reference to features of another associated layer and the splitting of that layer into two or more sets of features for separate exposure. The multiple exposure process can be a process involving repeated litho-etch steps desirably, the alignment scheme utilized during exposure of the split layers is optimized with reference to the splitting approach.
    Type: Grant
    Filed: August 12, 2013
    Date of Patent: February 3, 2015
    Assignee: ASML Netherlands B.V.
    Inventors: Tsann-Bim Chiou, Mircea Dusa, Alek Chi-Heng Chen
  • Patent number: 8932785
    Abstract: An EUV mask set and method of manufacturing is disclosed. In one embodiment, a set of EUV mask blanks is inspected to obtain information about defects in each of the EUV mask blanks. From the obtained information, a set of complementary functional portions is determined, wherein each functional portion is assigned to one of the EUV mask blanks and does not contain any of the defects. The functional portions of the EUV mask blanks of the EUV mask blank set complement one another to form a virtual image area corresponding in size to image areas of the EUV mask blanks. A predefined mask pattern is provided on the EUV mask blanks. Information identifying position and shape of the functional portions is used to control an illumination process for imaging the predefined mask pattern onto a target.
    Type: Grant
    Filed: October 16, 2012
    Date of Patent: January 13, 2015
    Assignee: Advanced Mask Technology Center GmbH & Co. KG
    Inventor: Clemens Utzny
  • Patent number: 8927198
    Abstract: A two-dimensional dense array of contact holes can be printed on a negative photoresist employing a combination of a quadrupole illumination lens and a lithographic mask including a criss-cross pattern of opaque lines. The openings in the quadrupole illumination lens are aligned along the perpendicular directions of the opaque lines. Discrete contact holes can be printed on a negative photoresist employing a combination of a quadrupole illumination lens and a lithographic mask including a criss-cross pattern of opaque subresolution assist features and discrete opaque cross patterns. Alternately, a two-dimensional array of contact holes can be printed on a negative photoresist employing a quadrupole illumination lens and a checkerboard pattern of openings. The openings in the quadrupole illumination lens are in diagonal directions.
    Type: Grant
    Filed: January 15, 2013
    Date of Patent: January 6, 2015
    Assignee: International Business Machines Corporation
    Inventors: Martin Burkhardt, Yongan Xu
  • Patent number: 8927200
    Abstract: A double patterning method includes providing a first resist film on a substrate using a first photoresist composition. The first resist film is exposed. The exposed first resist film is developed using a first developer to form a first resist pattern. A second resist film is provided in at least space areas of the first resist pattern using a second photoresist composition. The second resist film is exposed. The exposed second resist film is developed using a second developer that includes an organic solvent to form a second resist pattern. The first resist pattern is insoluble or scarcely soluble in the second developer.
    Type: Grant
    Filed: October 22, 2013
    Date of Patent: January 6, 2015
    Assignee: JSR Corporation
    Inventors: Kanako Meya, Takeo Shioya, Motoyuki Shima
  • Patent number: 8911920
    Abstract: A method for fabricating integrated circuits includes fabricating an EUV mask by providing a photomask having a border region. A photoresist is formed over the photomask and has a border region overlying the border region of the photomask. The method exposes an inner portion and an outer portion of the photoresist border region. The method removes the inner portion and the outer portion to expose the border region of the photomask. The border region of the photomask is etched using the photoresist as a mask to form the EUV mask with a non-reflective border. The photoresist is removed from the EUV mask. The method includes forming another photoresist over a partially-fabricated integrated circuit layer and patterning the photoresist by exposure to EUV light reflected from the EUV mask to expose portions of the partially-fabricated integrated circuit layer. Portions of the partially-fabricated integrated circuit layer and the photoresist are removed.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: December 16, 2014
    Assignee: GlobalFoundries, Inc.
    Inventors: Sudharshanan Raghunathan, Pawitter Mangat, Hui Peng Koh
  • Patent number: 8900776
    Abstract: An embodiment of the disclosed technology provides a mask plate for photolithography process comprising a first pattern region, a second pattern region having a different exposure level from that of the first pattern region, and a redundant pattern provided between the first pattern region and the second pattern region, wherein the redundant pattern is configured for forming a redundant photoresist pattern so as to prevent developer diffusion at different concentrations across the photoresist redundant pattern.
    Type: Grant
    Filed: January 11, 2012
    Date of Patent: December 2, 2014
    Assignee: Boe Technology Group Co., Ltd.
    Inventors: Guanbao Hui, Seungjin Choi, Feng Zhang, Jianshe Xue
  • Patent number: 8895211
    Abstract: A mask is disclosed which includes a plurality of first phase shift regions disposed on a first side of the mask, and a plurality of second phase shift regions disposed on a second side of the mask. The first phase shift regions and second phase shift regions may be alternating phase shift regions in which phase shift of the first phase shift regions is out of phase, for instance by 180 degrees, from phase shift of the second phase shift regions. A method for forming the mask, and a semiconductor device fabrication method using the mask is also disclosed.
    Type: Grant
    Filed: December 11, 2012
    Date of Patent: November 25, 2014
    Assignee: GLOBALFOUNDRIES, Inc.
    Inventors: Guoxiang Ning, Chunyu Wong, Paul Ackmann, Sarasvathi Thangaraju
  • Patent number: 8889337
    Abstract: Such a film forming method is provided that can prevent peeling of surface films including a resist film from a substrate during immersion exposure. The film forming method includes the steps of forming surface films including a resist film and a protective film covering the resist film over a surface of a wafer, and forming an edge cap film by supplying an edge cap film material to at least a boundary portion including a periphery of the wafer and peripheries of the surface films such as the protective film.
    Type: Grant
    Filed: November 2, 2007
    Date of Patent: November 18, 2014
    Assignee: Tokyo Electron Limited
    Inventors: Hitoshi Kosugi, Taro Yamamoto, Yoshiaki Yamada, Yasuhito Saiga
  • Patent number: 8883393
    Abstract: The invention relates to an imaging element and a method of using the imaging element to form a recording element. The imaging element includes a composition sensitive to actinic radiation at a first wavelength and a photoluminescent tag that is responsive to radiation at a second wavelength different from the first wavelength. The photoluminescent tag can be used to authenticate the identity of the element, provide information about the element, and/or to establish one or more conditions in a device used to prepare the recording element from the imaging element.
    Type: Grant
    Filed: December 9, 2009
    Date of Patent: November 11, 2014
    Assignee: E I du Pont de Nemours and Company
    Inventor: Anandkumar R. Kannurpatti
  • Patent number: RE49180
    Abstract: A method of forming a three-dimensional object is carried out by: providing a carrier and a pool of immiscible liquid, the pool having a liquid build surface, the carrier and the liquid build surface defining a build region therebetween; filling the build region with a polymerizable liquid, wherein the immiscible liquid is immiscible with the polymerizable liquid (in some embodiments wherein the immiscible liquid has a density greater than the polymerizable liquid); irradiating the build region through at least a portion of the pool of immiscible liquid to form a solid polymer from the polymerizable liquid and advancing the carrier away from the liquid build surface to form the three-dimensional object comprised of the solid polymer from the polymerizable liquid.
    Type: Grant
    Filed: November 6, 2019
    Date of Patent: August 23, 2022
    Assignee: Carbon, Inc.
    Inventors: Lloyd M. Robeson, Edward T. Samulski, Alexander Ermoshkin, Joseph M. DeSimone