Plural Exposure Steps Patents (Class 430/394)
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Patent number: 8339614Abstract: A method of measuring shot shape includes sequentially exposing a substrate with main scale marks (32) in compliance with a predetermined map, and forming a reference grid including a plurality of the main scale marks (32) arranged in the predetermined map in at least one shot region, exposing a shot for measuring, via a projection optical system, that includes a plurality of auxiliary scale marks (34) arranged in the predetermined map in the shot region, measuring a relative positional relationship between adjacent main scale marks (32), measuring an amount of deviation between the main scale marks (32) and the auxiliary scale marks (34), and correcting the reference grid based on the relative positional relationship, and calculating a shot shape of the shot for measuring based on the corrected reference grid and the amount of deviation.Type: GrantFiled: March 23, 2006Date of Patent: December 25, 2012Assignee: Nikon CorporationInventor: Shinjiro Kondo
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Patent number: 8329381Abstract: A pattern forming method includes providing a first mask with a first aperture, forming a first transfer pattern on a resist by irradiating a first electron beam through the first aperture, the first transfer pattern extending in a first direction and having a boundary along a circumference thereof, and the first electron beam having a cross section of a first square when emerging from the first aperture, and forming a second transfer pattern on the resist by irradiating a second electron beam through the first aperture, the second transfer pattern extending in the first direction and overlapping a portion the boundary of the first transfer pattern, and the second electron beam having a cross section of a second square when emerging from the first aperture.Type: GrantFiled: February 17, 2012Date of Patent: December 11, 2012Assignee: Samsung Electronics Co., Ltd.Inventors: Jin Choi, Byung-Gook Kim, Hee-Bom Kim, Sang-Hee Lee
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Patent number: 8323855Abstract: A pellicle is provided to one end surface of end surfaces of a frame. Another end surface of the end surfaces of the frame has an area that opposes a substrate. A configuration is adopted that prevents the deformation of the one end surface of the frame and the shape of the opposing area on the other end surface from affecting one another.Type: GrantFiled: February 29, 2008Date of Patent: December 4, 2012Assignee: Nikon CorporationInventors: Tomoki Miyakawa, Hiromitsu Yoshimoto
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Patent number: 8318392Abstract: An alignment method is disclosed, in which a distance between a substrate and a photomask is set at a predetermined exposure gap. The photomask is rectangular, and includes a first side, and a second side opposite to the first side. A distance between a midpoint of the first side and the substrate is matched with the exposure gap. The photomask is rotated about, as an axis, a line that connects the midpoint of the first side and a midpoint of the second side to each other, whereby distances between both ends of the first side and the substrate are individually matched with the exposure gap. The photomask is rotated about the first side taken as an axis, whereby a distance between the midpoint of the second side and the substrate is matched with the exposure gap.Type: GrantFiled: February 28, 2011Date of Patent: November 27, 2012Assignee: Panasonic CorporationInventors: Ryota Hamada, Tomohiro Murakoso
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Patent number: 8309282Abstract: An apparatus and method for aligning a mask that includes disposing and firstly aligning a mask over a first substrate, with a space interposed therebetween, bringing the mask into contact with the first substrate and then measuring the alignment state of the mask with respect to the first substrate to detect an alignment error, secondly aligning the mask with respect to the first substrate based on the alignment error, transferring the first substrate to the next process, disposing and thirdly aligning the mask over a second substrate with the space interposed therebetween, and bringing the mask into contact with the second substrate.Type: GrantFiled: September 13, 2010Date of Patent: November 13, 2012Assignee: Samsung Display Co., Ltd.Inventors: Kyung-Hoon Chung, Hyung-Min Kim
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Patent number: 8309297Abstract: A method of lithographically patterning a substrate that has photoresist having removal areas and non-removal areas includes first exposing at least the non-removal areas to radiation effective to increase outer surface roughness of the photoresist in the non-removal areas at least post-develop but ineffective to change photoresist solubility in a developer for the photoresist to be cleared from the non-removal areas upon develop with the developer. Second exposing of radiation to the removal areas is conducted to be effective to change photoresist solubility in the developer for the photoresist to be cleared from the removal areas upon develop with the developer. The photoresist is developed with the developer effective to clear photoresist from the removal areas and to leave photoresist in the non-removal areas that has outer surface roughness in the non-removal areas which is greater than that before the first exposing. Other implementations and embodiments are contemplated.Type: GrantFiled: October 5, 2007Date of Patent: November 13, 2012Assignee: Micron Technology, Inc.Inventors: Yoshiki Hishiro, Scott Sills, Hiroyuki Mori, Troy Gugel, Paul D. Shirley, Lijing Gou, Adam Olson
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Patent number: 8304176Abstract: Provided is a method of manufacturing a liquid ejection head, the liquid ejection head including: a substrate having an energy generating element that generates energy for ejecting liquid; and a flow path forming member having, on an upper side of the energy generating element, an ejection orifice for ejecting the liquid and a bubble generating chamber communicated with the ejection orifice, the method including: preparing a negative photosensitive resin as a material constituting the flow path forming member; and performing first exposure treatment for forming a first image constituting a side wall of the bubble generating chamber and second exposure treatment for forming a second image constituting a side wall of the ejection orifice so that a side wall of the first image and a side wall of the second image cross each other diagonally.Type: GrantFiled: August 2, 2011Date of Patent: November 6, 2012Assignee: Canon Kabushiki KaishaInventor: Isamu Horiuchi
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Patent number: 8304180Abstract: Improved complementary phase shift mask (c:PSM) imaging techniques are described, including a method in which scattering bars are provided on the trim mask in order to allow better CD uniformity to be achieved in the double exposure process. The number, size and position of the scattering bars can be optimised to achieve a desired isofocal CD and/or a desired level of sensitivity of the CD to trim exposure energy used in the second exposure step of the c:PSM process. The trim exposure dose can be regulated, and/or the trim width used on the trim mask can be optimised, to compensate for iso-dense bias so as to achieve optical proximity correction.Type: GrantFiled: September 14, 2004Date of Patent: November 6, 2012Assignee: ASML Netherlands B.V.Inventors: Koen Van Ingen Schenau, Johannes Henricus Maria Linders
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Patent number: 8304173Abstract: The method of forming a pattern includes forming a first photosensitive layer pattern including a first pattern in a first region of a substrate and a second pattern in a second region of the substrate, by performing a first photolithography process using a photomask having a first mask region and a second mask region. The first pattern is transferred from the first mask region, and the second pattern is transferred from the second mask region. The method further includes forming a second photosensitive layer pattern including a third pattern in the second region of the substrate and a fourth pattern in the first region of the substrate, by performing a second photolithography process using the photomask. The third pattern is transferred from the first mask region, and the fourth pattern is transferred from the second mask region.Type: GrantFiled: July 30, 2010Date of Patent: November 6, 2012Assignee: Samsung Electronics Co., Ltd.Inventors: Sang-Yong Yu, Sung-Hyuck Kim, Gi-Sung Yoon
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Patent number: 8298732Abstract: An exposure method includes generating a reticle exposure pattern based on a target pattern, performing a lithography simulation based on the reticle exposure pattern to generate a simulation pattern that simulates a resist pattern formed by reticle exposure, generating differential data between the target pattern and the simulation pattern, generating a first electron-beam exposure pattern based on the differential data, generating a reticle based on the reticle exposure pattern, performing an optical exposure process with respect to a resist by use of the reticle, and performing an electron-beam exposure process with respect to the resist based on the first electron-beam exposure pattern.Type: GrantFiled: January 31, 2011Date of Patent: October 30, 2012Assignee: Fujitsu Semiconductor LimitedInventors: Masahiko Minemura, Seiji Makino, Kanji Takeuchi, Noboru Sugiyama, Kozo Ogino
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Patent number: 8293460Abstract: Methods to pattern features in a substrate layer by exposing a photoresist layer more than once. In one embodiment, a single reticle may be exposed more than once with an overlay offset implemented between successive exposures to reduce the half pitch of the reticle. In particular embodiments, these methods may be employed to reduce the half pitch of the features printed with 65 nm generation lithography equipment to achieve 45 nm lithography generation CD and pitch performance.Type: GrantFiled: December 19, 2008Date of Patent: October 23, 2012Assignee: Applied Materials, Inc.Inventors: Hui W. Chen, Chorng-Ping Chang, Yongmei Chen, Huixiong Dai, Jiahua Yu, Susie X. Yang, Xumou Xu, Christopher D. Bencher, Raymond Hoiman Hung, Michael P. Duane, Christopher Siu Wing Ngai, Jen Shu, Kenneth MacWilliams
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Patent number: 8288081Abstract: The present disclosure provides a method of making a mask. The method includes providing a substrate having a first attenuating layer on the substrate and a first imaging layer on the first attenuating layer; performing a first exposure to the first imaging layer using a first radiation energy in writing mode; performing a first etching to the first attenuating layer; performing a second etching to the substrate; forming a second imaging layer on the first attenuating layer and the substrate; performing a second exposure to the second imaging layer using a light energy and another mask; and performing a third etching to the first attenuating layer after the second exposure.Type: GrantFiled: April 2, 2007Date of Patent: October 16, 2012Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chih-Ming Chen, Ya-Ping Tseng, Ming-Tao Ho
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Patent number: 8283110Abstract: A method for fabricating an image sensor device is disclosed. The method for fabricating an image sensor device comprises forming a photosensitive layer on a substrate. The photosensitive layer is exposed through a first photomask to form an exposed portion and an unexposed portion. The unexposed portion is partially exposed through a second photomask to form a trimmed part, wherein the second photomask comprise a first segment and a second segment that has a transmittance greater than that of the first segment. The trimmed part is removed to form photosensitive structures. The photosensitive structures are reflowed to form a first microlens and a second microlens having different heights.Type: GrantFiled: June 16, 2010Date of Patent: October 9, 2012Assignee: VisEra Technologies Company LimitedInventors: Ming-Sheng Yang, Ya-Yun Yu
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Patent number: 8278026Abstract: A method for improving the efficiency of the electron-beam exposure is provided, comprising: step 1) coating a positive photoresist on a wafer to be processed, and performing a pre-baking; step 2) separating pattern data, optically exposing a group of relatively large patterns, and then performing a post-baking; step 3) developing the positive photoresist; step 4) performing a plasma fluorination; step 5) performing a baking to solidify the photoresist; step 6) coating a negative electron-beam resist and performing a pre-baking; step 7) electron-beam exposing a group of fine patterns; step 8) performing a post-baking; and step 9) developing the negative electron-beam resist, so that the fabrication of the patterns is finished. According to the invention, it is possible to save 30-60% of the exposure time. Thus, the exposure efficiency is significantly improved, and the cost is greatly reduced. Further, the method is totally compatible with the CMOS processes, without the need of any special equipments.Type: GrantFiled: February 15, 2011Date of Patent: October 2, 2012Assignee: Institute of Microelectronics, Chinese Academy of SciencesInventors: Qiuxia Xu, Gaobo Xu
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Patent number: 8273506Abstract: A manufacturing method of an optical element is provided, the optical element comprising: a shield part formed by a light shielding film formed and patterned on a substrate; a light transmission part formed by partially exposing a surface of the substrate; and a phase shifter part formed by partially etching the surface of the substrate, the method comprising the steps of: preparing an optical element blank with the light shielding film and a first resist film laminated on the substrate in this order; and forming a first resist pattern by applying drawing and development to the first resist film, covering a formation scheduled area of the shield part, and demarcating the formation scheduled area of the phase shifter part.Type: GrantFiled: March 5, 2010Date of Patent: September 25, 2012Assignee: Hoya CorporationInventors: Kazuhide Yamashiro, Hideki Suda
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Patent number: 8268537Abstract: A printed circuit board substrate includes a metal-clad substrate and a number of N spaced circuit substrates arranged on the metal-clad substrate along an imaginary circle, N is a natural number greater than 2. The circuit substrates are equiangularly arranged about the center of the circle, and each of the circuit substrates is oriented 360/N degrees with respect to a neighboring printed circuit board.Type: GrantFiled: December 10, 2008Date of Patent: September 18, 2012Assignee: Zhen Ding Technology Co., Ltd.Inventors: Pai-Hung Huang, Chih-Kang Yang, Cheng-Hsien Lin
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Patent number: 8268542Abstract: A method suitable for reducing side lobe printing in a photolithography process is enabled by the use of a barrier layer on top of a photoresist on a substrate. The barrier layer is absorbing at the imaging wavelength of the underlying photoresist and thus blocks the light from reaching the photoresist. A first exposure followed by a development in an aqueous base solution selectively removes a portion of the barrier layer to reveal a section of the underlying photoresist layer. At least a portion of the revealed section of the photoresist layer is then exposed and developed to form a patterned structure in the photoresist layer. The barrier layer can also be bleachable upon exposure and bake in the present invention.Type: GrantFiled: December 3, 2007Date of Patent: September 18, 2012Assignee: International Business Machines CorporationInventors: Kuang-Jung Chen, Wu-Song Huang, Wai-kin Li
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Patent number: 8268517Abstract: A photolithographic mask set for creating a plurality of characters on a device includes a plurality of photolithographic masks, wherein each mask includes at least one mask character area and at least one mask character field area that surrounds said mask character area; wherein each said mask character field area has a radiation energy density transmission factor Tf that is greater than zero, and wherein each mask character area has a radiation energy density transmission factor Tc that is greater than zero, such that each mask character field area and each mask character area of each mask is not opaque.Type: GrantFiled: March 1, 2011Date of Patent: September 18, 2012Assignee: Hitachi Global Storage Technologies Netherlands B.V.Inventors: Mary Kathryn Gutberlet, Rambod Nader, Michael Andrew Parker, Douglas Johnson Werner
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Patent number: 8263322Abstract: A method of forming a resist pattern that includes: applying a positive chemically amplified resist composition to a support to form a first resist film, exposing a region on a portion of the first resist film, performing a post exposure bake treatment and then performing developing to form a first resist pattern, and applying a negative chemically amplified resist composition to the support having the first resist pattern formed thereon, thereby forming a second resist film, exposing a region of the second resist film that includes the positions in which the first resist pattern has been formed, performing a post exposure bake treatment at a bake temperature that increases the solubility of the first resist film in an alkali developing solution and decreases the solubility of the second resist film in an alkali developing solution, and then performing developing to form a resist pattern.Type: GrantFiled: September 29, 2009Date of Patent: September 11, 2012Assignee: Tokyo Ohka Kogyo Co., Ltd.Inventor: Tomoyuki Ando
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Patent number: 8257902Abstract: New photoresist compositions are provided that are useful for immersion lithography. Preferred photoresist compositions of the invention comprises two or more distinct materials that can be substantially non-mixable with a resin component of the resist. Particularly preferred photoresists of the invention can exhibit reduced leaching of resist materials into an immersion fluid contacting the resist layer during immersion lithography processing.Type: GrantFiled: November 5, 2008Date of Patent: September 4, 2012Inventors: Deyan Wang, Cheng-Bai Xu, George G. Barclay
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Patent number: 8252491Abstract: A marker, for example an alignment marker or an overlay marker is formed in two steps. First, a pattern of two chemically distinct feature types having a pitch comparable to product features is formed. This pattern is then masked by resist in the form of the desired marker, which has a larger pitch than the pattern. Finally, one of the two feature types is selectively etched in the open areas. The result is a marker with a large pitch suitable to be read with long wavelength radiation but the edges of the features are defined in an exposure step having a pitch comparable to the product features.Type: GrantFiled: November 17, 2009Date of Patent: August 28, 2012Assignee: ASML Netherlands B.V.Inventors: Richard Johannes Franciscus Van Haren, Maurits Van Der Schaar
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Patent number: 8247166Abstract: A double pattern is formed by coating a first positive resist composition onto a substrate, patternwise exposure to radiation, and development with alkaline developer to form a first resist pattern; applying heat and/or radiation to render the first resist pattern insoluble in a second solvent and in a second developer; coating a second resist composition on the first resist pattern, patternwise exposure to radiation, and development with second developer to form a second resist pattern. The resin in the first resist composition comprises recurring units of formula (1) wherein R1 is H, CH3 or CF3, m=1 or 2, n=0 or 1.Type: GrantFiled: August 28, 2009Date of Patent: August 21, 2012Assignee: Shin-Etsu Chemical Co., Ltd.Inventors: Katsuya Takemura, Tsunehiro Nishi, Jun Hatakeyama, Masaki Ohashi, Takeshi Kinsho
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Patent number: 8247164Abstract: The method prepares a substrate provided thereon with a first resist film having a first pattern of first pillars spaced at intervals, the pillars having a first height, and forms a second resist film on the substrate. The second resist film is formed by alternately performing, each at least twice, applying of a resist solution to the substrate such that at least the spaces between adjacent first pillars are filled with a resist solution having a thickness smaller than the first height, and by heat-treating of the substrate to solidify the resist solution thus applied, thereby forming a resist layer, whereby the spaces between the adjacent first pillars are filled with resist layers, as the second resist film, having a total thickness at least approximately equal to the first height.Type: GrantFiled: May 19, 2010Date of Patent: August 21, 2012Assignee: Tokyo Electron LimitedInventor: Takahisa Otsuka
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Patent number: 8241838Abstract: A method of manufacturing a semiconductor device includes the following processes. A first resist layer covering an etching object is patterned to form a first resist pattern. Then, a filling layer that covers the first resist pattern and has a flat upper surface is formed. Then, a second resist layer covering the flat upper surface is patterned to from a second resist pattern.Type: GrantFiled: August 21, 2009Date of Patent: August 14, 2012Assignee: Elpida Memory, Inc.Inventor: Hiroshi Yoshino
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Patent number: 8239789Abstract: A system and method is provided which predicts problematic areas for lithography in a circuit design, and more specifically, which uses modeling data from a modeling tool to accurately predict problematic lithographic areas. The method includes identifying surface heights of plurality of tiles of a modeled wafer, and mathematically mimicking a lithographic tool to determine best planes of focus for exposure for the plurality of tiles.Type: GrantFiled: April 5, 2011Date of Patent: August 7, 2012Assignee: International Business Machines CorporationInventors: Timothy A. Brunner, Stephen E. Greco, Bernhard R. Liegl, Hua Xiang
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Patent number: 8236483Abstract: A method of forming a resist pattern including: forming a resist film on a substrate using a chemically amplified negative resist composition; forming a latent image of a first line and space pattern by subjecting the resist film to first exposure through a photomask; forming a latent image of a second line and space pattern so as to intersect with the latent image of the first line and space pattern by subjecting the resist film to second exposure through a photomask; and subjecting the resist film to developing to form a hole pattern in the resist film.Type: GrantFiled: July 31, 2009Date of Patent: August 7, 2012Assignee: Tokyo Ohka Kogyo Co., Ltd.Inventors: Tomoyuki Ando, Sho Abe, Ryoji Watanabe, Komei Hirahara
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Patent number: 8233136Abstract: The present invention provides a method and an apparatus for generating periodic patterns by step-and-align interference lithography, wherein at least two coherent light beams with a pattern are controlled to project onto a substrate to be exposed to form an interference-patterned region on the substrate. Thereafter, by means of moving the substrate or the light beams stepwisely, a patterned region with a large area can be formed on the substrate. According to the present invention, the optical path and exposure time may be shortened to reduce defect formation during lithographic processing and to improve the yield.Type: GrantFiled: November 9, 2007Date of Patent: July 31, 2012Assignee: Industrial Technology Research InstituteInventors: Lon Wang, Yung-Pin Chen, Chih-Sheng Jao, Shuo-Hung Chang, Jer-Haur Chang
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Patent number: 8227177Abstract: The invention relates to a method with contrast reversal which, inter alia, opens up new areas of application for resists.Type: GrantFiled: May 10, 2007Date of Patent: July 24, 2012Assignee: Infineon Technologies AGInventors: Kang-Hoon Choi, Klaus Elian, Christoph Hohle, Johannes Kretz, Frank Thrum
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Patent number: 8227150Abstract: A hologram reticle and method of patterning a target. A layout pattern for an image to be transferred to a target is converted into a holographic representation of the image. A hologram reticle is manufactured that includes the holographic representation. The hologram reticle is then used to pattern the target. Three-dimensional patterns may be formed in a photoresist layer of the target in a single patterning step. These three-dimensional patterns may be filled to form three-dimensional structures or else used in a multi-surface imaging composition. The holographic representation of the image may also be transferred to a top photoresist layer of a top surface imaging (TSI) semiconductor device, either directly or using the hologram reticle. The top photoresist layer may then be used to pattern an underlying photoresist layer with the image. The lower photoresist layer is used to pattern a material layer of the device.Type: GrantFiled: April 27, 2010Date of Patent: July 24, 2012Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Shih-Ming Chang, Chung-Hsing Chang, Wen-Chuan Wang, Chi-Lun Lu, Sheng-Chi Chin, Chin-Hsiang Lin, Chun-Kuang Chen
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Patent number: 8227178Abstract: A method for manufacturing a planar optical waveguide device including a core of which a top face is provided with a groove section filled with a groove section filler made of a low refractive index material having a refractive index lower than that of the core, the method including; a first high refractive index material layer forming step of forming a high refractive index material layer; a low refractive index material layer forming step of forming a low refractive index material layer made of the low refractive index material on the high refractive index material layer; a groove section filler forming step of forming the groove section filler by trimming both lateral portions of the low refractive index material layer; and a second high refractive index material layer forming step of forming a high refractive index material layer so as to fill the both sides of the lateral portions of the groove section filler.Type: GrantFiled: August 25, 2009Date of Patent: July 24, 2012Assignees: Fujikura Ltd., Agency for Science, Technology and ResearchInventors: Ken Sakuma, Kensuke Ogawa, Kazuhiro Goi, Yong Tsong Tan, Ning Guan, Mingbin Yu, Hwee Gee Teo, Guo-Qiang Lo
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Patent number: 8229062Abstract: A system and method to compensate for the proximity effects in the imaging of patterns in a photolithography process. A light exposure of a photoresist layer is effectuated in predetermined patterns through an exposure mask having light-transmissive openings in correspondence to the predetermined patterns. The exposure mask has areas densely populated with the light-transmissive openings and areas sparsely populated with the light-transmissive openings. Light is attenuated through the densely populated light-transmissive openings by a different amount than through the sparsely populated light-transmissive openings.Type: GrantFiled: August 25, 2010Date of Patent: July 24, 2012Assignees: Infineon Technologies AG, United Microelectronics, CoInventors: Hang Yip Liu, Sebastian Schmidt, Benjamin Szu-Min Lin
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Patent number: 8221943Abstract: A photomask for exposure of a semiconductor wafer using dipole illumination and method of manufacturing the same is disclosed. A method of forming a pattern on a semiconductor using the photomask is also disclosed. The photomask may have an array of islands that are used for printing lines using dipole illumination. The photomask may have sub-resolution assist features (SRAF) to assist in printing the lines. The SRAF may include an array of holes.Type: GrantFiled: March 22, 2010Date of Patent: July 17, 2012Assignee: SanDisk Technologies Inc.Inventors: Chun-Ming Wang, Chen-Che Huang, Masaaki Higashitani
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Patent number: 8216765Abstract: The present disclosure provides a reusable and reimageable medium including a substrate coated with a photochromic polymer. The photochromic polymer has a glass transition temperature ranging from 30° C. to 150° C., such as from about 30° C. to about 100° C., and the coated substrate converts to a colored state when both UV light and temperatures ranging from 30° C. up to 100° C. are applied to the coated substrate. The present disclosure also provides a method for producing and using the reusable and reimageable medium.Type: GrantFiled: March 9, 2009Date of Patent: July 10, 2012Assignee: Xerox CorporationInventors: Kentaro Morimitsu, Tyler Norsten, Gabriel Iftime, Peter M. Kazmaier, Guerino Sacripante
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Patent number: 8211624Abstract: A pattern forming method includes (1) selectively exposing a first resist layer, and developing the exposed first resist layer to form a first pattern, (2) applying a resin composition containing a hydroxyl group-containing resin and a solvent to the first pattern, baking the applied resin composition, and developing the baked resin composition to form a second pattern, the hydroxyl group-containing resin becoming insoluble or scarcely soluble in a developer when baked, and (3) totally or selectively exposing the second pattern to make the second pattern partly soluble in the developer, and developing the exposed second pattern to form a third pattern in which at least a hole or a groove is formed in the second pattern.Type: GrantFiled: May 21, 2008Date of Patent: July 3, 2012Assignee: JSR CorporationInventors: Atsushi Nakamura, Tsutomu Shimokawa, Junichi Takahashi, Takayoshi Abe, Tomoki Nagai, Tomohiro Kakizawa
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Patent number: 8206895Abstract: According to an aspect of the present invention, there is provided a method for forming a pattern including: applying a photosensitive resin onto a film on a wafer substrate; partly exposing the photosensitive resin to light and developing the photosensitive resin to form a first pattern having an opening portion; applying a photo-curable material onto the film exposed by the opening portion of the first pattern; bringing one face of an optically-transmissive template having a second pattern formed on the one face into contact with the photo-curable material, the second pattern including projections and reentrants; irradiating the photo-curable material with light; and separating the template from the photo-curable material.Type: GrantFiled: July 24, 2008Date of Patent: June 26, 2012Assignee: Kabushiki Kaisha ToshibaInventors: Ikuo Yoneda, Shunko Magoshi
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Patent number: 8202682Abstract: A method of manufacturing a semiconductor device includes: forming a resist layer on an underlayer, forming an exposed pattern in the resist layer, wherein the exposed pattern comprises a soluble layer and an insoluble layer, forming a resist pattern by removing the soluble layer from the resist layer in which the exposed pattern is formed, removing an intermediate exposed area from the resist pattern, forming a new soluble layer in a surface of the resist pattern from which the intermediate exposed area is removed by applying a reaction material to the resist pattern from which the intermediate exposed area is removed, wherein the reaction material generates a solubilization material that solubilizes the resist pattern, and removing the new soluble layer from the resist pattern.Type: GrantFiled: March 2, 2009Date of Patent: June 19, 2012Assignee: Tokyo Electron LimitedInventors: Fumiko Iwao, Satoru Shimura, Tetsu Kawasaki
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Patent number: 8202683Abstract: A method for forming a pattern of a semiconductor device is provided. Specifically, in a method for manufacturing a NAND flash memory device using a spacer patterning process, a dummy pattern, which is not used in an actual device operation, is additionally formed in a peripheral circuit region when a photoresist pattern for forming a string pattern is formed in a cell region. As a result, the edge photoresist pattern is prevented from being bent, and a critical dimension difference between the center region and the edge region of the photoresist pattern is not generated, thereby improving a margin of DOF to obtain a reliable semiconductor device.Type: GrantFiled: May 27, 2009Date of Patent: June 19, 2012Assignee: Hynix Semiconductor Inc.Inventors: Ki Lyoung Lee, Cheol Kyu Bok, Keun Do Ban
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Patent number: 8202685Abstract: Lithography process is conducted to expose chip patterns to light on a semiconductor wafer. The process includes exposing a plurality of chip patterns to light in a first shot region in one direction on the semiconductor wafer, and exposing a plurality of chip patterns to light in a second region obtained by rotating the first shot region by 90° in a region in which all the chip patterns in the first shot region at the periphery of the semiconductor wafer are regarded as ineffective.Type: GrantFiled: May 28, 2009Date of Patent: June 19, 2012Assignee: Renesas Electronics CorporationInventor: Takanori Yamamoto
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Patent number: 8202681Abstract: A hybrid mask set for exposing a plurality of layers on a semiconductor substrate to create an integrated circuit device is disclosed. The hybrid mask set includes a first group of one or more multi-layer masks (MLMs) for a first subset of the plurality of layers. Each MLM includes a plurality of different images for different layers, the images being separated by a relatively wide image spacer. The hybrid mask set also includes a first group of one or more production-ready masks for a second subset of the plurality of layers. Each production-ready mask includes a plurality of similar images for a common layer, each image being separated by a relatively narrow scribe street.Type: GrantFiled: July 21, 2011Date of Patent: June 19, 2012Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Feng-Lung Lin, Kuan-Liang Wu, Che-Rong Liang, Fei-Gwo Tsai
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Patent number: 8198017Abstract: A producing method of a wired circuit board includes the steps of preparing a two-layer base material including a metal supporting layer and an insulating layer, covering an upper surface of the insulating layer and respective side end surfaces of the insulating layer and the metal supporting layer with a photoresist, placing a photomask so as to light-shield an end portion and a portion where a conductive layer is to be formed of the upper surface, exposing to light the photoresist covering the upper surface from above the photoresist via the photomask, exposing to light the photoresist covering the respective side end surfaces from below the photoresist, forming an exposed portion of the photoresist into a pattern by removing an unexposed portion thereof to form a plating resist, and forming an end-portion conductive layer and the conductive layer.Type: GrantFiled: January 22, 2009Date of Patent: June 12, 2012Assignee: Nitto Denko CorporationInventor: Keiji Takemura
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Patent number: 8197996Abstract: A method and system for patterning a substrate using a dual-tone development process is described. The method and system comprise using a resist material having a polymer backbone with a plurality of protecting groups attached thereto to improve process latitude and critical dimension uniformity for the dual-tone development process.Type: GrantFiled: September 16, 2009Date of Patent: June 12, 2012Assignee: Tokyo Electron LimitedInventors: Carlos A. Fonseca, Mark Somervell, Steven Scheer
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Patent number: 8192919Abstract: A method for forming a plurality of gate patterns in parallel with each other on a photoresist layer within a circuit block includes forming extension gate patterns on both ends of the gate patterns and on both ends of a dummy gate pattern of the circuit block to reach an edge of the circuit block, and performing a first photolithography process upon the photoresist layer by using a phase shift photomask having first and second openings whose difference in phase is ?, the first and second openings alternating between the gate patterns including the extension gate patterns to form phase edges therein.Type: GrantFiled: June 8, 2010Date of Patent: June 5, 2012Assignee: Renesas Electronics CorporationInventor: Masashi Fujimoto
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Patent number: 8187797Abstract: A template having a first recess pattern is brought into contact with a mask material formed on a substrate. The mask material with which the first recess pattern is filled is cured. A mask material pattern is formed on the substrate by releasing the template from the mask material. A resist pattern is formed to cover a part of the mask material pattern by forming a resist on the mask material pattern and selectively irradiating radiation onto the resist and thereafter developing the resist. The substrate is processed by using the mask material pattern and the resist pattern as a mask.Type: GrantFiled: September 18, 2009Date of Patent: May 29, 2012Assignee: Kabushiki Kaisha ToshibaInventors: Eishi Shiobara, Shinichi Ito
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Patent number: 8187775Abstract: A film photomask comprises a polymer substrate such as a photosensitive polymer than can be darkened. The photomask substrate is sensitive to light within a first wavelength range and is initially transparent to light within a second wavelength range that is utilized for product exposure operations to pattern a product using photomask. During a mask exposure operation, select regions of the photomask are exposed to light within the first wavelength range to selectively photodarken regions of the photomask substrate according to a desired pattern. The photodarkened regions are darkened sufficient to block light within the second wavelength range used for patterning a product through the photomask. Thus, no chemical processing is required to create a mask pattern. Moreover, the pattern is defined within/through the polymer material. The photomask may further comprise a filter that is applied to at least one side thereof for blocking light within the first wavelength range.Type: GrantFiled: April 12, 2010Date of Patent: May 29, 2012Assignee: Battelle Memorial InstituteInventors: Eric L. Hogue, Timothy J. Stanfield
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Patent number: 8182981Abstract: A pattern forming method has forming a first resist film on a processed film, patterning the first resist film into a first resist pattern, forming a first film containing a photo acid generator so as to cover the first resist pattern, forming a second resist film so as to cover the first film, irradiating a predetermined region of the second resist film with exposure light, heating the first film and the second resist film, performing a development process, removing the second resist film of the predetermined region and forming a second resist pattern while the first film is left, and etching the processed film with the first resist pattern and the second resist pattern as a mask.Type: GrantFiled: July 6, 2009Date of Patent: May 22, 2012Assignee: Kabushiki Kaisha ToshibaInventor: Hiroko Nakamura
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Patent number: 8183123Abstract: A method of forming a mark in an IC fabricating process is described. Two parts of the mark each including a plurality of linear patterns are respectively defined by two exposure steps that either belong to two lithography processes respectively or constitute a double-exposure process including X-dipole and Y-dipole exposure steps.Type: GrantFiled: July 5, 2011Date of Patent: May 22, 2012Assignee: MACRONIX International Co., Ltd.Inventor: Chin-Cheng Yang
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Patent number: 8178278Abstract: A system and method for encoded microparticles is described. One embodiment includes an encoded microparticle comprising a plurality of segments, wherein the plurality of segments form a spatial code; contrast coating on at least one segment of the plurality of segments, wherein the contrast coating further encodes the microparticle; an outer surface, wherein the outer surface encloses the spatial code and contrast coating, and wherein the spatial code and contrast coating are detectable through the outer surface.Type: GrantFiled: May 13, 2010Date of Patent: May 15, 2012Assignee: Affymetrix, Inc.Inventors: Randall J. True, Paul C. Ciccolella, Jared C. Pache
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Patent number: 8178286Abstract: A method of making a device includes forming a first photoresist layer over an underlying layer, patterning the first photoresist layer to form a first photoresist pattern comprising a first grid, rendering the first photoresist pattern insoluble to a solvent, forming a second photoresist layer over the first photoresist pattern, patterning the second photoresist layer to form a second photoresist pattern over the underlying layer, where the second photoresist pattern is a second grid which overlaps the first grid to form a photoresist web, and etching the underlying layer using the photoresist web as a mask.Type: GrantFiled: June 8, 2011Date of Patent: May 15, 2012Assignee: SanDisk 3D LLCInventor: Michael Chan
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Patent number: 8173333Abstract: In one embodiment, a system is disclosed that includes an illuminator having a source that produces light waves having a first wavelength, and a mask. The mask includes at least one partly opaque area and at least one opening within the opaque area includes a slanted, sub-resolution feature that redistributes a portion of the light passing through the open area to an off-axis location. A method of forming a device by way of photolithography might include forming unresolvable features on a mask and projecting light through the mask. Other systems, methods, and apparatus are disclosed.Type: GrantFiled: May 20, 2011Date of Patent: May 8, 2012Assignee: Micron Technology, Inc.Inventors: Fei Wang, Xinya Lei
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Patent number: 8168374Abstract: A method of forming a contact hole is provided. A pattern is formed in a photo resist layer. The pattern is exchanged into a silicon photo resist layer to form a first opening. Another pattern is formed in another photo resist layer. The pattern is exchanged into a silicon photo resist layer to form a second opening. The pattern having the first, and second openings is exchanged into the interlayer dielectric layer, and etching stop layer to form the contact hole. The present invention has twice exposure processes and twice etching processes to form the contact hole having small distance.Type: GrantFiled: August 12, 2010Date of Patent: May 1, 2012Assignee: United Microelectronics Corp.Inventors: Pei-Yu Chou, Jiunn-Hsiung Liao