Abstract: A gate in a semiconductor device is formed to have a dummy gate pattern that protects a gate. Metal lines are formed to supply power for a semiconductor device and transfer a signal. A semiconductor device includes a quad coupled receiver type input/output buffer. The semiconductor device is formed with a gate line that extends over an active region, and a gate pad located outside of the active region. The gate line and the gate pad are adjoined such that the gate line and a side of the gate pad form a line. Dummy gates may also be applied. The semiconductor device includes a first metal line patterns supplying power to a block having a plurality of cells, a second metal line pattern transferring a signal to the cells, and dummy metal line patterns divided into in a longitudinal direction.

Abstract: In the case in which a film for a resist is formed by spin coating, there is a resist material to be wasted, and the process of edge cleaning is added as required. Further, when a thin film is formed on a substrate using a vacuum apparatus, a special apparatus or equipment to evacuate the inside of a chamber vacuum is necessary, which increases manufacturing cost. The invention is characterized by including: a step of forming conductive layers on a substrate having a dielectric surface in a selective manner with a CVD method, an evaporation method, or a sputtering method; a step of discharging a compound to form resist masks so as to come into contact with the conductive layer; a step of etching the conductive layers with plasma generating means using the resist masks under the atmospheric pressure or a pressure close to the atmospheric pressure; and a step of ashing the resist masks with the plasma generating means under the atmospheric pressure or a pressure close to the atmospheric pressure.

Abstract: A method of lithography patterning includes forming a first resist pattern on a substrate, the first resist pattern including a plurality of openings therein on the substrate; forming a second resist pattern on the substrate and within the plurality of openings of the first resist pattern, the second resist pattern including at least one opening therein on the substrate; and removing the first resist pattern to uncover the substrate underlying the first resist pattern.

Abstract: To manufacture a support made of at least one predetermined material and bearing features: a plurality of superposed layers is produced on a substrate that it is known how to remove, each of the layers being formed from zones of at least two different materials, the geometry of the zones and the constituent materials of these superposed layers being defined so as to form said features, on the reverse side of the substrate, these features being of 3D type, and some of these features differing in height among themselves and/or with other features; a layer of the predetermined material is produced on this multilayer stack; and at least the substrate is eliminated whereby, after inversion, said support with said features is obtained.

Abstract: A method of double patterning is disclosed. The method includes forming a first photosensitive layer; exposing the first photosensitive layer using a first reticle; developing the first photosensitive layer thereby forming a first image pattern including first elements; forming a second photosensitive layer; exposing the second photosensitive layer using the first reticle; and developing the second photosensitive layer thereby forming a second image pattern.

Abstract: Integrated circuits and methods of manufacture and design thereof are disclosed. For example, a method of manufacturing includes depositing a gate material over a semiconductor substrate, and depositing a first resist layer over the gate material. A first mask is used to pattern the first resist layer to form first and second resist features. The first resist features include pattern for gate lines of the semiconductor device and the second resist features include printing assist features. A second mask is used to form a resist template; the second mask removes the second resist features.

Abstract: By taking into consideration the combination of the substrate holders in various lithography tools used during the imaging to two subsequent device layers, enhanced alignment accuracy may be accomplished. Furthermore, restrictive tool dedications for critical lithography processes may be significantly relaxed by providing specific overlay correction data for each possible process flow, wherein, in some illustrative embodiments, a restriction of the number of possible process flows may be accomplished by implementing a rule for selecting a predefined substrate holder when starting the processing of an associated group of substrates.

Abstract: A method of lithography patterning includes forming a resist pattern on a substrate, the resist pattern including at least one desired opening and at least one padding opening therein on the substrate; forming a patterned photosensitive material layer on the resist pattern and the substrate, wherein the patterned photosensitive material layer covers the padding opening of the resist pattern; and applying a resolution enhancement lithography by assist of chemical shrink (RELACS) process to the desired opening of the resist pattern.

Abstract: A pattern designing method according to an embodiment of the present invention includes: designing a first pattern for inspection formed by arraying a plurality of first mark rows, in which rectangular marks are arrayed at predetermined intervals in a first direction, in a second direction perpendicular to the first direction and designing a second pattern for inspection formed by arraying, in the second direction, a plurality of second mark rows in which rectangular marks are arranged among the marks arrayed in the first direction of the first mark row and a forming position in the second direction is arranged to overlap the first mark row by predetermined overlapping length.

Abstract: A method for forming a fine contact hole of a semiconductor device comprises performing two-step etching processes using a first exposure mask including a plurality of rectangular light transmitting regions each having a given pitch and a second exposure mask including a plurality of rectangular light transmitting regions arranged a shielding region of the first exposure mask with a ‘cross (+)’ shape in the center of rectangular light transmitting regions of the second exposure mask. Each of four corner regions of the light transmitting regions of the first exposure mask is overlapped with four corner regions of rectangular light transmitting regions of the second exposure mask. As a result, the fine contact hole pattern obtained by the method has a uniform size.

Abstract: A system for improving substrate critical dimension uniformity is described. The system includes an exposing means for exposing a plurality of mask patterns on a first plurality of substrates at predetermined locations with common splits of focus ({Fj}) and exposure dose ({Ek}) for each of the first plurality of substrates to form a plurality of perturbed wafers. A measuring means is provided for measuring a critical dimension of the plurality of mask patterns at each of the predetermined locations for each of the plurality of perturbed wafers. An averaging means is provided for averaging the critical dimension measured at each of the predetermined locations over the plurality of perturbed wafers to form a perturbed critical dimension map. A second measuring means is provided for measuring a sidewall angle of the plurality of mask patterns at each of the predetermined locations for each of the plurality of perturbed wafers.

Abstract: A structure and a photolithography method. The method includes forming a first layer of a first photoresist including a first polymer and a first photosensitive acid generator. A second layer of a second photoresist, including a second polymer having at least one phenyl or phenolic moiety, is formed directly onto the first layer. The second layer is patternwise imaged, resulting in exposing at least one first portion. The first portion is removed, revealing at least one first region of the first layer. A second portion of the second layer remains forming a structure having opaque regions. The structure and first region are exposed. The opaque regions shield from radiation at least one second region of the first layer, resulting in producing acid in the first region and in the structure. The structure and base-soluble regions of the first layer are removed. A structure is also described.

Abstract: A phase shift mask includes a substrate; a first phase shift pattern formed in a groove shape having a first depth within the substrate so that when a first light with a first wave length is incident, the first light transmitted through a surface of the substrate and the first light transmitted through the groove are destructively interfered and when a second light with a second wave length is incident, the second light transmitted through the surface of the substrate and the second light transmitted through the groove have a phase difference of 180 degrees; and a second phase shift pattern formed in a groove shape having a second depth within the substrate so that when the first light with the first wave length is incident, the first light transmitted through the surface of the substrate and the first light transmitted through the groove have a phase difference of 180 degrees and when the second light with the second wave length is incident, the second light transmitted through the surface of the substrate a

Abstract: A mask includes mask patterns formed over a frontside of a substrate and a phase grating formed over a backside of the substrate. The mask patterns correspond to a layout of diagonal patterns extending in a direction rotated toward a predetermined direction from an axis of a rectangular coordinate system. The phase grating extends in a direction parallel to the extending direction of the mask patterns. The phase grating includes first and second phase regions alternately arranged over the backside of the substrate with a phase difference of 180° therebetween. The first and second phase regions induce a phase interference that blocks a zero-order light of an exposure light incident to the substrate and allows a primary light to be incident to the mask patterns.

Abstract: The invention provides a masking process using photoresist, comprising: attaching a compress mask plate to a substrate; coating photoresist in a mask pattern of the compress mask plate; baking the photoresist from the substrate side; removing the compress mask plate from the substrate to form a desired photoresist pattern on the substrate. The inventive method simplifies the photolithography process, thereby the process time is shortened and the yield is increased.

Abstract: First, a first exposure process is performed using dipole illumination with only a grating-pattern forming region as a substantial object to be exposed. Next, a second exposure process is performed with only a standard-pattern forming region as a substantial object to be exposed. A development process is then performed to obtain a resist pattern. A mask for the first exposure process is such that a light blocking pattern is formed on the whole surface of a standard-pattern mask part corresponding to the standard-pattern forming region. A mask for the second exposure is such that a light blocking pattern is formed on the whole surface of a grating-pattern mask part corresponding to the grating-pattern forming region.

Abstract: A photomask blank is provided comprising an etch stop film which is disposed on a transparent substrate and is resistant to fluorine dry etching and removable by chlorine dry etching, a light-shielding film disposed on the etch stop film and including at least one layer composed of a transition metal/silicon material, and an antireflective film disposed on the light-shielding film. When the light-shielding film is dry etched to form a pattern, pattern size variation arising from pattern density dependency is reduced, so that a photomask is produced at a high accuracy.

Abstract: A method of patterning a target layer on a substrate is described. A patterned photoresist layer is formed over the target layer, wherein the patterned photoresist layer has unexposed parts as separate islands and each unexposed part has a low proton concentration at least in its sidewalls. Acid-crosslinked polymer layers are formed only on the sidewalls of each unexposed part. A flood exposure step is performed to the substrate. A baking step is performed to the patterned photoresist layer. A development step is performed to remove the previously unexposed parts. The target layer is etched with the acid-crosslinked polymer layers as a mask.

Abstract: A semiconductor device manufacturing method allowing effective inspection at low cost of a wafer having formed thereon chips. When forming chips on the wafer, a reticle having formed thereon chip patterns, monitor element/circuit patterns and connection patterns is used according to a formation step of the chips. The reticle is constructed such that a part of the monitor element/circuit patterns and the connection patterns are formed in the inner side area of an outer peripheral dicing area and when exposing adjacent shot positions, the pattern is formed on a portion where no outer peripheral dicing areas overlap whereas no pattern is formed on a part of a portion where outer peripheral dicing areas overlap. When using the reticle, a circuit which surrounds the whole chip formation area can be formed with the chips.

Abstract: A substrate set is a mask blank substrate set including a plurality of substrates each for use in a mask blank for producing a photomask to be chucked on a mask stage of an exposure apparatus. In each of the substrates in the mask blank substrate set, a main surface, on the side where a thin film for forming a transfer pattern is to be formed, has a convex shape being relatively high at its center and relatively low at its peripheral portion. In each substrate, the flatness in a 142 mm square area, including a central portion, of the main surface is 0.3 ?m or less and the difference upon fitting to a reference main surface of a reference substrate is 40 nm or less.

Abstract: A pattern is formed by applying a first positive resist composition onto a substrate, heat treatment, exposure, heat treatment and development to form a first resist pattern, the first positive resist composition comprising a polymer having copolymerized recurring units having naphthol and recurring units with an alkaline solubility that increases under the action of acid; causing the first resist coating to crosslink and cure by irradiation of high-energy radiation of sub-200 nm wavelength; further applying a second positive resist composition onto the substrate, heat treatment, exposure, heat treatment and development to form a second resist pattern. The double patterning process reduces the pitch between patterns to one half.

Abstract: A manufacturing method for a semiconductor device having patterns including two adjacent sides forming a corner portion with an external angle and a periodic pattern with a high density arrangement in the same layer is provided with (a) the step of exposing the first divided pattern including a first side which is obtained by dividing the pattern including two sides and the region which corresponds to a first thinned out pattern from which the periodic pattern is thinned out to light through a first mask having a first mask pattern, and (b) the step of exposing the second divided pattern including a second side which is obtained by dividing the pattern including two sides and the region which corresponds to a second thinned out pattern which is obtained by thinning out the periodic pattern to light through a first mask having a second mask pattern.

Abstract: An integrated circuit system that includes: providing a substrate coated with a photoresist material; exposing the photoresist material to an energy source through a first mask to form a first substrate feature and a second substrate feature therein; and exposing the photoresist material to the energy source through a second mask to transform the second substrate feature into another one of the first substrate feature therein.

Abstract: This invention provides processing steps, methods and materials strategies for making patterns of structures for electronic, optical and optoelectronic devices. Processing methods of the present invention are capable of making micro- and nano-scale electronic structures, such as T-gates, gamma gates, and shifted T-gates, having a selected non-uniform cross-sectional geometry. The present invention provides lithographic processing strategies for sub-pixel patterning in a single layer of photoresist useful for making and integrating device components comprising dielectric, conducting, metal or semiconductor structures having non-uniform cross-sectional geometries. Processing methods of the present invention are complementary to conventional microfabrication and nanofabrication platforms, and can be effectively integrated into existing photolithographic, etching and thin film deposition patterning strategies, systems and infrastructure.

Abstract: A hybrid mask set for exposing a plurality of layers on a semiconductor substrate to create an integrated circuit device is disclosed. The hybrid mask set includes a first group of one or more multi-layer masks (MLMs) for a first subset of the plurality of layers. Each MLM includes a plurality of different images for different layers, the images being separated by a relatively wide image spacer. The hybrid mask set also includes a first group of one or more production-ready masks for a second subset of the plurality of layers. Each production-ready mask includes a plurality of similar images for a common layer, each image being separated by a relatively narrow scribe street.

Abstract: A device manufacturing method is provided. The method includes generating a first patterned beam, projecting the first patterned beam onto a substrate to form a first plurality of spot exposures on the substrate, scanning the substrate in a direction while projecting the first patterned beam, generating a second patterned beam, projecting the second patterned beam onto the substrate to form a second plurality of spot exposures on the substrate, and alternating spot exposures of the first plurality of spot exposures with respective spot exposures of the second plurality of spot exposures.

Abstract: A mask pattern data creation method includes: determining whether or not a spacing of adjacent assist pattern feature data is not more than a prescribed spacing, based on: initial position data indicating an initially set position of the assist pattern feature data determined based on an illumination condition; and initial size data indicating an initially set size of the assist pattern feature data satisfying a size condition to not optically form an image on the transfer destination; and moving at least one of the adjacent assist pattern feature data or reducing a size of the at least one to increase the spacing of the assist pattern feature data to exceed a prescribed spacing in the case where it is determined that the spacing of the assist pattern feature data is not more than the prescribed spacing.

Abstract: A mask is reused to form the same pattern in multiple layers in semiconductor processing. Reference marks that allow alignment accuracy to be checked are also formed with the mask. The manner of using the mask advantageously mitigates interference between reference marks in different layers.

Abstract: A system and method is provided which predicts problematic areas for lithography in a circuit design, and more specifically, which uses modeling data from a modeling tool to accurately predict problematic lithographic areas. The method includes identifying surface heights of plurality of tiles of a modeled wafer, and mathematically mimicking a lithographic tool to determine best planes of focus for exposure for the plurality of tiles.

Abstract: A first resist film is formed on a substrate, and first pattern exposure is performed such that the first resist film is irradiated with exposure light through a first mask. Then, the first resist film is developed, thereby forming a first resist pattern out of the first resist film. Subsequently, a nano-carbon material is attached to the surface of the first resist pattern, and then a second resist film is formed on the substrate including the first resist pattern. Thereafter, second pattern exposure is performed such that the second resist film is irradiated with exposure light through a second mask. Then, the second resist film is developed, thereby forming a second resist pattern out of the second resist film.

Abstract: After forming an underlying layer film and an intermediate layer film are formed over a substrate, a resist pattern formed by first pattern exposure using a first resist film and second pattern exposure using a second resist film is transferred onto the intermediate layer film. Furthermore, the underlying layer film is etched using the intermediate layer pattern as a mask, thereby obtaining an underlying layer film pattern. The underlying layer film includes as an adduct a fluorine-based surfactant or inorganic nano particles and is provided with a resistance against oxygen-based plasma.

Abstract: An exposure method is disclosed. A wafer coated with a photoresist layer having an exposure threshold dose is provided. The wafer has at least a central region and a peripheral region. Then, a compensating light beam having a first dose directs on the photoresist layer within the peripheral region. Next, a patterned light beam having a second dose is then projected, in a step-and-scan manner, onto the photoresist layer, thereby exposing the photoresist layer. The total dose of the first energy and the second energy is above than the exposure threshold dose.

Abstract: A method to enhance resolution in optical lithography via absorbance-modulation involves exposing an opaque absorbance modulation layer (AML) to a first waveform having wavelength, 81, with the first exposure forming a first set of transparent regions in the opaque AML and forming a first pattern made of a set of exposed regions in a photoresist layer. Next, the AML is restored to its original opaque state. Next, the restored AML is re-exposed to the first waveform having wavelength, 81, with the exposure forming a second set of transparent regions in the opaque AML and forming a second pattern having a set of exposed regions in a photoresist layer. The first and second patterns in the photoresist layer form a final pattern with enhanced resolution and decreased spatial period than the first pattern.

Abstract: A photomask blank comprises a transparent substrate, a light-shielding film deposited on the substrate and comprising a metal or metal compound susceptible to fluorine dry etching, and an etching mask film deposited on the light-shielding film and comprising another metal or metal compound resistant to fluorine dry etching. When the light-shielding film is dry etched to form a pattern, pattern size variation arising from pattern density dependency is reduced, so that a photomask is produced at a high accuracy.

Abstract: Fluorine-passivated reticles for use in lithography and methods for fabricating and using such reticles are provided. According to one embodiment, a method for performing photolithography comprises placing a fluorine-passivated reticle between an illumination source and a target semiconductor wafer and causing electromagnetic radiation to pass from the illumination source through the fluorine-passivated reticle to the target semiconductor wafer. In another embodiment, a fluorine-passivated reticle comprises a substrate and a patterned fluorine-passivated absorber material layer overlying the substrate. According to another embodiment, a method for fabricating a reticle for use in photolithography comprises providing a substrate and forming a fluorine-passivated absorber material layer overlying the substrate.

Abstract: Provided is a reticle used for forming a plurality of vias for connecting first wirings provided in a first wiring layer and second wirings provided in a second wiring layer formed above the first wiring layer. The first wirings and the second wirings are provided along one of a first direction and a second direction, and the first direction and the second direction perpendicularly cross each other. The reticle includes a plurality of via opening patterns for forming the plurality of vias. Each of the plurality of via opening patterns has a rectangular shape, and is arranged to cause each side of each of the via opening patterns to be diagonal with respect to the first direction and the second direction.

Abstract: A method of making a device includes forming a first photoresist layer over an underlying layer, patterning the first photoresist layer to form a first photoresist pattern comprising a first grid, rendering the first photoresist pattern insoluble to a solvent, forming a second photoresist layer over the first photoresist pattern, patterning the second photoresist layer to form a second photoresist pattern over the underlying layer, where the second photoresist pattern is a second grid which overlaps the first grid to form a photoresist web, and etching the underlying layer using the photoresist web as a mask.

Abstract: A lithographic method to enhance image resolution in a lithographic cluster using multiple projections and a lithographic cluster used to project multiple patterns to form images that are combined to form an image having enhanced resolution.

Abstract: In the present invention, the position of a substrate on a thermal plate is detected when baking after exposure is performed in a first round of patterning. In a second round of patterning, the setting position of the substrate is adjusted based on a detection result of the position before the substrate is mounted on the thermal plate in the baking after exposure. In the baking after exposure in the second round of patterning, the substrate is mounted at the same position with respect to the thermal plate as that in the baking after exposure in the first round of patterning. In performing a plurality of rounds of patterning on a film to be processed, a pattern with a desired dimension is finally formed above the substrate, and the uniformity of the pattern dimension within the substrate is ensured.

Abstract: A method of selectively altering material properties of a substrate in one region while making a different alteration of material properties in an adjoining region is provided. The method includes selectively masking a first portion of the substrate during a first exposure and selectively masking a second portion of the substrate during a second exposure. Additionally, a mask may be formed having more than one thickness where each thickness will selectively reduce the amount of energy from a blanket exposure of the substrate thereby allowing a substrate to receive different levels of energy dosage in a single blanket exposure.

Abstract: A method for fabricating an extreme ultraviolet (EUV) lithography mask comprises forming a reflecting layer, an absorber layer, and a resist layer over a substrate; defining a plurality of split regions by partially splitting the resist layer with regular spacing; performing an exposure process, wherein the exposure region is irradiated with an electron beam at different intensities on the split regions to generate a difference in electron beam doses implanted into the resist layer; forming a resist layer pattern which selectively exposes the absorber layer and has a slanted side wall profile by performing a development process to remove a portion of the resist layer, into which the electron beam doses are implanted; and forming an absorber layer pattern with a slanted side wall profile by sequentially etching the portion of the absorber layer exposed by the resist layer pattern.

Abstract: A method for forming a fine pattern of a semiconductor device comprises: forming anti-reflection coating patterns over an underlying layer of a semiconductor substrate using an anti-reflection coating composition comprising a silicon-containing polymer; forming a photoresist pattern between the anti-reflection coating patterns using a photoresist composition comprising a silicon-containing polymer; and patterning the underlying layer using the photoresist patterns as an etching mask.

Abstract: A resist pattern forming method capable of obtaining a smooth resist pattern. An exemplary method may utilize a photomask including a plurality of mask cells arranged in the form of a matrix. The length of one side of each of the mask cells may be smaller than the length corresponding to the resolution limit of the optical system of the exposure device. Each mask cell may have one or both of a light transmission region and a light shielding region, and the intensity of light passing through each mask cell may be determined by the ratio of the area of the light transmission region to the area of the mask cell. The photomask may be positioned at a vertical focus position other than the optimal focus position. The resist film may be exposed with light and may then be developed to produce the resist pattern.

Abstract: Methods for forming or patterning nanostructure arrays are provided. The methods involve formation of arrays on coatings comprising nanostructure association groups, formation of arrays in spin-on-dielectrics, solvent annealing after nanostructure deposition, patterning using resist, and/or use of devices that facilitate array formation. Related devices for forming nanostructure arrays are also provided, as are devices including nanostructure arrays (e.g., memory devices). Methods for protecting nanostructures from fusion during high temperature processing are also provided.

Abstract: This invention discloses a method to form a resist pattern on a to-be-processed substrate by immersion exposure. A resist film is formed on the central portion of the upper surface of the to-be-processed substrate, on a bevel portion of the upper surface, which is obtained by chamfering the peripheral portion of the to-be-processed substrate, and on the end portion of the to-be-processed substrate. Pattern exposure for forming the latent image of a desired pattern on the resist film is executed while a liquid whose refractive index is higher than that of air exists between the resist film and a constituent element of a projection optical system of an exposure apparatus, which is nearest to the to-be-processed substrate. The resist film formed on the end portion of the to-be-processed substrate is removed by supplying a rinse solution to the end portion of the to-be-processed substrate after executing pattern exposure.

Abstract: A photolithographic method uses different exposure patterns. In one aspect, a photo-sensitive layer on a substrate is subject to a first exposure using optics having a first exposure pattern, such as an x-dipole pattern, followed by exposure using optics having a second exposure pattern, such as a y-dipole pattern, via the same mask, and with the photo-sensitive layer fixed relative to the mask. A 2-D post pattern with a pitch of approximately 70-150 nm may be formed in a layer beneath the photo-sensitive layer using 157-193 nm UV light, and hyper-numerical aperture optics, in one approach. In another aspect, hard baking is performed after both of the first and second exposures to erase a memory effect of photoresist after the first exposure. In another aspect, etching of a hard mask beneath the photo-sensitive layer is performed after both of the first and second exposures.

Abstract: The present invention provides an optically semitransmissive film that has a near-zero phase shift, has a desired transmissivity, and is relatively thin; a novel phase-shift mask that uses the optically semitransmissive film; a photomask blank that can [be used to] manufacture the phase-shift mask; and a method for designing the optically semitransmissive film. The film is formed on a translucent substrate and transmits a portion of light having a desired wavelength ?, wherein the film has at least one phase-difference reduction layer that fulfills the following functions.

Abstract: Disclosed herein is a method of correcting defects in photomasks. According to one embodiment, a light absorption layer is formed on a photomask where pin hole defects occur in a light blocking layer, and light absorption patterns are formed on the pin hole defect portions by selectively etching the light absorption layer. According to another embodiment, a light absorption layer is formed on a backside of a photomask having pin hole defects in a light blocking layer, and light absorption patterns are formed on the backside of the photomask substrate corresponding to a region having pin hole defects by etching the light absorption layer.

Abstract: The present invention provides a method of manufacturing a PDP that prevents defects due to dust adhering to a photomask, for example, from occurring in a structure of the PDP. In photolithography, exposure is performed twice in a same process, and photomask (22) is moved within an allowable range of displacement in an exposure pattern, between a first and a second exposures. Photomask (22) is exposed twice in total before and after moving photomask (22). Region (21a), an unexposed region due to interruption of dust (22b) attached to photomask (22), can be suppressed, enabling pattern exposure on photosensitive Ag paste film (21) to be favorably performed.

Abstract: An exposure mask has a rectangular pattern, an auxiliary pattern, a translucent region, and a shielding region. The rectangular pattern includes a transparent region having a dimension equal to or greater than a critical resolution of exposure light. The auxiliary pattern is arranged around the rectangular pattern and includes a transparent region having a dimension smaller than the critical resolution. The translucent region is arranged between the rectangular pattern and the auxiliary pattern for shifting a phase of light transmitted through the rectangular pattern and the auxiliary pattern to an opposite phase. The shielding region is arranged around the auxiliary pattern.