Radiation Mask Patents (Class 430/5)
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Patent number: 12366797Abstract: A reflective mask includes a substrate, a reflective multilayer disposed on the substrate, a capping layer disposed on the reflective multilayer, and an absorber layer disposed on the capping layer. The absorber layer includes a base material made of one or more of a Cr based material, an Ir based material, a Pt based material, or Co based material, and further contains one or more additional elements selected from the group consisting of Si, B, Ge, Al, As, Sb, Te, Se and Bi.Type: GrantFiled: June 20, 2024Date of Patent: July 22, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Hung-Yi Tsai, Wei-Che Hsieh, Ta-Cheng Lien, Hsin-Chang Lee, Ping-Hsun Lin, Hao-Ping Cheng, Ming-Wei Chen, Szu-Ping Tsai
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Patent number: 12366798Abstract: A lithography mask including a substrate, a phase shift layer on the substrate and an etch stop layer is provided. The phase shift layer is patterned and the substrate is protected from etching by the etch stop layer. The etch stop layer can be a material that is semi-transmissive to light used in photolithography processes or it can be transmissive to light used in photolithography processes.Type: GrantFiled: April 8, 2022Date of Patent: July 22, 2025Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chien-Cheng Chen, Huan-Ling Lee, Ta-Cheng Lien, Chia-Jen Chen, Hsin-Chang Lee
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Patent number: 12365032Abstract: Disclosed is a method and device for generating additive manufacturing control data. The control data are generated such that the energy beam has an intensity distribution, at the area of incidence on the build field, in a see tion plane running perpendicularly to the beam axis of the energy beam, which intensity distribution has at least one local minimum in a middle region along at least one secant of the intensity distribution in the section plane and has an intensity profile curve, running along the edge of the intensity distribution, which intensity profile curve has, at least at one point, a maximum value, and, at least at one point in a region opposite the maximum value on the intensity profile curve, a minimum value.Type: GrantFiled: November 5, 2019Date of Patent: July 22, 2025Assignee: EOS GmbH Electro Optical SystemsInventor: Peter Holfelder
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Patent number: 12361196Abstract: A DRC test pattern generation method includes: receiving a DRC test pattern generation request, the DRC test pattern generation request carrying the number of correct patterns and the number of erroneous patterns; acquiring layout design rule information and corresponding layer configuration information, the layer configuration information including process layer configuration parameter information that is set according to a process type; parsing parameter information corresponding to each rule in the layout design rule information and the process layer configuration parameter information in the layer configuration information, and generating formatted parameter information corresponding to the each rule; and generating a corresponding number of correct patterns and a corresponding number of erroneous patterns corresponding to each rule according to the formatted parameter information.Type: GrantFiled: April 8, 2022Date of Patent: July 15, 2025Assignee: CHANGXI MEMORY TECHNOLOGIES, INC.Inventors: Chuanjiang Chen, Li Bai, Kang Zhao
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Patent number: 12353121Abstract: A reflective mask blank including a substrate, a multilayer reflection film formed on one main surface of the substrate and reflects exposure light. The multilayer reflection film has a periodically laminated structure portion in which low refractive index layers and high refractive index layers are alternately laminated, and at least one of the low refractive index layer has a two-layered structure consisting of one layer containing molybdenum, and at least one additive element selected from the group consisting of nitrogen, carbon, boron, silicon and hydrogen, and the other layer containing molybdenum and substantively free of other elements other than molybdenum.Type: GrantFiled: October 26, 2022Date of Patent: July 8, 2025Assignee: SHIN-ETSU CHEMICAL CO., LTD.Inventors: Taiga Ogose, Takuro Kosaka
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Patent number: 12346019Abstract: A reflective mask includes a substrate, a reflective multilayer disposed over the substrate, a capping layer disposed over the reflective multilayer, an intermediate layer disposed over the capping layer, an absorber layer disposed over the intermediate layer, and a cover layer disposed over the absorber layer. The intermediate layer includes a material having a lower hydrogen diffusivity than a material of the capping layer.Type: GrantFiled: May 8, 2024Date of Patent: July 1, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Pei-Cheng Hsu, Ta-Cheng Lien, Hsin-Chang Lee
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Patent number: 12349467Abstract: The present disclosure provides an array substrate and a display panel. According to the present disclosure, angles between two side walls of a first sub-active part and a first bottom surface of a side of the first sub-active part close to a second active part are both acute angles, thereby reducing an angle of a corner experienced by a signal transmitted from a first electrode to a second electrode via an active layer. Therefore, a current distribution is optimized, a resistance at the corner is reduced, and the generated heat is reduced under the condition that the current is not changed, thereby improving service life of the display panel and reliability of the display panel.Type: GrantFiled: August 12, 2022Date of Patent: July 1, 2025Assignee: GUANGZHOU CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.Inventor: Zhixiong Jiang
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Patent number: 12346027Abstract: A reflective mask includes a substrate, a reflective multilayer disposed on the substrate, a capping layer disposed on the reflective multilayer, and an absorber layer disposed on the capping layer. The absorber layer includes one or more alternating pairs of a first Cr based layer and a second Cr based layer different from the first Cr based layer.Type: GrantFiled: June 17, 2024Date of Patent: July 1, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Pei-Cheng Hsu, Ching-Huang Chen, Hung-Yi Tsai, Ming-Wei Chen, Hsin-Chang Lee, Ta-Cheng Lien
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Patent number: 12346018Abstract: A reflective mask blank includes a substrate; a multilayer reflective film that reflects EUV light; a protection film that protects the multilayer reflective film; and a phase shift film that shifts a phase of the EUV light. The phase shift film contains Ir as a main component. A ratio of a maximum value of an intensity of a peak of diffracted light from the phase shift film in a 2? range of 35° to 45° to an average value of an intensity of the diffracted light in a 2? range of 55° to 60° measured using an XRD method with a CuK? ray, upon being irradiated with the EUV light with an incident angle of ?, is 1.0 or more and 30 or less. A refractive index and an extinction coefficient of the phase shift film to the EUV light are 0.925 or less, and 0.030 or more, respectively.Type: GrantFiled: April 29, 2024Date of Patent: July 1, 2025Assignee: AGC Inc.Inventors: Yuya Nagata, Daijiro Akagi, Kenichi Sasaki, Hiroaki Iwaoka
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Patent number: 12346021Abstract: A method for forming a pellicle for an extreme ultraviolet lithography is provided. The method includes forming a pellicle membrane over a filter membrane and transferring the pellicle membrane from the filter membrane to a membrane border. Forming the pellicle membrane includes growing carbon nanotubes (CNTs) from in-situ formed metal catalyst particles in a first reaction zone of a reactor, each of the CNTs including a metal catalyst particle at a growing tip thereof, growing boron nitride nanotubes (BNNTs) to surround individual CNTs in a second reaction zone of the reactor downstream of the first reaction zone, thereby forming heterostructure nanotubes each including a CNT core and a BNNT shell, and collecting the heterostructure nanotubes on the filter membrane. The metal catalyst particles are partially or completely removed during growing the BNNTs.Type: GrantFiled: May 20, 2022Date of Patent: July 1, 2025Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Pei-Cheng Hsu, Huan-Ling Lee, Hsin-Chang Lee, Chin-Hsiang Lin
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Patent number: 12347716Abstract: A method includes emitting, by a first portion of an optical inspection instrument, a radiation toward a supporting surface of a chuck, wherein the chuck is configured for fixing a semiconductor workpiece on the supporting surface, and the optical inspection instrument faces the supporting surface; receiving, by a second portion of the optical inspection instrument, a reflection of the radiation reflected from the chuck; analyzing the reflection of the radiation; determining whether a particle is present on the supporting surface of the chuck based on the analyzing the reflection of the radiation; and removing the particle by using a cleaning tool comprising an exhaust duct.Type: GrantFiled: June 27, 2023Date of Patent: July 1, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Yueh-Lin Yang, Chi-Hung Liao
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Patent number: 12346017Abstract: Provided is a substrate with a multilayer reflective film, the substrate being used for manufacturing a reflective mask blank and a reflective mask each having a multilayer reflective film having a high reflectance to exposure light and a low background level during defect inspection. A substrate with a multilayer reflective film 110 comprises a substrate 1 and a multilayer reflective film 5. The multilayer reflective film 5 is formed of a multilayer film in which a low refractive index layer and a high refractive index layer are alternately layered on the substrate 1. The multilayer reflective film 5 comprises at least one additive element selected from hydrogen (H), deuterium (D), and helium (He). The additive element in the multilayer reflective film 5 has an atomic number density of 0.006 atom/nm3 or more and 0.50 atom/nm3 or less.Type: GrantFiled: September 23, 2020Date of Patent: July 1, 2025Assignee: HOYA CORPORATIONInventor: Masanori Nakagawa
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Patent number: 12339582Abstract: A method of making a semiconductor device includes forming at least one fiducial mark on a photomask. The method further includes defining a pattern including a plurality of sub-patterns on the photomask in a pattern region. The defining the pattern includes defining a first sub-pattern of the plurality of sub-patterns having a first spacing from a second sub-pattern of the plurality of sub-patterns, wherein the first spacing is different from a second spacing between the second sub-pattern and a third sub-pattern of the plurality of sub-patterns.Type: GrantFiled: November 29, 2023Date of Patent: June 24, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Hsin-Chang Lee, Ping-Hsun Lin, Chih-Cheng Lin, Chia-Jen Chen
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Patent number: 12339580Abstract: A reflective mask blank for EUV lithography, includes: a substrate; a conductive film disposed on or above a back surface of the substrate; a reflective layer disposed on or above a front surface of the substrate, the reflective layer reflecting EUV light; and an absorption layer disposed on or above the reflective layer, the absorption layer absorbing the EUV light.Type: GrantFiled: November 15, 2024Date of Patent: June 24, 2025Assignee: AGC Inc.Inventors: Yusuke Ono, Hiroaki Iwaoka, Taiga Fudetani
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Patent number: 12339579Abstract: The present disclosure describes a method of patterning a semiconductor wafer using extreme ultraviolet lithography (EUVL). The method includes receiving an EUVL mask that includes a substrate having a low temperature expansion material, a reflective multilayer over the substrate, a capping layer over the reflective multilayer, and an absorber layer over the capping layer. The method further includes patterning the absorber layer to form a trench on the EUVL mask, wherein the trench has a first width above a target width. The method further includes treating the EUVL mask with oxygen plasma to reduce the trench to a second width, wherein the second width is below the target width. The method may also include treating the EUVL mask with nitrogen plasma to protect the capping layer, wherein the treating of the EUVL mask with the nitrogen plasma expands the trench to a third width at the target width.Type: GrantFiled: April 15, 2024Date of Patent: June 24, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Pei-Cheng Hsu, Chun-Fu Yang, Ta-Cheng Lien, Hsin-Chang Lee
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Patent number: 12339583Abstract: A method for source mask optimization or mask only optimization used to image a pattern onto a substrate. The method includes determining a non-uniform illumination intensity profile for illumination; and determining one or more adjustments for the pattern based on the non-uniform illumination intensity profile until a determination that features patterned onto a substrate substantially match a target design. The non-uniform illumination intensity profile may be determined based on an illumination optical system and projection optics of a lithographic apparatus. In some embodiments, the lithographic apparatus includes a slit, and the non-uniform illumination profile is a through slit non-uniform illumination intensity profile. Determining the one or more adjustments for the pattern may include performing optical proximity correction, for example.Type: GrantFiled: November 18, 2020Date of Patent: June 24, 2025Assignees: ASML HOLDING N.V., ASML NETHERLANDS B.V.Inventors: Janardan Nath, Christopher John Mason, Duan-Fu Stephen Hsu, Todd R. Downey, Tian Gang
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Patent number: 12342467Abstract: A stamp head unit including: a stamp component including at least a silicone-based rubber film on a quartz glass substrate; a stamp-component-holding component including a surface having a hole for vacuum suction of a surface of the quartz glass substrate of the stamp component; and a tubular component having an evacuation suction hole connected to communicate with the hole for vacuum suction so as to maintain a vacuum, and being coupled and fixed with the stamp-component-holding component. This provides: a stamp component that can be fixed stably by a simple and convenient vacuum chuck system; a stamp head unit with which the stamp component can be replaced in a short time; and a microstructure-transfer apparatus provided with the stamp component and the stamp head unit.Type: GrantFiled: December 10, 2019Date of Patent: June 24, 2025Assignee: SHIN-ETSU CHEMICAL CO., LTD.Inventors: Hideo Nakagawa, Yoshinori Ogawa, Nobuaki Matsumoto, Shuhei Ueda, Keiji Ohori, Kohei Otake
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Patent number: 12332561Abstract: A wafer may comprise a substrate layer and a plurality of vertical cavity surface emitting lasers (VCSELs) formed on or within the substrate layer. A respective trench-to-trench distance associated with the plurality of VCSELs may vary across the wafer based on a predicted variation of an oxidation rate of an oxidation layer across the wafer.Type: GrantFiled: January 14, 2022Date of Patent: June 17, 2025Assignee: Lumentum Operations LLCInventors: Benjamin Kesler, Ajit Vijay Barve, Guowei Zhao
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Patent number: 12326658Abstract: A pellicle for extreme ultraviolet lithography containing molybdenum carbide is disclosed. The pellicle includes a substrate having an opening formed in a central portion, and a pellicle layer formed on the substrate to cover the opening and including a molybdenum carbide containing layer that contains molybdenum carbide expressed as MoC1-x (0<x<1). The pellicle layer includes a core layer formed on the substrate to cover the opening, and the core layer may be the molybdenum carbide containing layer.Type: GrantFiled: March 18, 2022Date of Patent: June 10, 2025Assignee: KOREA ELECTRONICS TECHNOLOGY INSTITUTEInventors: Hyeong Keun Kim, Seul Gi Kim, Hyun Mi Kim, Jin Woo Cho, Yong Kyung Kim
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Patent number: 12321092Abstract: This application relates to a pellicle for extreme ultraviolet lithography containing amorphous carbon and a manufacturing method thereof. In one aspect, the pellicle includes a substrate having an opening formed in a central portion, a support layer formed on the substrate to cover the opening, and a pellicle layer formed on the support layer and containing amorphous carbon. The pellicle layer may include a core layer formed on the support layer, and a capping layer formed on the core layer and may further include a buffer layer. At least one of the core layer, the capping layer, or the buffer layer may be an amorphous carbon layer.Type: GrantFiled: March 18, 2022Date of Patent: June 3, 2025Assignee: Korea Electronics Technology InstituteInventors: Hyeong Keun Kim, Seul Gi Kim, Hyun Mi Kim, Jin Woo Cho, Hye Young Kim
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Patent number: 12313968Abstract: A reflective mask blank for manufacturing a reflective mask capable of suppressing peeling of an absorber pattern while suppressing an increase in the thickness of an absorber film when EUV exposure is conducted in an atmosphere including hydrogen gas. A reflective mask blank comprises a substrate, a multilayer reflection film on the substrate, and an absorber film on the multilayer reflection film. The reflective mask blank is characterized in that: the absorber film includes an absorption layer and a reflectance adjustment layer; the absorption layer contains tantalum (Ta), nitrogen (N), and at least one added element selected from hydrogen (H) and deuterium (D); the absorption layer includes a lower surface region including a surface on the substrate side, and an upper surface region including a surface on the side opposite to the substrate; and the concentration (at. %) of the added element in the lower surface region and the concentration (at.Type: GrantFiled: May 31, 2024Date of Patent: May 27, 2025Assignee: HOYA CORPORATIONInventors: Masanori Nakagawa, Tsutomu Shoki
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Patent number: 12298660Abstract: The present invention relates to a reflective mask blank for EUV lithography, including: a substrate, a multilayer reflective film reflecting EUV light, and a phase shift film shifting a phase of the EUV light, in which the substrate, the multilayer reflective film, and the phase shift film are formed in this order, the phase shift film includes a layer 1 including ruthenium (Ru) and nitrogen (N), and the layer 1 has an absolute value of a film stress of 1,000 MPa or less.Type: GrantFiled: March 6, 2024Date of Patent: May 13, 2025Assignee: AGC INC.Inventors: Hirotomo Kawahara, Daijiro Akagi, Hiroaki Iwaoka, Toshiyuki Uno, Michinori Suehara, Keishi Tsukiyama
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Patent number: 12298662Abstract: A mask for extreme ultraviolet (EUV) lithography includes a multilayer (ML) stack including alternating metal and semiconductor layers disposed over a first surface of a mask substrate, a capping layer disposed over the ML stack, and an absorber layer disposed over the capping layer. An image pattern is formed in the absorber layer. A border layer surrounding the image pattern is disposed over the absorber layer.Type: GrantFiled: June 29, 2022Date of Patent: May 13, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventor: Yun-Yue Lin
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Patent number: 12298663Abstract: Methods of manufacturing a pellicle for a lithographic apparatus including a method involving depositing at least one graphene layer on a planar surface of a substrate. The substrate has a first substrate portion and a second substrate portion. The method further includes removing the first substrate portion to form a freestanding membrane from the at least one graphene layer. The freestanding membrane is supported by the second substrate portion.Type: GrantFiled: October 11, 2016Date of Patent: May 13, 2025Assignee: ASML NETHERLANDS B.V.Inventors: Mária Péter, Erik Achilles Abegg, Adrianus Johannes Maria Giesbers, Johan Hendrik Klootwijk, Maxim Aleksandrovich Nasalevich, Wilhelmus Theodorus Anthonius Johannes Van Den Einden, Willem Joan Van Der Zande, Pieter-Jan Van Zwol, Johannes Petrus Martinus Bernardus Vermeulen, David Ferdinand Vles, Willem-Pieter Voorthuijzen
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Patent number: 12298673Abstract: In a method of manufacturing a photo mask for lithography, circuit pattern data are acquired. A pattern density, which is a total pattern area per predetermined area, is calculated from the circuit pattern data. Dummy pattern data for areas having pattern density less than a threshold density are generated. Mask drawing data is generated from the circuit pattern data and the dummy pattern data. By using an electron beam from an electron beam lithography apparatus, patterns are drawn according to the mask drawing data on a resist layer formed on a mask blank substrate. The drawn resist layer is developed using a developing solution. Dummy patterns included in the dummy pattern data are not printed as a photo mask pattern when the resist layer is exposed with the electron beam and is developed.Type: GrantFiled: June 17, 2024Date of Patent: May 13, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chien-Cheng Chen, Chia-Jen Chen, Hsin-Chang Lee, Shih-Ming Chang, Tran-Hui Shen, Yen-Cheng Ho, Chen-Shao Hsu
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Patent number: 12292680Abstract: The present application relates to a method for disposing of excess material of a photolithographic mask, wherein the method comprises the following steps: (a) enlarging a surface of the excess material; (b) displacing the enlarged excess material on the photolithographic mask using at least one first probe of a scanning probe microscope; and (c) removing the displaced enlarged excess material from the photolithographic mask.Type: GrantFiled: June 10, 2022Date of Patent: May 6, 2025Assignee: Carl Zeiss SMT GmbHInventors: Michael Budach, Christof Baur, Klaus Edinger, Tristan Bret
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Patent number: 12292686Abstract: A method of manufacturing a semiconductor structure includes providing a mask including a first substrate; a first mask layer disposed over the first substrate, including a plurality of first recesses extended through the first mask layer; a second mask layer disposed over the first mask layer and including a plurality of second recesses extended through the second mask layer; providing a second substrate including a photoresist disposed over the second substrate; and projecting a predetermined electromagnetic radiation through the mask towards the photoresist, wherein the first mask layer is at least partially transparent to the predetermined electromagnetic radiation, the second mask layer is opaque to the predetermined electromagnetic radiation, and at least a portion of the second mask layer is disposed between two of the plurality of second recesses.Type: GrantFiled: December 28, 2021Date of Patent: May 6, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Yung-Yao Lee, Yi-Ping Hsieh
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Patent number: 12287577Abstract: An electronic device is provided. The electronic device includes a base and a conductive layer that is disposed on the base and patterned by a plurality of processes. The plurality of processes include providing a mask substrate. The mask substrate includes a first substrate and a patterned substrate. In the cross-sectional view, the width of the first substrate is greater than or equal to the width of the patterned substrate. The plurality of processes include arranging the mask substrate and the base correspondingly. The plurality of processes also include performing exposure and development processes on the conductive layer for patterning the conductive layer, and removing the mask substrate.Type: GrantFiled: December 5, 2023Date of Patent: April 29, 2025Assignee: INNOLUX CORPORATIONInventors: Chien-Hsing Lee, Chin-Lung Ting, Jung-Chuan Wang, Hong-Sheng Hsieh
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Patent number: 12288688Abstract: A photomask is manufactured from a photomask blank including a transparent substrate, a first inorganic film which comprises silicon and is free of chromium, and a second inorganic film which comprises chromium and is free of silicon, and is in contact with the first inorganic film by a method including steps of forming a pattern of the second inorganic film by fluorine-based dry etching with using a resist pattern, and forming a pattern of the first inorganic film by fluorine-based dry etching with using the pattern of the second inorganic film.Type: GrantFiled: June 22, 2021Date of Patent: April 29, 2025Assignee: SHIN-ETSU CHEMICAL CO., LTD.Inventor: Kouhei Sasamoto
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Patent number: 12281988Abstract: An optical microtoroid resonator including one or more nanoparticles attached to a surface of the resonator and capable of receiving an input signal from afar-field source (via free-space transmission) and outputting light propagating within the optical apparatus. A method for coupling light into and out of an optical resonator using a nanoparticle or nanoparticles to interface with spatially separated far-field optical elements.Type: GrantFiled: December 17, 2021Date of Patent: April 22, 2025Assignee: Arizona Board of Regents on Behalf of The University of ArizonaInventors: Tsu-Te Judith Su, Euan McLeod
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Patent number: 12282257Abstract: A pellicle assembly for large-size photomasks including a frame member configured to be affixed to a large-size photomask substrate, a substantially rigid and transparent pellicle membrane affixed to the frame member so as to protect at least a portion of the large-size photomask substrate from contamination during usage, storage and/or transport, and a coating on at least one of top and bottom surfaces of the pellicle membrane that binds the pellicle membrane to prevent separation of pellicle membrane material in the event of breakage.Type: GrantFiled: April 29, 2024Date of Patent: April 22, 2025Assignee: PHOTRONICS, INC.Inventors: Bryan S. Kasprowicz, Christopher Progler
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Patent number: 12283518Abstract: The present disclosure provides a method for fabricating a semiconductor device including providing a photomask including an opaque layer on a mask substrate and surrounding a translucent layer on the mask substrate, wherein the translucent layer includes a mask opening of contact portion which exposes a portion of the mask substrate; providing a stack structure including an etch stop layer on a bottom conductive layer and a first inter-dielectric layer on the etch stop layer, and forming a pre-process mask layer on the stack structure; patterning the pre-process mask layer using the photomask to form a patterned mask layer including a mask region corresponding to the opaque layer, a region of body portion corresponding to the translucent layer, and a hole of contact portion corresponding to the mask opening of contact portion.Type: GrantFiled: May 25, 2022Date of Patent: April 22, 2025Assignee: NANYA TECHNOLOGY CORPORATIONInventor: Chih-Hsuan Yeh
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Patent number: 12282250Abstract: This application relates to a pellicle for extreme ultraviolet lithography based on yttrium (Y) and used in a lithography process using extreme ultraviolet rays. In one aspect, the pellicle includes a pellicle layer including a core layer formed of an yttrium-based material expressed as Y-M (M is one of B, Si, O, or F).Type: GrantFiled: March 18, 2022Date of Patent: April 22, 2025Assignee: KOREA ELECTRONICS TECHNOLOGY INSTITUTEInventors: Hyeong Keun Kim, Seul Gi Kim, Hyun Mi Kim, Jin Woo Cho, Ki Hun Seong
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Patent number: 12278270Abstract: A method forms a part of a power semiconductor device. The method includes homoepitaxially forming two silicon carbide layers on a first side of a silicon carbide substrate and forming a pattern of pits on a second side of the silicon carbide substrate. The two layers include a buffer layer, on the first side of the silicon carbide substrate, and have a same doping type of the silicon carbide substrate and a doping concentration equal to or greater than 1017 cm?3 in order to increase the quality of at least one subsequent SiC layer. The two layers include an etch stopper layer, being deposited on the buffer layer and has a same doping type as the buffer layer but a lower doping concentration in order to block a trenching process. The pattern of pits, obtained by electrochemical etching, extends completely thorough the silicon carbide substrate and the buffer layer.Type: GrantFiled: November 5, 2020Date of Patent: April 15, 2025Assignee: ETH ZuerichInventors: Massimo Camarda, Ulrike Grossner
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Patent number: 12276905Abstract: The present disclosure relates to a blank mask and the like, and comprises a transparent substrate and a light shielding film disposed on the transparent substrate. The light shielding film comprises a transition metal and at least any one between oxygen and nitrogen. The light shielding film comprises a first light shielding layer and a second light shielding layer disposed on the first light shielding layer. The light shielding film has an Rd value of Equation 1 below which is 0.4 to 0.8. Rd=er2/er1??[Equation 1] In the Equation 1, the er1 value is an etching rate of the first light shielding layer measured by etching with argon gas. The er2 value is an etching rate of the second light shielding layer measured by etching with argon gas. In such a blank mask, a resolution degradation can be suppressed effectively when the light shielding film is patterned.Type: GrantFiled: May 20, 2022Date of Patent: April 15, 2025Assignee: SK enpulse Co., Ltd.Inventors: GeonGon Lee, Inkyun Shin, Seong Yoon Kim, Suk Young Choi, Hyung-joo Lee, Sung Hoon Son, Min Gyo Jeong
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Patent number: 12271107Abstract: A method for mask data synthesis and mask making includes calibrating an optical proximity correction (OPC) model by adjusting a plurality of parameters including a first parameter and a second parameter, wherein the first parameter indicates a long-range effect caused by an electron-beam lithography tool for making a mask used to manufacture a structure, and the second parameter indicates a geometric feature of a structure or a manufacturing process to make the structure, generating a device layout, calculating a first grid pattern density map of the device layout, generating a long-range correction map, at least based on the calibrated OPC model and the first grid pattern density map of the device layout, and performing an OPC to generate a corrected mask layout, at least based on the generated long-range correction map and the calibrated OPC model.Type: GrantFiled: February 29, 2024Date of Patent: April 8, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Hsu-Ting Huang, Shih-Hsiang Lo, Ru-Gun Liu
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Patent number: 12270122Abstract: A silicon carbide wafer has one surface and the other surface opposite to the one surface. An average Rmax roughness of the one surface is 2.0 nm or less, and an average Ra roughness of the one surface is 0.1 nm or less. An edge region is a region in which a distance from an edge of the silicon carbide wafer toward a center is 5% to 75% of a radius of the silicon carbide wafer, and a central region is a region having a radius of 25% of the radius of the silicon carbide wafer at the center of the silicon carbide wafer. A difference between an average Rmax roughness of the edge region of the one surface and an average Rmax roughness of the central region of the one surface is 0.01 nm to 0.5 nm.Type: GrantFiled: June 9, 2022Date of Patent: April 8, 2025Assignee: SENIC Inc.Inventors: Jung Woo Choi, Myung Ok Kyun, Jong Hwi Park, Jung Doo Seo, Jung-Gyu Kim, Kap-Ryeol Ku
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Patent number: 12265321Abstract: With respect to a reflective mask blank for a reflective mask used in EUV lithography using EUV light, the reflective mask blank including a substrate, a multilayer reflection film having a periodically laminated structure in which low-refractive index layers composed of a material containing molybdenum and high-refractive index layers are alternately laminated, a protection film, and an absorber film is provided. The low-refractive index layer consists of one or more of first low-refractive index sublayers, and one or more of second low-refractive index sublayers that have a different composition from a composition of the first low-refractive index sublayer.Type: GrantFiled: May 31, 2022Date of Patent: April 1, 2025Assignee: SHIN-ETSU CHEMICAL CO., LTD.Inventors: Takuro Kosaka, Taiga Ogose, Yukio Inazuki, Hideo Kaneko
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Patent number: 12265323Abstract: A pellicle for an EUV photo mask includes a first layer; a second layer; and a main layer disposed between the first layer and second layer and including a plurality of nanotubes. At least one of the first layer or the second layer includes a two-dimensional material in which one or more two-dimensional layers are stacked. In one or more of the foregoing and following embodiments, the first layer includes a first two-dimensional material and the second layer includes a second two-dimensional material.Type: GrantFiled: November 21, 2023Date of Patent: April 1, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Tzu-Ang Chao, Chao-Ching Cheng, Han Wang
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Patent number: 12265322Abstract: An extreme ultraviolet mask including a substrate, a reflective multilayer stack on the substrate and a capping layer on the reflective multilayer stack is provided. The reflective multilayer stack is treated prior to formation of the capping layer on the reflective multilayer stack. The capping layer is formed by an ion-assisted ion beam deposition or an ion-assisted sputtering process.Type: GrantFiled: August 4, 2023Date of Patent: April 1, 2025Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Ping-Hsun Lin, Pei-Cheng Hsu, Ching-Fang Yu, Ta-Cheng Lien, Chia-Jen Chen, Hsin-Chang Lee
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Patent number: 12259855Abstract: A system receives a layout representation of a metasurface, the metasurface including a number of scatterers arranged in a spatial order, each scatterer having one of a number of geometries. The system identifies one or more consecutive ones of the scatterers in the spatial order. The system identifies a sequence representing consecutive ones of the geometries, the sequence being associated with one or more consecutive ones of the scatterers in the spatial order. The system associates a two-dimensional coordinate to the sequence, the two-dimensional coordinate corresponding to a position in the metasurface where the sequence starts. The system generates an output layout file including a reference to the sequence and the associated two-dimensional coordinate.Type: GrantFiled: September 28, 2023Date of Patent: March 25, 2025Assignee: Ansys, Inc.Inventor: Jens Niegemann
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Patent number: 12259648Abstract: A photomask protection device, a photomask protection system, and a use method of a photomask protection system are provided. The photomask protection device includes a frame and a pellicle. The frame is disposed on a substrate of a photomask and is provided with a clamping space. Edges of the pellicle are fixed in the clamping space.Type: GrantFiled: February 10, 2022Date of Patent: March 25, 2025Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.Inventor: Fei Sun
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Patent number: 12259649Abstract: In a method of cleaning a photo mask, the photo mask is placed on a support such that a pattered surface faces down, and an adhesive sheet is applied to edges of a backside surface of the photo mask.Type: GrantFiled: November 22, 2023Date of Patent: March 25, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Hsin-Chang Lee, Pei-Cheng Hsu, Hao-Ping Cheng, Ta-Cheng Lien
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Patent number: 12253797Abstract: The present disclosure provides an apparatus for a semiconductor lithography process. The apparatus includes a mask defining a circuit pattern to be transferred. The apparatus further includes a pellicle including a pattern formed in a first surface, wherein the pellicle is attached to the mask at the first surface. The apparatus also includes an adhesive material layer disposed between the mask and the first surface. The pattern may include a plurality of capillaries. Each capillary of the plurality of capillaries may have a dimension in a plane of the first surface between about 1 ?m and about 500 ?m. Each capillary of the plurality of capillaries may have a ratio of depth to width greater than or equal to about 100. The adhesive material layer may include an adhesive having a glass transition temperature (Tg) greater than room temperature.Type: GrantFiled: July 27, 2023Date of Patent: March 18, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventor: Yun-Yue Lin
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Patent number: 12253796Abstract: A photolithography mask includes a substrate, a reflective multilayer structure over the substrate, an adhesion layer over the reflective multilayer structure, a capping layer over the adhesion layer, and a patterned absorber layer over the capping layer. The capping layer includes a non-crystalline conductive material.Type: GrantFiled: December 19, 2023Date of Patent: March 18, 2025Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventor: Yun-Yue Lin
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Patent number: 12248243Abstract: This application relates to a method for direct growth of multilayer graphene used as a core layer of a pellicle for extreme ultraviolet lithography. This application also relates to a method for manufacturing the pellicle for extreme ultraviolet lithography by using the multilayer graphene direct growth method. The multilayer graphene direct growth method may include forming few-layer graphene on a silicon nitride substrate, forming a metal catalyst layer on the few-layer graphene, and forming an amorphous carbon layer on the metal catalyst layer. The method may also include directly growing multilayer graphene from the few-layer graphene used as a seed layer by interlayer exchange between the metal catalyst layer and the amorphous carbon layer through heat treatment.Type: GrantFiled: November 10, 2021Date of Patent: March 11, 2025Assignee: Korea Electronics Technology InstituteInventors: Hyeong Keun Kim, Seul Gi Kim, Hyun Mi Kim, Hye Young Kim
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Patent number: 12248245Abstract: A method includes: inspecting a reticle in a reticle pod, the reticle pod including a sealed space to accommodate the reticle, and the reticle pod further comprising a window arranged on an upper surface of the reticle pod, wherein the inspecting is performed through the window; and moving the reticle out of the reticle pod for performing a lithography operation using the reticle.Type: GrantFiled: July 30, 2023Date of Patent: March 11, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Wang Cheng Shih, Hao-Ming Chang, Chung-Yang Huang, Cheng-Ming Lin
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Patent number: 12248242Abstract: Methods and systems for fracturing a pattern to be exposed on a surface using variable shaped beam (VSB) lithography include inputting an initial pattern; calculating a first substrate pattern from the initial pattern; overlaying the initial pattern with a two-dimensional grid, wherein an initial set of VSB shots are formed by a union of the initial pattern with locations on the grid; and merging two or more adjacent shots in the initial set of VSB shots to create a larger shot in a modified set of VSB shots; and outputting the modified set of VSB shots. The methods and systems also include calculating a calculated pattern to be exposed on the surface with the modified set of VSB shots; and calculating a second substrate pattern from the calculated pattern to be exposed on the surface.Type: GrantFiled: March 11, 2024Date of Patent: March 11, 2025Assignee: D2S, Inc.Inventors: Akira Fujimura, P. Jeffrey Ungar, Nagesh Shirali
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Patent number: 12242181Abstract: A portion of a buffer layer on a backside of a substrate of a photomask assembly may be removed prior to formation of one or more capping layers on the backside of the substrate. The one or more capping layers may be formed directly on the backside of the substrate where the buffer layer is removed from the substrate, and a hard mask layer may be formed directly on the one or more capping layers. The one or more capping layers may include a low-stress material to promote adhesion between the one or more capping layers and the substrate, and to reduce and/or minimize peeling and delamination of the capping layer(s) from the substrate. This may reduce the likelihood of damage to the pellicle layer and/or other components of the photomask assembly and/or may increase the yield of an exposure process in which the photomask assembly is used.Type: GrantFiled: July 31, 2023Date of Patent: March 4, 2025Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Kuo-Hao Lee, Hsi-Cheng Hsu, Jui-Chun Weng, Han-Zong Pan, Hsin-Yu Chen, You-Cheng Jhang
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Patent number: 12242182Abstract: The present disclosure provides a method for removing particles. The method includes: receiving a pellicle including a pellicle membrane, wherein a particle is disposed on the pellicle membrane; passing a light beam through an object lens, wherein the light beam is focused on a focal region in front of the pellicle membrane by the object lens, and the particle is attracted to be trapped at the focal region; and removing the particle from the pellicle membrane at the focal region.Type: GrantFiled: October 10, 2023Date of Patent: March 4, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Tzu Han Liu, Chih-Wei Wen, Chung-Hung Lin