Radiation Mask Patents (Class 430/5)
  • Patent number: 11042054
    Abstract: The present disclosure provides a display panel and a display device, the display panel includes a first substrate, the first substrate defines a photoresist layer; a second substrate, the second substrate defines an identification region, a surface of the first substrate having the photoresist layer faces a surface of the second substrate having the identification region; and a frame glue, the frame glue is defined between the first substrate and the second substrate, and the frame glue encloses a space between the first substrate and the second substrate to form a filling area, and the identification region is defined at the outside of the frame glue; the photoresist layer defines an anti-overflow groove located at an area between the identification region and the frame glue.
    Type: Grant
    Filed: January 24, 2019
    Date of Patent: June 22, 2021
    Assignees: HKC Corporation Limited, Chongqing HKC Optoelectronics Technology Co., Ltd.
    Inventor: Yunqin Hu
  • Patent number: 11042084
    Abstract: A photomask includes a pattern region and a plurality of defects in the pattern region. The photomask further includes a first fiducial mark outside of the pattern region, wherein the first fiducial mark includes identifying information for the photomask, the first fiducial mark has a first size and a first shape. The photomask further includes a second fiducial mark outside of the pattern region. The second fiducial mark has a second size different from the first size, or a second shape different from the first shape.
    Type: Grant
    Filed: April 30, 2019
    Date of Patent: June 22, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsin-Chang Lee, Chia-Jen Chen, Chih-Cheng Lin, Ping-Hsun Lin
  • Patent number: 11037786
    Abstract: A semiconductor structure includes a semiconductor substrate and a multi-layer patterning material film stack formed on the semiconductor substrate. The patterning material film stack includes a resist layer formed over one or more additional layers. The semiconductor structure further includes a metal-containing top coat formed over the resist layer. The metal-containing top coat can be formed, for example, by atomic layer deposition or spin-on deposition over the resist layer, or by self-segregation from the resist layer.
    Type: Grant
    Filed: May 6, 2019
    Date of Patent: June 15, 2021
    Assignee: International Business Machines Corporation
    Inventors: Ekmini Anuja De Silva, Dario Goldfarb, Nelson Felix, Daniel Corliss, Rudy J. Wojtecki
  • Patent number: 11036127
    Abstract: A reflective mask blank includes a backside conductive film on a back surface of a substrate. The backside conductive film has a laminated structure including a stress compensation layer and a conductive layer in this order from the substrate side. The conductive layer includes a metal nitride. The stress compensation layer has a compressive stress and the stress compensation layer includes at least one compound selected from the group consisting of oxides, oxynitrides, and nitrides, each having an absorption coefficient (k) over the wavelength range of 400 nm to 800 nm being 0.1 or less. The conductive layer has a thickness of 5 nm or more and 30 nm or less. The backside conductive film has a total thickness of 50 nm or more.
    Type: Grant
    Filed: August 7, 2018
    Date of Patent: June 15, 2021
    Assignee: AGC INC.
    Inventors: Hirotomo Kawahara, Hiroshi Hanekawa, Toshiyuki Uno
  • Patent number: 11029595
    Abstract: A method comprising the steps of receiving a mask assembly comprising a mask and a removable EUV transparent pellicle held by a pellicle frame, removing the pellicle frame and EUV transparent pellicle from the mask, using an inspection tool to inspect the mask pattern on the mask, and subsequently attaching to the mask an EUV transparent pellicle held by a pellicle frame. The method may also comprise the following steps: after removing the pellicle frame and EUV transparent pellicle from the mask, attaching to the mask an alternative pellicle frame holding an alternative pellicle formed from a material which is substantially transparent to an inspection beam of the inspection tool; and after using an inspection tool to inspect the mask pattern on the mask, removing the alternative pellicle held by the alternative pellicle frame from the mask in order to attach to the mask the EUV transparent pellicle held by the pellicle frame.
    Type: Grant
    Filed: December 9, 2019
    Date of Patent: June 8, 2021
    Assignee: ASML Netherlands B.V.
    Inventors: Derk Servatius Gertruda Brouns, Dennis De Graaf, Robertus Cornelis Martinus De Kruif, Paul Janssen, Matthias Kruizinga, Arnoud Willem Notenboom, Daniel Andrew Smith, Beatrijs Louise Marie-Joseph Katrien Verbrugge, James Norman Wiley
  • Patent number: 11022876
    Abstract: Extreme ultraviolet (EUV) mask blanks, methods for their manufacture and production systems therefor are disclosed. The EUV mask blanks comprise a multilayer stack of absorber layers on the capping layer, the multilayer stack of absorber layers including a plurality of absorber layer pairs.
    Type: Grant
    Filed: March 17, 2020
    Date of Patent: June 1, 2021
    Assignee: APPLIED MATERIALS, INC.
    Inventor: Vibhu Jindal
  • Patent number: 11022893
    Abstract: An optical assembly includes an optical element (13), configured in particular for the reflection of EUV radiation (4), and a protective element (30) for protecting a surface (31) of the optical element (13, 14) from contaminating substances (P). The protective element (30) has a membrane (33a-c) and a frame (34) on which the membrane (33a-c) is mounted. The membrane is formed by a plurality of membrane segments (33a, 33b, 33c) which respectively protect a partial region (T) of the surface (31) of the optical element (13) from the contaminating substances (P). The optical assembly can form part of an overall optical arrangement, for example an EUV lithography system.
    Type: Grant
    Filed: April 28, 2018
    Date of Patent: June 1, 2021
    Assignee: CARL ZEISS SMT GMBH
    Inventors: Dirk Heinrich Ehm, Stefan-Wolfgang Schmidt
  • Patent number: 11023651
    Abstract: A method for manufacturing a semiconductor device includes performing an optical proximity correction (OPC) process on a designed layout based on a final model signal obtained according to an OPC modeling process to generate a corrected layout, the OPC modeling process including, selecting a transmittance value of a sub-layout pattern of a sub-layout included in a target layout, the transmittance value being a parameter of an OPC model and representing an intensity of light that transmits through a photomask, and generating a final model signal based on the transmittance value of the sub-layout pattern, and forming a photoresist pattern on a substrate using the photomask generated based on the corrected layout.
    Type: Grant
    Filed: November 25, 2019
    Date of Patent: June 1, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Sang Chul Yeo
  • Patent number: 11022874
    Abstract: The present disclosure provides a mask. The mask includes a substrate; an etch stop layer disposed on the substrate, wherein the etch stop layer includes at least one of ruthenium oxide, tungsten nitride, and titanium nitride and is doped with at least one of phosphorous (P), calcium (Ca), and sodium (Na); and a material layer disposed on the etch stop layer and patterned to have an opening, wherein the etch stop layer completely covers a portion of the substrate within the opening.
    Type: Grant
    Filed: August 22, 2019
    Date of Patent: June 1, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yun-Yue Lin, Hsin-Chang Lee
  • Patent number: 11016382
    Abstract: A mask blank including a phase shift film is provided, wherein the phase shift film has a transmittance with respect to exposure light of an ArF excimer laser of not less than 10% and not more than 20% and is configured to transmit the exposure light to have a phase difference of not less than 150 degrees and not more than 190 degrees with respect to exposure light transmitted through the air for the same distance as a thickness of the phase shift film. A ratio of the metal content to the total content of the metal and silicon in the phase shift film is not less than 5% and not more than 10%, the oxygen content in the phase shift film is 10 atom % or more, and the silicon content in the phase shift film is three times or more the oxygen content.
    Type: Grant
    Filed: December 5, 2019
    Date of Patent: May 25, 2021
    Assignee: HOYA CORPORATION
    Inventors: Atsushi Kominato, Osamu Nozawa
  • Patent number: 11009803
    Abstract: A mask assembly suitable for use in a lithographic process, the mask assembly comprising a patterning device; and a pellicle frame configured to support a pellicle and mounted on the patterning device with a mount; wherein the mount is configured to suspend the pellicle frame relative to the patterning device such that there is a gap between the pellicle frame and the patterning device; and wherein the mount provides a releasably engageable attachment between the patterning device and the pellicle frame.
    Type: Grant
    Filed: September 30, 2019
    Date of Patent: May 18, 2021
    Assignees: ASML Netherlands B.V., ASML Holding N.V.
    Inventors: Matthias Kruizinga, Maarten Mathijs Marinus Jansen, Jorge Manuel Azeredo Lima, Erik Willem Bogaart, Derk Servatius Gertruda Brouns, Marc Bruijn, Richard Joseph Bruls, Jeroen Dekkers, Paul Janssen, Mohammad Reza Kamali, Ronald Harm Gunther Kramer, Robert Gabriël Maria Lansbergen, Martinus Hendrikus Antonius Leenders, Matthew Lipson, Erik Roelof Loopstra, Joseph H. Lyons, Stephen Roux, Gerrit Van Den Bosch, Sander Van Den Heijkant, Sandra Van Der Graaf, Frits Van Der Meulen, Jérôme François Sylvain Virgile Van Loo, Beatrijs Louise Marie-Joseph Katrien Verbrugge
  • Patent number: 11003068
    Abstract: Provided are a reflective mask blank, having a phase shift film having little dependence of phase difference and reflectance on film thickness, and a reflective mask. The reflective mask blank is characterized in that the phase shift film is composed of a material comprised of an alloy having two or more types of metal so that reflectance of the surface of the phase shift film is more than 3% to not more than 20% and so as to have a phase difference of 170 degrees to 190 degrees, and when a group of metal elements that satisfies the refractive index n and the extinction coefficient k of k>?*n+? is defined as Group A and a group of metal elements that satisfies the refractive index n and the extinction coefficient k of k<?*n+? is defined as Group B, the alloy is such that the composition ratio is adjusted so that the amount of change in the phase difference is within the range of ±2 degrees and the amount of change in reflectance is within the range of ±0.
    Type: Grant
    Filed: February 20, 2018
    Date of Patent: May 11, 2021
    Assignee: HOYA CORPORATION
    Inventors: Yohei Ikebe, Tsutomu Shoki, Takahiro Onoue, Hirofumi Kozakai
  • Patent number: 11003098
    Abstract: Tooling for a mask assembly suitable for use in a lithographic process, the mask assembly comprising a patterning device; and a pellicle frame configured to support a pellicle and mounted on the patterning device with a mount; wherein the mount provides a releasably engageable attachment between the patterning device and the pellicle frame.
    Type: Grant
    Filed: November 18, 2019
    Date of Patent: May 11, 2021
    Assignee: ASML Netherlands B.V
    Inventors: Frits Van Der Meulen, Maarten Mathijs Marinus Jansen, Jorge Manuel Azeredo Lima, Derk Servatius Gertruda Brouns, Marc Bruijn, Jeroen Dekkers, Paul Janssen, Ronald Harm Gunther Kramer, Matthias Kruizinga, Robert Gabriël Maria Lansbergen, Martinus Hendrikus Antonius Leenders, Erik Roelof Loopstra, Gerrit Van Den Bosch, Jérôme François Sylvain Virgile Van Loo, Beatrijs Louise Marie-Joseph Katrien Verbrugge, Angelo Cesar Peter De Klerk, Jacobus Maria Dings, Maurice Leonardus Johannes Janssen, Roland Jacobus Johannes Kerstens, Martinus Jozef Maria Kester, Michel Loos, Geert Middel, Silvester Matheus Reijnders, Frank Johannes Christiaan Theuerzeit, Anne Johannes Wilhelmus Van Lievenoogen
  • Patent number: 11003069
    Abstract: The present disclosure provides an embodiment of a reflective mask that includes a substrate; a reflective multilayer disposed on the substrate; an anti-oxidation barrier layer disposed on the reflective multilayer and the anti-oxidation barrier layer is in amorphous structure with an average interatomic distance less than an oxygen diameter; and an absorber layer disposed on the anti-oxidation barrier layer and patterned according to an integrated circuit layout.
    Type: Grant
    Filed: May 4, 2020
    Date of Patent: May 11, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chia-Hao Yu, Chi-Lun Lu, Chih-Tsung Shih, Ching-Wei Shen, Jeng-Horng Chen
  • Patent number: 11003070
    Abstract: The present invention relates to a pellicle frame including a frame base, a black anodized film formed on a surface of the frame base and having a thickness of 2.0 to 7.5 ?m, and a transparent polymer electrodeposition coating film formed on the anodized film, and a production method thereof; and to a pellicle including the pellicle frame and a pellicle film provided on one end face of the pellicle frame.
    Type: Grant
    Filed: April 1, 2019
    Date of Patent: May 11, 2021
    Assignee: Shin-Etsu Chemical Co., Ltd.
    Inventor: Yuichi Hamada
  • Patent number: 10996554
    Abstract: A substrate with an electrically conductive film for fabricating a reflective mask is obtained that is capable of preventing positional shift of the reflective mask during pattern transfer. Provided is a substrate with an electrically conductive film used in lithography, the substrate with an electrically conductive film having an electrically conductive film formed on one of the main surfaces of a mask blank substrate, and a coefficient of static friction of the surface of the electrically conductive film is not less than 0.25.
    Type: Grant
    Filed: February 20, 2020
    Date of Patent: May 4, 2021
    Assignee: HOYA CORPORATION
    Inventors: Takumi Kobayashi, Kazuhiro Hamamoto, Tatsuo Asakawa, Tsutomu Shoki
  • Patent number: 10996558
    Abstract: Examples of a multiple-mask multiple-exposure lithographic technique and suitable masks are provided herein. In some examples, a photomask includes a die area and a stitching region disposed adjacent to the die area and along a boundary of the photomask. The stitching region includes a mask feature for forming an integrated circuit feature and an alignment mark for in-chip overlay measurement.
    Type: Grant
    Filed: October 21, 2019
    Date of Patent: May 4, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Peter Yu, Chih-Tung Hsu, Kevin Wang, Chih-Chia Hu, Roger Chen
  • Patent number: 10996553
    Abstract: A reticle and a method for manufacturing the same are provided. The reticle includes a mask substrate, a reflective multilayer (ML), a capping layer and an absorption composite structure. The reflective ML is positioned over a front-side surface of the mask substrate. The capping layer is positioned over the reflective ML. The absorption composite structure is positioned over the capping layer. The absorption composite structure includes a first absorption layer, a second absorption layer, a third absorption layer and an etch stop layer. The first absorption layer is positioned over the capping layer. The second absorption layer is positioned over the first absorption layer. The third absorption layer is positioned over the second absorption layer. The etch stop layer is positioned between the first absorption layer and the second absorption layer. The first absorption layer and the second absorption layer are made of the same material.
    Type: Grant
    Filed: September 12, 2018
    Date of Patent: May 4, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Wen-Chang Hsueh, Huan-Ling Lee, Chia-Jen Chen, Hsin-Chang Lee
  • Patent number: 10990744
    Abstract: Various integrated circuit (IC) design methods are disclosed herein. An exemplary method includes receiving an IC design layout having an IC feature to be formed on a wafer using a lithography process and inserting a spacing in the IC feature, thereby generating a modified IC design layout that divides the IC feature into a first main feature and a second main feature separated by the spacing. The spacing has a sub-resolution dimension, such that the IC feature does not include the spacing when formed on the wafer by the lithography process using the modified IC design layout. A mask can be fabricated based on the modified IC design layout, wherein the mask includes the first main feature and the second main feature separated by the spacing. A lithography process can be performed using the mask to form the IC feature (without the spacing) on a wafer.
    Type: Grant
    Filed: January 11, 2018
    Date of Patent: April 27, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chin-Min Huang, Bo-Han Chen, Cherng-Shyan Tsay, Chien Wen Lai, Hua-Tai Lin, Chia-Cheng Chang, Lun-Wen Yeh, Shun-Shing Yang
  • Patent number: 10988400
    Abstract: The present invention relates to a transparent sealing member. A quartz glass transparent sealing member is used in an optical component having at least one optical element, and a mounting board on which the optical element is mounted, and constitutes, with the mounting board, a package that houses the optical element. The concentration of aluminum in a surface portion is higher than the concentration of aluminum in an inner portion.
    Type: Grant
    Filed: February 26, 2020
    Date of Patent: April 27, 2021
    Assignee: NGK Insulators, Ltd.
    Inventors: Yoshio Kikuchi, Hiroyuki Shibata
  • Patent number: 10990741
    Abstract: A method includes assigning a first color group to a first routing track of the layout. The method further includes assigning a second color group to a second routing track of the layout. The method includes assigning the first color group to a third routing track of the layout, wherein the second routing track is between the first routing track and the third routing track. The method further includes assigning a first color from the first color group to a first conductive element along the first routing track. The method further includes assigning a second color from the first color group to a second conductive element along the first routing track. The method further includes assigning a third color from the second color group to a third conductive element on the second routing track, wherein the third color is different from each of the first color and the second color.
    Type: Grant
    Filed: November 7, 2019
    Date of Patent: April 27, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yen-Hung Lin, Chung-Hsing Wang, Yuan-Te Hou
  • Patent number: 10990000
    Abstract: The present disclosure teaches a photolithography plate and a mask correction method, and relates to the field of semiconductor technologies. In forms of the mask correction method, a patterned mask is formed on a substrate, a location of a scattering bar embedded in the substrate is determined according to the mask, and an opening is formed at the determined location so as to embed the scattering bar in the opening. A scattering bar is embedded in a substrate of a photolithography plate so as to effectively avoid the impact of the scattering bar on a mask pattern, reduce a deposition loss, improve the correction effect, and shorten a correction time.
    Type: Grant
    Filed: August 10, 2018
    Date of Patent: April 27, 2021
    Assignees: Semiconductor Manufacturing (Shanghai) International Corporation, Semiconductor Manufacturing (Beijing) International Corporation
    Inventors: Jiancheng Zhang, Wei Wu, Chenbo Zhang
  • Patent number: 10989999
    Abstract: A halftone phase shift mask blank comprising a transparent substrate and a halftone phase shift film thereon is provided. The halftone phase shift film includes at least one layer composed of a silicon base material having a transition metal content ?3 at %, a Si+N+O content ?90 at %, a Si content of 30-70 at %, a N+O content of 30-60 at %, and an O content ?30 at %, and having a sheet resistance ?1013/?/?. The halftone phase shift film undergoes minimal pattern size variation degradation upon exposure to sub-200 nm radiation, and has chemical resistance and improved processability.
    Type: Grant
    Filed: September 27, 2019
    Date of Patent: April 27, 2021
    Assignee: SHIN-ETSU CHEMICAL CO., LTD.
    Inventors: Yukio Inazuki, Takuro Kosaka, Kouhei Sasamoto, Hideo Kaneko
  • Patent number: 10983429
    Abstract: A retargeting method for optical proximity correction (OPC) is provided. The method includes: assigning evaluation points for defining profile of a layout pattern; identifying critical regions of the layout pattern that could result in limitation on the process window of the OPC; categorizing the critical regions based on geometries of the critical regions; obtaining movable ranges and address information of the evaluation points; and shifting the evaluation points according to the parameters obtained during the previous steps.
    Type: Grant
    Filed: August 18, 2020
    Date of Patent: April 20, 2021
    Assignee: Powerchip Semiconductor Manufacturing Corporation
    Inventor: Chun-Liang Lin
  • Patent number: 10983427
    Abstract: A mask blank substrate and a method for selecting a mask blank substrate wherein a square calculation region is set on the main surface of the substrate. Specific points are set at the corner portions of the calculation region. The heights of the specific points from a reference plane are acquired, an imaginary plane passing through three of the specific points is set, an intersection between the imaginary plane and a perpendicular line that passes through the remaining of the specific points and that is perpendicular to the reference plane is set, and the distance between the remaining of the specific points and the intersection is calculated. A substrate in which the distance satisfies a predetermined reference value is selected as a mask blank substrate.
    Type: Grant
    Filed: July 10, 2017
    Date of Patent: April 20, 2021
    Assignee: HOYA CORPORATION
    Inventor: Masaru Tanabe
  • Patent number: 10969687
    Abstract: A method for forming patterns is provided in the present invention. The process includes the steps of using a first mask to perform a first exposure process to a photoresist, using a second mask to perform a second exposure process to the photoresist, wherein the corners of the second opening patterns in the second mask and the corners of the first opening patterns in the first mask overlap each other, and performing a development process to remove the unexposed portions of the photoresist in the two exposure processes to form staggered hole patterns therein.
    Type: Grant
    Filed: December 4, 2018
    Date of Patent: April 6, 2021
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Harn-Jiunn Wang, Kai-Ming Liu, Chin-Lung Lin, Yi-Hsiu Lee
  • Patent number: 10969678
    Abstract: The invention relates to a system (2) for producing an optical mask (35) for surface treatment, in particular surface microtexturing, said system (2) comprising: a layer of material (20) which has an outer surface (21) that is exposed to the outside environment; and a generating and depositing device for generating and depositing droplets (30) on the outer surface (21) of the layer of material (20) in which a specific arrangement (31), forming the optical mask (35) on the outer surface (21) of the layer of material (20). The invention also relates to a treatment plant comprising a system (2) of said type. The invention further relates to a method for producing a mask as well as to a method for surface treatment.
    Type: Grant
    Filed: June 21, 2017
    Date of Patent: April 6, 2021
    Assignees: H.E.F., Universite Jean Monnet Saint Etienne, Centre National De La Recherche Scientifique (CNRS)
    Inventors: Maxime Bichotte, Yves Jourlin, Laurent Dubost
  • Patent number: 10969679
    Abstract: The invention relates to a system (2) for producing an optical mask (35) for surface microtexturing, said system (2) comprising: a substrate (10) having a surface (11) that is to be textured; a layer of material (20) which covers the surface (11) of the substrate (10) and has an outer surface (21) that is exposed to the outside environment; and a generating and depositing device for generating and depositing droplets (30) on the outer surface (21) of the layer of material (20), in a specific arrangement (31) under condensation, forming the optical mask (35) on the outer surface (21) of the layer of material (20). The invention also relates to a treatment plant comprising a system (2) of said type. The invention further relates to a method for producing a mask as well as to a surface microtexturing method.
    Type: Grant
    Filed: June 21, 2017
    Date of Patent: April 6, 2021
    Assignees: H.E.F., Universite Jean Monnet Saint Etienne, Centre National De La Recherche Scientifique (CNRS)
    Inventors: Maxime Bichotte, Yves Jourlin, Laurent Dubost
  • Patent number: 10969701
    Abstract: Tooling for a mask assembly suitable for use in a lithographic process, the mask assembly comprising a patterning device; and a pellicle frame configured to support a pellicle and mounted on the patterning device with a mount; wherein the mount provides a releasably engageable attachment between the patterning device and the pellicle frame.
    Type: Grant
    Filed: September 16, 2019
    Date of Patent: April 6, 2021
    Assignee: ASML Netherlands B.V.
    Inventors: Frits Van Der Meulen, Maarten Mathijs Marinus Jansen, Jorge Manuel Azeredo Lima, Derk Servatius Gertruda Brouns, Marc Bruijn, Jeroen Dekkers, Paul Janssen, Ronald Harm Gunther Kramer, Matthias Kruizinga, Robert Gabriël Maria Lansbergen, Martinus Hendrikus Antonius Leenders, Erik Roelof Loopstra, Gerrit Van Den Bosch, Jérôme François Sylvain Virgile Van Loo, Beatrijs Louise Marie-Joseph Katrien Verbrugge, Angelo Cesar Peter De Klerk, Jacobus Maria Dings, Maurice Leonardus Johannes Janssen, Roland Jacobus Johannes Kerstens, Martinus Jozef Maria Kester, Michel Loos, Geert Middel, Silvester Matheus Reijnders, Frank Johannes Christiaan Theuerzeit, Anne Johannes Wilhelmus Van Lievenoogen
  • Patent number: 10971409
    Abstract: Semiconductor devices having measurement features and associated systems and methods are disclosed herein. In one embodiment, a semiconductor device includes a plurality of stacked semiconductor dies each having measurement features formed along an outer periphery of a surface thereof. One or more image capture devices can image the semiconductor device and a controller can detect the measurement features in imaging data received from the image capture devices. The controller can further determine the distance between two or more of the measurement features to estimate a bond line thickness between semiconductor dies in the stack.
    Type: Grant
    Filed: December 27, 2018
    Date of Patent: April 6, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Anilkumar Chandolu, Lisa R. Copenspire-Ross, Michael D. Kenney
  • Patent number: 10962874
    Abstract: A method of manufacturing a semiconductor device includes performing extreme ultraviolet (EUV) lithography that uses a mask for the EUV lithography manufactured by using a design layout on which optical proximity correction (OPC) is performed, and performing the OPC includes dividing respective patterns included in the design layout into partial patterns, classifying the partial patterns into a plurality of partial pattern groups, performing a first OPC on the design layout, and performing a second OPC that is different from the first OPC on the design layout on which the first OPC is performed, wherein performing the first OPC is performed on representative patterns selected from the plurality of partial pattern groups.
    Type: Grant
    Filed: April 12, 2019
    Date of Patent: March 30, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Akio Misaka, No-young Chung, Ki-soo Kim
  • Patent number: 10962886
    Abstract: Provided is a process of selecting a measurement location, the process including: obtaining pattern data describing a pattern to be applied to substrates in a patterning process; obtaining a process characteristic measured during or following processing of a substrate, the process characteristic characterizing the processing of the substrate; determining a simulated result of the patterning process based on the pattern data and the process characteristic; and selecting a measurement location for the substrate based on the simulated result.
    Type: Grant
    Filed: December 15, 2016
    Date of Patent: March 30, 2021
    Assignee: ASML NETHERLANDS B.V.
    Inventors: Hans Van Der Laan, Wim Tjibbo Tel, Marinus Jochemsen, Stefan Hunsche
  • Patent number: 10957555
    Abstract: A process method for producing a photomask with double patterns. The processing method includes obtaining a contact distribution pattern, having multiple contacts. The contacts are sorted into multiple contact blocks in array type, pair type and isolation type. The contacts are decomposed into a first patterning group and a second patterning group, which are configured to interpose to each other. The numbers of contacts of the first patterning group and the second patterning group are equal within an error range. The first patterning group and the second patterning group are check whether or not having adjacent two contacts with a distance less than a minimum distance. If it is less than a minimum distance, one of the adjacent two contacts is changed from a current one of the first patterning group and the second patterning group to another. The first/second patterning groups are output to from first/second photomasks.
    Type: Grant
    Filed: August 19, 2019
    Date of Patent: March 23, 2021
    Assignee: Winbond Electronics Corp.
    Inventors: Chien-Chin Huang, Shih-Min Tseng
  • Patent number: 10955740
    Abstract: The present invention provides; a pellicle frame which can effectively inhibit distortion of the photo mask (8) caused by mounting the pellicle (1), and which does not have a complex shape, and a pellicle which uses said pellicle frame are provided, and a manufacturing method of a blackened pellicle frame is also provided which can reduce the defect of the surface flickering under concentrated light and which facilitates inspection of the foreign matter adhesion prior to use. The present invention relates to a pellicle frame with an anodized film on a surface of an aluminum alloy frame, characterized in that: the aluminum alloy frame comprises an aluminum alloy which contains Ca: 5.0 to 10.
    Type: Grant
    Filed: June 30, 2017
    Date of Patent: March 23, 2021
    Assignees: NIPPON LIGHT METAL COMPANY, LTD., Mitsui Chemicals, Inc.
    Inventors: Yoshihiro Taguchi, Kazuo Kohmura, Daiki Taneichi
  • Patent number: 10957721
    Abstract: The CMOS LTPS TFT substrate manufacturing method, by a semi-transparent mask, forms a second photoresist pattern having a second photoresist section above a second poly-Si active layer where P-type ion heavy doping is to be performed as protection. Then, N-type ions are effectively prevented from being implanted into the second poly-Si active layer's second source/drain contact region when conducting N-type ion heaving doping to the first poly-Si active layer. There is no need to compensate P-type ions during the subsequent P-type ion heavy doping to the second poly-Si active layer for forming the second source/drain contact region. The present invention therefore reduces the productivity loss in the P-type ion heaving doping process and, as N-type ion heaving doping does not affect the PMOS transistors, enhances the electrical convergence of the PMOS transistors. Damage to the film lattice structure by the ion implantation is also reduced, thereby increasing the device reliability.
    Type: Grant
    Filed: September 18, 2018
    Date of Patent: March 23, 2021
    Assignee: WUHAN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Lisheng Li, Guanghui Liu
  • Patent number: 10948817
    Abstract: A circular mold-forming substrate of 125-300 mm diameter having a surface on which a topological pattern is to be formed is provided wherein the thickness of the substrate has a variation of up to 2 ?m within a circle having a diameter of 125 mm.
    Type: Grant
    Filed: February 9, 2012
    Date of Patent: March 16, 2021
    Assignee: SHIN-ETSU CHEMICAL CO., LTD.
    Inventors: Daijitsu Harada, Masaki Takeuchi
  • Patent number: 10947396
    Abstract: Curable antifouling compositions include fluorinated polymers that contain a perfluoropolyether group, a poly(alkyleneoxide) group, a hydrolyzable silane group and a cationic curative. The curable antifouling compositions can be applied on a surface of a substrate, and at least partially cured to provide an article with antifouling properties.
    Type: Grant
    Filed: November 8, 2013
    Date of Patent: March 16, 2021
    Assignee: 3M Innovative Properties Company
    Inventors: Zai-Ming Qiu, Alexander J. Kugel, Michael J. Svarovsky
  • Patent number: 10948816
    Abstract: The present invention provides a pellicle frame which can effectively inhibit deformation of an exposure master plate (8) caused by affixing the pellicle (1), and which does not have a complex shape, and a pellicle which uses said pellicle frame are provided. The pellicle frame with an anodized film on a surface of an aluminum alloy frame is characterized in that: the aluminum alloy frame comprises an aluminum alloy which contains Ca: 5.0 to 10.0% by weight with the remainder aluminum and unavoidable impurities are contained, and has an area (volume) ratio of an Al4Ca phase, which is a dispersed phase, is greater than or equal to 25%, and a crystal structure of a part of the Al4Ca phase is monoclinic; wherein the anodized film contains Al4Ca particles.
    Type: Grant
    Filed: June 30, 2017
    Date of Patent: March 16, 2021
    Assignee: NIPPON LIGHT METAL COMPANY, LTD.
    Inventors: Yoshihiro Taguchi, Takayuki Yamaguchi, Jun Yu, Yasuo Ishiwata
  • Patent number: 10942442
    Abstract: A mask blank is provided in which a phase-shift film is provided on a transparent substrate, the phase-shift film having a predetermined transmittance to ArF exposure light and being configured to shift a phase of ArF exposure light transmitted therethrough, wherein the phase-shift film comprises a nitrogen-containing layer that is formed from a material containing silicon and nitrogen and does not contain a transition metal, and wherein a content of oxygen in the nitrogen-containing layer, when measured by X-ray photoemission spectroscopy, is below a detection limit.
    Type: Grant
    Filed: October 31, 2019
    Date of Patent: March 9, 2021
    Assignee: HOYA CORPORATION
    Inventors: Osamu Nozawa, Hiroaki Shishido, Kazuya Sakai
  • Patent number: 10942440
    Abstract: Provided is a mask blank including a phase shift film having a transmittance of 20% or more difficult to achieve in a phase shift film of a single layer made of a silicon nitride material, and the phase shift film is achieved by using a structure having two or more sets of a stacked structure, each set including a low transmission layer and a high transmission layer disposed in order from a transparent substrate side. The mask blank includes a phase shift film on a transparent substrate. The phase shift film has a function of transmitting exposure light of an ArF excimer laser at a transmittance of 20% or more. The mask blank has two or more sets of a stacked structure, each set including a low transmission layer and a high transmission layer. The low transmission layer is formed of a silicon nitride-based material. The high transmission layer is formed of a silicon oxide-based material.
    Type: Grant
    Filed: August 2, 2017
    Date of Patent: March 9, 2021
    Assignee: HOYA CORPORATION
    Inventors: Hiroyuki Iwashita, Atsushi Matsumoto, Osamu Nozawa
  • Patent number: 10942443
    Abstract: A method for mask data synthesis and mask making includes calibrating an optical proximity correction (OPC) model by adjusting a plurality of parameters including a first parameter and a second parameter, wherein the first parameter indicates a long-range effect caused by an electron-beam lithography tool for making a mask used to manufacture a structure, and the second parameter indicates a geometric feature of a structure or a manufacturing process to make the structure, generating a device layout, calculating a first grid pattern density map of the device layout, generating a long-range correction map, at least based on the calibrated OPC model and the first grid pattern density map of the device layout, and performing an OPC to generate a corrected mask layout, at least based on the generated long-range correction map and the calibrated OPC model.
    Type: Grant
    Filed: September 27, 2018
    Date of Patent: March 9, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Hsu-Ting Huang, Shih-Hsiang Lo, Ru-Gun Liu
  • Patent number: 10942441
    Abstract: A mask blank having a phase shift film and a light shielding film laminated on a transparent substrate. The phase shift film transmits ArF exposure light at a transmittance of from 2% to 30% and generates a phase difference of from 150° to 200°, is formed from a material containing Si and not substantially containing Cr, and has a lower layer (L) and an upper layer (U) laminated from the transparent substrate side. A refractive index n for layer L is below that of the substrate while n for layer U is higher, and layer L has an extinction coefficient k higher than that of layer U. The light shielding film includes a layer in contact with the phase shift film that is formed from a material containing Cr, has a n lower than that of layer U, and has an extinction coefficient k higher than that of layer U.
    Type: Grant
    Filed: October 8, 2019
    Date of Patent: March 9, 2021
    Assignee: HOYA CORPORATION
    Inventors: Osamu Nozawa, Takenori Kajiwara, Hiroaki Shishido
  • Patent number: 10942445
    Abstract: A blankmask according to the present disclosure includes a light-shielding film provided on a transparent substrate; and a hard mask film provided on the light-shielding film and comprising molybdenum chromium (MoCr). Thus, the hard mask film has not only an enhanced etching speed but also sufficient etching resistance to fluorine (F)-based dry etching, so that an etching load against a resist film can be decreased and a hard mask film pattern and a light-shielding film pattern can be improved in a line edge roughness (LER), thereby forming a photomask for high-precision pattern printing.
    Type: Grant
    Filed: December 7, 2018
    Date of Patent: March 9, 2021
    Assignee: S&S TECH Co., Ltd.
    Inventors: Cheol Shin, Jong-Hwa Lee, Chul-Kyu Yang, Min-Ki Choi
  • Patent number: 10935882
    Abstract: The present invention is to provide a pellicle frame in a frame shape having an upper end face on which a pellicle film is to be arranged and a lower end face to face a photomask, which is characterized by being provided with a notched part from the outer side face toward inner side face of the lower end face; a pellicle including the pellicle frame as an element; and a method for peeling a pellicle from a photomask onto which the pellicle has been attached, which is characterized by inserting a peeling jig into a notched part from a side face of a pellicle frame, and moving the peeling jig in an upper end face direction of the pellicle frame in this state to peel off the pellicle from the photomask.
    Type: Grant
    Filed: September 11, 2018
    Date of Patent: March 2, 2021
    Assignee: SHIN-ETSU CHEMICAL CO., LTD.
    Inventor: Yu Yanase
  • Patent number: 10937663
    Abstract: Disclosed are methods for removing bridge defects using an angled implant and selective photoresist etch. In one embodiment, a method includes providing a semiconductor device including plurality of photoresist lines on a stack of layers, wherein a bridge defect extends between two or more photoresist lines of the plurality of photoresist lines. The method may further include implanting a sidewall and an upper surface of the two or more photoresist lines with an ion beam disposed at an angle, the angle being a non-zero angle of inclination with respect to a perpendicular to a plane of the upper surface of the stack of layers. The method may further include etching the semiconductor device to remove the bridge defect.
    Type: Grant
    Filed: September 25, 2018
    Date of Patent: March 2, 2021
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Tristan Y. Ma, Juiyuan Hsu
  • Patent number: 10928721
    Abstract: To provide a reflective mask blank for EUV lithography which is excellent in flatness, whereby the deterioration of the overlay accuracy at the time of pattern transfer can be relatively easily corrected, and the deterioration of the overlay accuracy due to the flatness is small.
    Type: Grant
    Filed: May 31, 2016
    Date of Patent: February 23, 2021
    Assignee: AGC, Inc.
    Inventor: Yoshiaki Ikuta
  • Patent number: 10928735
    Abstract: A patterning device for use with a lithographic apparatus, the device comprising an absorber portion configured to absorb incident radiation and to reflect a portion of incident radiation, the absorber portion comprising a first layer and a second layer, the first layer of the absorber portion comprising a first material that is different from a second material of the second layer of the absorber portion; a reflector portion arranged beneath the absorber portion, the reflector portion being configured to reflect incident radiation; and a phase tune portion arranged between the reflector portion and the absorber portion, the phase tune portion being configured to induce a phase shift between the radiation reflected by the reflector portion and the portion of radiation reflected by the absorber portion such that the radiation reflected by the reflector portion destructively interferes with the portion of radiation reflected by the absorber portion.
    Type: Grant
    Filed: November 27, 2019
    Date of Patent: February 23, 2021
    Assignee: ASML Netherlands B.V.
    Inventors: Marcus Adrianus Van De Kerkhof, Laurentius Cornelius De Winter, Eelco Van Setten
  • Patent number: 10928723
    Abstract: A pellicle for a photomask, a reticle including the same, and an exposure apparatus for lithography are provided. The pellicle may include a pellicle membrane, and the pellicle membrane may include nanocrystalline graphene. The nanocrystalline graphene may have defects. The nanocrystalline graphene may include a plurality of nanoscale crystal grains, and the nanoscale crystal grains may include a two-dimensional (2D) carbon structure having an aromatic ring structure. The defects of the nanocrystalline graphene may include at least one of an sp3 carbon atom, an oxygen atom, a nitrogen atom, or a carbon vacancy.
    Type: Grant
    Filed: December 10, 2019
    Date of Patent: February 23, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyeonjin Shin, Hyunjae Song, Seongjun Park, Keunwook Shin, Changseok Lee, Dongwook Lee, Minsu Seol, Sangwon Kim, Seongjun Jeong
  • Patent number: 10928724
    Abstract: Embodiments of the present disclosure generally provide apparatus and methods for removing an attachment feature utilized to hold a pellicle from a photomask. In one embodiment, an attachment feature removal apparatus for processing a photomask includes an attachment feature puller comprising an actuator, a clamp coupled to the actuator, the clamp adapted to grip an attachment feature, and a coil assembly disposed adjacent to the attachment feature.
    Type: Grant
    Filed: October 23, 2019
    Date of Patent: February 23, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Banqiu Wu, Eli Dagan, Khalid Makhamreh, Bruce J. Fender
  • Patent number: 10928722
    Abstract: Methods of manufacturing a membrane assembly where, in one arrangement, a stack includes a planar substrate and at least one membrane layer. The planar substrate includes an inner region, a border region around the inner region, a bridge region around the border region and an edge region around the bridge region. The inner region and a first portion of the bridge region are removed. The membrane assembly after removal has: a membrane formed from the at least one membrane layer, a border holding the membrane, the border formed from the border region, an edge section around the border, the edge section formed from the edge region, a bridge between the border and the edge section, the bridge formed from the at least one membrane layer and a second portion of the bridge region. The method further involves separating the edge section from the border by cutting or breaking the bridge.
    Type: Grant
    Filed: December 2, 2016
    Date of Patent: February 23, 2021
    Assignee: ASML NETHERLANDS B.V.
    Inventors: Paul Janssen, Johan Hendrik Klootwijk, Wilhelmus Theodorus Anthonius Johannes Van Den Einden, Aleksandar Nikolov Zdravkov