Radiation Mask Patents (Class 430/5)
  • Patent number: 12292686
    Abstract: A method of manufacturing a semiconductor structure includes providing a mask including a first substrate; a first mask layer disposed over the first substrate, including a plurality of first recesses extended through the first mask layer; a second mask layer disposed over the first mask layer and including a plurality of second recesses extended through the second mask layer; providing a second substrate including a photoresist disposed over the second substrate; and projecting a predetermined electromagnetic radiation through the mask towards the photoresist, wherein the first mask layer is at least partially transparent to the predetermined electromagnetic radiation, the second mask layer is opaque to the predetermined electromagnetic radiation, and at least a portion of the second mask layer is disposed between two of the plurality of second recesses.
    Type: Grant
    Filed: December 28, 2021
    Date of Patent: May 6, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Yung-Yao Lee, Yi-Ping Hsieh
  • Patent number: 12292680
    Abstract: The present application relates to a method for disposing of excess material of a photolithographic mask, wherein the method comprises the following steps: (a) enlarging a surface of the excess material; (b) displacing the enlarged excess material on the photolithographic mask using at least one first probe of a scanning probe microscope; and (c) removing the displaced enlarged excess material from the photolithographic mask.
    Type: Grant
    Filed: June 10, 2022
    Date of Patent: May 6, 2025
    Assignee: Carl Zeiss SMT GmbH
    Inventors: Michael Budach, Christof Baur, Klaus Edinger, Tristan Bret
  • Patent number: 12287577
    Abstract: An electronic device is provided. The electronic device includes a base and a conductive layer that is disposed on the base and patterned by a plurality of processes. The plurality of processes include providing a mask substrate. The mask substrate includes a first substrate and a patterned substrate. In the cross-sectional view, the width of the first substrate is greater than or equal to the width of the patterned substrate. The plurality of processes include arranging the mask substrate and the base correspondingly. The plurality of processes also include performing exposure and development processes on the conductive layer for patterning the conductive layer, and removing the mask substrate.
    Type: Grant
    Filed: December 5, 2023
    Date of Patent: April 29, 2025
    Assignee: INNOLUX CORPORATION
    Inventors: Chien-Hsing Lee, Chin-Lung Ting, Jung-Chuan Wang, Hong-Sheng Hsieh
  • Patent number: 12288688
    Abstract: A photomask is manufactured from a photomask blank including a transparent substrate, a first inorganic film which comprises silicon and is free of chromium, and a second inorganic film which comprises chromium and is free of silicon, and is in contact with the first inorganic film by a method including steps of forming a pattern of the second inorganic film by fluorine-based dry etching with using a resist pattern, and forming a pattern of the first inorganic film by fluorine-based dry etching with using the pattern of the second inorganic film.
    Type: Grant
    Filed: June 22, 2021
    Date of Patent: April 29, 2025
    Assignee: SHIN-ETSU CHEMICAL CO., LTD.
    Inventor: Kouhei Sasamoto
  • Patent number: 12283518
    Abstract: The present disclosure provides a method for fabricating a semiconductor device including providing a photomask including an opaque layer on a mask substrate and surrounding a translucent layer on the mask substrate, wherein the translucent layer includes a mask opening of contact portion which exposes a portion of the mask substrate; providing a stack structure including an etch stop layer on a bottom conductive layer and a first inter-dielectric layer on the etch stop layer, and forming a pre-process mask layer on the stack structure; patterning the pre-process mask layer using the photomask to form a patterned mask layer including a mask region corresponding to the opaque layer, a region of body portion corresponding to the translucent layer, and a hole of contact portion corresponding to the mask opening of contact portion.
    Type: Grant
    Filed: May 25, 2022
    Date of Patent: April 22, 2025
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventor: Chih-Hsuan Yeh
  • Patent number: 12282250
    Abstract: This application relates to a pellicle for extreme ultraviolet lithography based on yttrium (Y) and used in a lithography process using extreme ultraviolet rays. In one aspect, the pellicle includes a pellicle layer including a core layer formed of an yttrium-based material expressed as Y-M (M is one of B, Si, O, or F).
    Type: Grant
    Filed: March 18, 2022
    Date of Patent: April 22, 2025
    Assignee: KOREA ELECTRONICS TECHNOLOGY INSTITUTE
    Inventors: Hyeong Keun Kim, Seul Gi Kim, Hyun Mi Kim, Jin Woo Cho, Ki Hun Seong
  • Patent number: 12281988
    Abstract: An optical microtoroid resonator including one or more nanoparticles attached to a surface of the resonator and capable of receiving an input signal from afar-field source (via free-space transmission) and outputting light propagating within the optical apparatus. A method for coupling light into and out of an optical resonator using a nanoparticle or nanoparticles to interface with spatially separated far-field optical elements.
    Type: Grant
    Filed: December 17, 2021
    Date of Patent: April 22, 2025
    Assignee: Arizona Board of Regents on Behalf of The University of Arizona
    Inventors: Tsu-Te Judith Su, Euan McLeod
  • Patent number: 12282257
    Abstract: A pellicle assembly for large-size photomasks including a frame member configured to be affixed to a large-size photomask substrate, a substantially rigid and transparent pellicle membrane affixed to the frame member so as to protect at least a portion of the large-size photomask substrate from contamination during usage, storage and/or transport, and a coating on at least one of top and bottom surfaces of the pellicle membrane that binds the pellicle membrane to prevent separation of pellicle membrane material in the event of breakage.
    Type: Grant
    Filed: April 29, 2024
    Date of Patent: April 22, 2025
    Assignee: PHOTRONICS, INC.
    Inventors: Bryan S. Kasprowicz, Christopher Progler
  • Patent number: 12278270
    Abstract: A method forms a part of a power semiconductor device. The method includes homoepitaxially forming two silicon carbide layers on a first side of a silicon carbide substrate and forming a pattern of pits on a second side of the silicon carbide substrate. The two layers include a buffer layer, on the first side of the silicon carbide substrate, and have a same doping type of the silicon carbide substrate and a doping concentration equal to or greater than 1017 cm?3 in order to increase the quality of at least one subsequent SiC layer. The two layers include an etch stopper layer, being deposited on the buffer layer and has a same doping type as the buffer layer but a lower doping concentration in order to block a trenching process. The pattern of pits, obtained by electrochemical etching, extends completely thorough the silicon carbide substrate and the buffer layer.
    Type: Grant
    Filed: November 5, 2020
    Date of Patent: April 15, 2025
    Assignee: ETH Zuerich
    Inventors: Massimo Camarda, Ulrike Grossner
  • Patent number: 12276905
    Abstract: The present disclosure relates to a blank mask and the like, and comprises a transparent substrate and a light shielding film disposed on the transparent substrate. The light shielding film comprises a transition metal and at least any one between oxygen and nitrogen. The light shielding film comprises a first light shielding layer and a second light shielding layer disposed on the first light shielding layer. The light shielding film has an Rd value of Equation 1 below which is 0.4 to 0.8. Rd=er2/er1??[Equation 1] In the Equation 1, the er1 value is an etching rate of the first light shielding layer measured by etching with argon gas. The er2 value is an etching rate of the second light shielding layer measured by etching with argon gas. In such a blank mask, a resolution degradation can be suppressed effectively when the light shielding film is patterned.
    Type: Grant
    Filed: May 20, 2022
    Date of Patent: April 15, 2025
    Assignee: SK enpulse Co., Ltd.
    Inventors: GeonGon Lee, Inkyun Shin, Seong Yoon Kim, Suk Young Choi, Hyung-joo Lee, Sung Hoon Son, Min Gyo Jeong
  • Patent number: 12271107
    Abstract: A method for mask data synthesis and mask making includes calibrating an optical proximity correction (OPC) model by adjusting a plurality of parameters including a first parameter and a second parameter, wherein the first parameter indicates a long-range effect caused by an electron-beam lithography tool for making a mask used to manufacture a structure, and the second parameter indicates a geometric feature of a structure or a manufacturing process to make the structure, generating a device layout, calculating a first grid pattern density map of the device layout, generating a long-range correction map, at least based on the calibrated OPC model and the first grid pattern density map of the device layout, and performing an OPC to generate a corrected mask layout, at least based on the generated long-range correction map and the calibrated OPC model.
    Type: Grant
    Filed: February 29, 2024
    Date of Patent: April 8, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsu-Ting Huang, Shih-Hsiang Lo, Ru-Gun Liu
  • Patent number: 12270122
    Abstract: A silicon carbide wafer has one surface and the other surface opposite to the one surface. An average Rmax roughness of the one surface is 2.0 nm or less, and an average Ra roughness of the one surface is 0.1 nm or less. An edge region is a region in which a distance from an edge of the silicon carbide wafer toward a center is 5% to 75% of a radius of the silicon carbide wafer, and a central region is a region having a radius of 25% of the radius of the silicon carbide wafer at the center of the silicon carbide wafer. A difference between an average Rmax roughness of the edge region of the one surface and an average Rmax roughness of the central region of the one surface is 0.01 nm to 0.5 nm.
    Type: Grant
    Filed: June 9, 2022
    Date of Patent: April 8, 2025
    Assignee: SENIC Inc.
    Inventors: Jung Woo Choi, Myung Ok Kyun, Jong Hwi Park, Jung Doo Seo, Jung-Gyu Kim, Kap-Ryeol Ku
  • Patent number: 12265321
    Abstract: With respect to a reflective mask blank for a reflective mask used in EUV lithography using EUV light, the reflective mask blank including a substrate, a multilayer reflection film having a periodically laminated structure in which low-refractive index layers composed of a material containing molybdenum and high-refractive index layers are alternately laminated, a protection film, and an absorber film is provided. The low-refractive index layer consists of one or more of first low-refractive index sublayers, and one or more of second low-refractive index sublayers that have a different composition from a composition of the first low-refractive index sublayer.
    Type: Grant
    Filed: May 31, 2022
    Date of Patent: April 1, 2025
    Assignee: SHIN-ETSU CHEMICAL CO., LTD.
    Inventors: Takuro Kosaka, Taiga Ogose, Yukio Inazuki, Hideo Kaneko
  • Patent number: 12265323
    Abstract: A pellicle for an EUV photo mask includes a first layer; a second layer; and a main layer disposed between the first layer and second layer and including a plurality of nanotubes. At least one of the first layer or the second layer includes a two-dimensional material in which one or more two-dimensional layers are stacked. In one or more of the foregoing and following embodiments, the first layer includes a first two-dimensional material and the second layer includes a second two-dimensional material.
    Type: Grant
    Filed: November 21, 2023
    Date of Patent: April 1, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Tzu-Ang Chao, Chao-Ching Cheng, Han Wang
  • Patent number: 12265322
    Abstract: An extreme ultraviolet mask including a substrate, a reflective multilayer stack on the substrate and a capping layer on the reflective multilayer stack is provided. The reflective multilayer stack is treated prior to formation of the capping layer on the reflective multilayer stack. The capping layer is formed by an ion-assisted ion beam deposition or an ion-assisted sputtering process.
    Type: Grant
    Filed: August 4, 2023
    Date of Patent: April 1, 2025
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ping-Hsun Lin, Pei-Cheng Hsu, Ching-Fang Yu, Ta-Cheng Lien, Chia-Jen Chen, Hsin-Chang Lee
  • Patent number: 12259648
    Abstract: A photomask protection device, a photomask protection system, and a use method of a photomask protection system are provided. The photomask protection device includes a frame and a pellicle. The frame is disposed on a substrate of a photomask and is provided with a clamping space. Edges of the pellicle are fixed in the clamping space.
    Type: Grant
    Filed: February 10, 2022
    Date of Patent: March 25, 2025
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventor: Fei Sun
  • Patent number: 12259855
    Abstract: A system receives a layout representation of a metasurface, the metasurface including a number of scatterers arranged in a spatial order, each scatterer having one of a number of geometries. The system identifies one or more consecutive ones of the scatterers in the spatial order. The system identifies a sequence representing consecutive ones of the geometries, the sequence being associated with one or more consecutive ones of the scatterers in the spatial order. The system associates a two-dimensional coordinate to the sequence, the two-dimensional coordinate corresponding to a position in the metasurface where the sequence starts. The system generates an output layout file including a reference to the sequence and the associated two-dimensional coordinate.
    Type: Grant
    Filed: September 28, 2023
    Date of Patent: March 25, 2025
    Assignee: Ansys, Inc.
    Inventor: Jens Niegemann
  • Patent number: 12259649
    Abstract: In a method of cleaning a photo mask, the photo mask is placed on a support such that a pattered surface faces down, and an adhesive sheet is applied to edges of a backside surface of the photo mask.
    Type: Grant
    Filed: November 22, 2023
    Date of Patent: March 25, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsin-Chang Lee, Pei-Cheng Hsu, Hao-Ping Cheng, Ta-Cheng Lien
  • Patent number: 12253796
    Abstract: A photolithography mask includes a substrate, a reflective multilayer structure over the substrate, an adhesion layer over the reflective multilayer structure, a capping layer over the adhesion layer, and a patterned absorber layer over the capping layer. The capping layer includes a non-crystalline conductive material.
    Type: Grant
    Filed: December 19, 2023
    Date of Patent: March 18, 2025
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventor: Yun-Yue Lin
  • Patent number: 12253797
    Abstract: The present disclosure provides an apparatus for a semiconductor lithography process. The apparatus includes a mask defining a circuit pattern to be transferred. The apparatus further includes a pellicle including a pattern formed in a first surface, wherein the pellicle is attached to the mask at the first surface. The apparatus also includes an adhesive material layer disposed between the mask and the first surface. The pattern may include a plurality of capillaries. Each capillary of the plurality of capillaries may have a dimension in a plane of the first surface between about 1 ?m and about 500 ?m. Each capillary of the plurality of capillaries may have a ratio of depth to width greater than or equal to about 100. The adhesive material layer may include an adhesive having a glass transition temperature (Tg) greater than room temperature.
    Type: Grant
    Filed: July 27, 2023
    Date of Patent: March 18, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventor: Yun-Yue Lin
  • Patent number: 12248242
    Abstract: Methods and systems for fracturing a pattern to be exposed on a surface using variable shaped beam (VSB) lithography include inputting an initial pattern; calculating a first substrate pattern from the initial pattern; overlaying the initial pattern with a two-dimensional grid, wherein an initial set of VSB shots are formed by a union of the initial pattern with locations on the grid; and merging two or more adjacent shots in the initial set of VSB shots to create a larger shot in a modified set of VSB shots; and outputting the modified set of VSB shots. The methods and systems also include calculating a calculated pattern to be exposed on the surface with the modified set of VSB shots; and calculating a second substrate pattern from the calculated pattern to be exposed on the surface.
    Type: Grant
    Filed: March 11, 2024
    Date of Patent: March 11, 2025
    Assignee: D2S, Inc.
    Inventors: Akira Fujimura, P. Jeffrey Ungar, Nagesh Shirali
  • Patent number: 12248243
    Abstract: This application relates to a method for direct growth of multilayer graphene used as a core layer of a pellicle for extreme ultraviolet lithography. This application also relates to a method for manufacturing the pellicle for extreme ultraviolet lithography by using the multilayer graphene direct growth method. The multilayer graphene direct growth method may include forming few-layer graphene on a silicon nitride substrate, forming a metal catalyst layer on the few-layer graphene, and forming an amorphous carbon layer on the metal catalyst layer. The method may also include directly growing multilayer graphene from the few-layer graphene used as a seed layer by interlayer exchange between the metal catalyst layer and the amorphous carbon layer through heat treatment.
    Type: Grant
    Filed: November 10, 2021
    Date of Patent: March 11, 2025
    Assignee: Korea Electronics Technology Institute
    Inventors: Hyeong Keun Kim, Seul Gi Kim, Hyun Mi Kim, Hye Young Kim
  • Patent number: 12248245
    Abstract: A method includes: inspecting a reticle in a reticle pod, the reticle pod including a sealed space to accommodate the reticle, and the reticle pod further comprising a window arranged on an upper surface of the reticle pod, wherein the inspecting is performed through the window; and moving the reticle out of the reticle pod for performing a lithography operation using the reticle.
    Type: Grant
    Filed: July 30, 2023
    Date of Patent: March 11, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Wang Cheng Shih, Hao-Ming Chang, Chung-Yang Huang, Cheng-Ming Lin
  • Patent number: 12242182
    Abstract: The present disclosure provides a method for removing particles. The method includes: receiving a pellicle including a pellicle membrane, wherein a particle is disposed on the pellicle membrane; passing a light beam through an object lens, wherein the light beam is focused on a focal region in front of the pellicle membrane by the object lens, and the particle is attracted to be trapped at the focal region; and removing the particle from the pellicle membrane at the focal region.
    Type: Grant
    Filed: October 10, 2023
    Date of Patent: March 4, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Tzu Han Liu, Chih-Wei Wen, Chung-Hung Lin
  • Patent number: 12242181
    Abstract: A portion of a buffer layer on a backside of a substrate of a photomask assembly may be removed prior to formation of one or more capping layers on the backside of the substrate. The one or more capping layers may be formed directly on the backside of the substrate where the buffer layer is removed from the substrate, and a hard mask layer may be formed directly on the one or more capping layers. The one or more capping layers may include a low-stress material to promote adhesion between the one or more capping layers and the substrate, and to reduce and/or minimize peeling and delamination of the capping layer(s) from the substrate. This may reduce the likelihood of damage to the pellicle layer and/or other components of the photomask assembly and/or may increase the yield of an exposure process in which the photomask assembly is used.
    Type: Grant
    Filed: July 31, 2023
    Date of Patent: March 4, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuo-Hao Lee, Hsi-Cheng Hsu, Jui-Chun Weng, Han-Zong Pan, Hsin-Yu Chen, You-Cheng Jhang
  • Patent number: 12235573
    Abstract: A photomask and a method of manufacturing a photomask are provided. According to an embodiment, a method includes: providing a substrate; depositing a reflective layer including molybdenum layers and silicon layers over the substrate; depositing a capping layer over the reflective layer; depositing an absorption layer over the capping layer; and performing a treatment to form a border region including molybdenum silicide in the reflective layer.
    Type: Grant
    Filed: July 30, 2023
    Date of Patent: February 25, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Feng Yuan Hsu, Tran-Hui Shen, Ching-Hsiang Hsu
  • Patent number: 12235575
    Abstract: A reflective mask blank for EUV lithography, includes: a substrate; a conductive film; a reflective layer; and an absorption layer, the absorption layer absorbing the EUV light, wherein the conductive film has a refractive index n?1000-1100 nm of 5.300 or less and has an extinction coefficient k?1000-1100 nm of 5.200 or less, at a wavelength of 1000 nm to 1100 nm, the conductive film has a refractive index n?600-700 nm of 4.300 or less and has an extinction coefficient k?600-700 nm of 4.500 or less, at a wavelength of 600 nm to 700 nm, the conductive film has a refractive index n?400-500 nm of 2.500 or more and has an extinction coefficient k?400-500 nm of 0.440 or more, at a wavelength of 400 nm to 500 nm, and the conductive film has a film thickness t of 40 nm to 350 nm.
    Type: Grant
    Filed: February 12, 2024
    Date of Patent: February 25, 2025
    Assignee: AGC INC.
    Inventors: Yusuke Ono, Hiroshi Hanekawa, Hirotomo Kawahara
  • Patent number: 12230535
    Abstract: The present application discloses a method for fabricating a semiconductor device including: providing a photomask including an opaque layer on a mask substrate and surrounding a translucent layer on the mask substrate; forming a pre-process mask layer on a device stack; patterning the pre-process mask layer using the photomask to form a patterned mask layer including a mask region corresponding to the opaque layer, a trench region corresponding to the translucent layer, and a via hole corresponding to the mask opening of via feature; performing a damascene etching process to form a via opening and a trench opening in the device stack; and forming a via in the via opening and a trench in the trench opening. The translucent layer includes a mask opening of via feature which exposes a portion of the mask substrate. A thickness of the trench region is less than a thickness of the mask region.
    Type: Grant
    Filed: March 23, 2022
    Date of Patent: February 18, 2025
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventor: Wei-Chen Pan
  • Patent number: 12228853
    Abstract: A reflective mask blank, which is a binary reflective mask blank, includes, in order: a substrate; a multilayer reflective film configured to reflect EUV light; and a pattern film. The pattern film has a laminated structure including a total of L layers each having a different refractive index where L is a natural number of 2 or more. When an absorption coefficient of an i-th layer in the pattern film from a side opposite to the substrate is defined as ki, a thickness of the i-th layer in the pattern film from the side opposite to the substrate is defined as di (nm), a total thickness of the pattern film is defined as d, an exposure wavelength is defined as ? (nm), and Pi is defined as 1?exp(?2?/?*diki), the following formula (1) is satisfied. ? i = 1 L ( P i / d ) > 0.
    Type: Grant
    Filed: August 29, 2024
    Date of Patent: February 18, 2025
    Assignee: AGC INC.
    Inventor: Takeshi Okato
  • Patent number: 12228852
    Abstract: A reflective mask blank comprises a substrate; a multilayer reflective film which is formed on the substrate and reflects EUV light; and a layered film which is formed on the multilayer reflective film. The layered film has an absolute reflectance of 2.5% or less with respect to EUV light, and comprises a first layer and a second layer that is formed on the first layer; and the first layer comprises a phase shift film which shifts the phase of EUV light. Alternatively, the layered film is a phase shift film which comprises a first layer and a second layer that is formed on the first layer, and which shifts the phase of EUV light; and the first layer comprises an absorption layer that has an absolute reflectance of 2.5% or less with respect to EUV light.
    Type: Grant
    Filed: December 4, 2023
    Date of Patent: February 18, 2025
    Assignee: HOYA CORPORATION
    Inventor: Yohei Ikebe
  • Patent number: 12222639
    Abstract: A method of manufacturing an extreme ultraviolet mask, including forming a multilayer Mo/Si stack including alternating Mo and Si layers over a first major surface of a mask substrate, and forming a capping layer over the multilayer Mo/Si stack. An absorber layer is formed on the capping layer, and a hard mask layer is formed over the absorber layer. The hard mask layer is patterned to form a hard mask layer pattern. The hard mask layer pattern is extended into the absorber layer to expose the capping layer and form a mask pattern. A border pattern is formed around the mask pattern. The border pattern is extended through the multilayer Mo/Si stack to expose the mask substrate and form a trench surrounding the mask pattern. A passivation layer is formed along sidewalls of the trench.
    Type: Grant
    Filed: July 20, 2023
    Date of Patent: February 11, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventor: Yun-Yue Lin
  • Patent number: 12222640
    Abstract: A reflective mask blank containing a substrate, a multilayer reflective film that reflects EUV light, and a phase shift film that shifts a phase of the EUV light, the substrate, the multilayer reflective film, and the phase shift film being arranged in this order. The phase shift film contains a compound containing Ru and Cr, an element ratio between Cr and Ru (Cr:Ru) in the phase shift film is 5:95 to 42:58, and a melting point MP1 of an oxide of the compound and a melting point MP2 of a fluoride or an oxyfluoride of the compound satisfy the following relation (1): 0.625MP1+MP2?1000??(1).
    Type: Grant
    Filed: October 20, 2023
    Date of Patent: February 11, 2025
    Assignee: AGC Inc.
    Inventors: Shunya Taki, Hiroaki Iwaoka, Daijiro Akagi, Ichiro Ishikawa
  • Patent number: 12216979
    Abstract: A method for correcting a mask patter includes: acquiring an initial pattern of a mask, the initial pattern including a scribe line area and die areas which are spaced, and the scribe line area is located between two adjacent die areas, each of the die areas includes at least one die sub-area and at least one first sub-test element group (TEG) area, and the scribe line area includes scribe line sub-areas and second sub-TEG areas, the first sub-TEG area and the second sub-TEG area are adjacent to each other, and the first sub-TEG area and the second sub-TEG area constitute a TEG area; performing an optical proximity correction (OPC) on an area of the initial pattern excluding TEG areas, so as to acquire a final pattern.
    Type: Grant
    Filed: January 11, 2022
    Date of Patent: February 4, 2025
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventor: Shuping Li
  • Patent number: 12216405
    Abstract: A photosensitive resin composition containing (A) an acid-crosslinkable group-containing silicone resin, (B) a photo-acid generator, and (C) quantum dot particles. Thus, a photosensitive resin composition is capable of easily forming a film having favorable heat resistance, lithography resolution, and luminous properties; a photosensitive resin film and a photosensitive dry film are obtained by using the photosensitive resin composition; patterning processes use these; and a light emitting device is obtained by using the photosensitive resin composition.
    Type: Grant
    Filed: November 12, 2020
    Date of Patent: February 4, 2025
    Assignee: SHIN-ETSU CHEMICAL CO., LTD.
    Inventors: Hitoshi Maruyama, Tamotsu Oowada
  • Patent number: 12216398
    Abstract: A reflective mask blank includes a substrate and, on or above the substrate in order, a reflective layer for reflecting EUV light, a protective layer for protecting the reflective layer, and an absorbent layer for absorbing EUV light. The absorbent layer has a reflectance for a wavelength of 13.53 nm of from 2.5% to 10% and consists of a lower absorption layer and an upper absorption layer. A film thickness dbi of the absorbent layer satisfies a relationship of: dbi MAX?(i×6+1) nm?dbi?dbi MAX?(i×6?1) nm where the integer i is 0 or 1, and dbi MAX is represented by: d bi ? MAX ( nm ) = 13.53 2 ? n ? cos ? 6 ? ° { INT ( 0.58 1 - n 1 ) + 1 2 ? ? ? ( tan - 1 ( - k 2 1 - n 2 ) + 0.
    Type: Grant
    Filed: January 19, 2024
    Date of Patent: February 4, 2025
    Assignee: AGC INC.
    Inventors: Hiroyoshi Tanabe, Hiroshi Hanekawa, Toshiyuki Uno
  • Patent number: 12210280
    Abstract: A reflective mask includes a substrate, a reflective multilayer disposed over the substrate, a capping layer disposed over the reflective multilayer, an intermediate layer disposed over the capping layer, an absorber layer disposed over the intermediate layer, and a cover layer disposed over the absorber layer. The absorber layer includes one or more layers of an Jr based material, a Pt based material or a Ru based material.
    Type: Grant
    Filed: January 2, 2024
    Date of Patent: January 28, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventor: Yun-Yue Lin
  • Patent number: 12204086
    Abstract: A method is used to generate a distortion model for a structured illumination microscopy (SIM) optical system. A sliding window is moved in relation to a plurality of images to define a plurality of sub-tiles. Each sub-tile represents a portion of the corresponding image. Parameters are estimated for each sub-tiles. The parameters include two or more parameters selected from the group consisting of modulation, angle, spacing, phase offset, and phase deviation. A full width at half maximum (FWHM) value associated with each sub-tile is estimated. A distortion model is estimated, based at least in part on a combination of the estimated parameters and FWHM values stored in the predetermined format and an estimated center window parameter. A two-dimensional image may be generated, based at least in part on the estimated distortion model. The two-dimensional image may include representations indicating where distortions occur in the optical system.
    Type: Grant
    Filed: August 21, 2023
    Date of Patent: January 21, 2025
    Assignee: ILLUMINA, INC.
    Inventors: Robert Langlois, Bo Lu, Hongji Ren, Joseph Pinto, Simon Prince, Austin Corbett
  • Patent number: 12205891
    Abstract: A method (fabricating a fusible structure) includes forming a metal line that extends in a first direction, the forming a metal line including: configuring the mask such that the metal line has a first portion that is between a second portion and a third portion; and using an optical proximity correction technique with a mask so that the first portion has a first thickness that is thinner than a second thickness of each of the second portion and the third portion; and forming a first dummy structure proximal to the metal line and aligned with the first portion relative to the first direction.
    Type: Grant
    Filed: August 10, 2022
    Date of Patent: January 21, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shao-Ting Wu, Meng-Sheng Chang, Shao-Yu Chou, Chung-I Huang
  • Patent number: 12204240
    Abstract: A reflective mask blank includes a substrate; a multilayer reflective film that reflects EUV light; a protection film that protects the multilayer reflective film; and a phase shift film that shifts a phase of the EUV light, the substrate, the multilayer reflective film, the protection film, and the phase shift film being arranged in this order. The phase shift film contains at least one first element X1 selected from the first group consisting of ruthenium (Ru), iridium (Ir), platinum (Pt), palladium (Pd), and gold (Au), and at least one second element X2 selected from the second group consisting of oxygen (O), boron (B), carbon (C), and nitrogen (N). In the phase shift film, a chemical shift of a peak of 3d5/2 or a peak of 4f7/2 of the first element X1 observed by X-ray electron spectroscopy is less than 0.3 eV.
    Type: Grant
    Filed: December 22, 2023
    Date of Patent: January 21, 2025
    Assignee: AGC Inc.
    Inventors: Daijiro Akagi, Shunya Taki, Takuma Kato, Ichiro Ishikawa, Kenichi Sasaki
  • Patent number: 12197128
    Abstract: Multi-layer photoresists, methods of forming the same, and methods of patterning a target layer using the same are disclosed. In an embodiment, a method includes depositing a reflective film stack over a target layer, the reflective film stack including alternating layers of a first material and a second material, the first material having a higher refractive index than the second material; depositing a photosensitive layer over the reflective film stack; patterning the photosensitive layer to form a first opening exposing the reflective film stack, patterning the photosensitive layer including exposing the photosensitive layer to a patterned energy source, the reflective film stack reflecting at least a portion of the patterned energy source to a backside of the photosensitive layer; patterning the reflective film stack through the first opening to form a second opening exposing the target layer; and patterning the target layer through the second opening.
    Type: Grant
    Filed: June 16, 2022
    Date of Patent: January 14, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Liang-Yi Chang, Tai-Chun Huang, Chi On Chui
  • Patent number: 12199707
    Abstract: Antenna arrays to be used in MIMO apparatuses are disclosed. Such an antenna array may include a plurality of array elements, wherein every second element in a first direction is a digital pre-distortion-less linear element, and every second element in the first direction is a non-linear element. In the antenna array, spacing between adjacent elements in the first direction is less than a half of a free space wavelength. A non-linear precoding is applied to transmissions from the antenna array, the non-linear precoding converting out-of-band emissions of the transmissions into reactive power in the near-field around the antenna array while ensuring that in-band signals generated by the elements remain unaffected.
    Type: Grant
    Filed: January 5, 2023
    Date of Patent: January 14, 2025
    Assignee: Nokia Solutions and Networks Oy
    Inventor: Karthik Upadhya
  • Patent number: 12181791
    Abstract: An extreme ultraviolet (EUV) mask includes a multilayer Mo/Si stack comprising alternating Mo and Si layers disposed over a first major surface of a mask substrate, a capping layer made of ruthenium (Ru) disposed over the multilayer Mo/Si stack, and an absorber layer on the capping layer. The EUV mask includes a circuit pattern area and a particle attractive area, and the capping layer is exposed at bottoms of patterns in the particle attractive area.
    Type: Grant
    Filed: July 24, 2023
    Date of Patent: December 31, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chih-Tsung Shih, Tsung-Chih Chien, Shih-Chi Fu, Chi-Hua Fu, Kuotang Cheng, Bo-Tsun Liu, Tsung Chuan Lee
  • Patent number: 12181790
    Abstract: A reflective mask blank that is a material for a reflective mask used in EUV lithography using EUV light as exposure light, including a substrate, a multilayer reflection film that is formed on one main surface of the substrate and reflects the exposure light, and an absorber film containing tungsten, and another metal, a metalloid or a light element that is formed on the multilayer reflection film and absorbs the exposure light.
    Type: Grant
    Filed: February 11, 2022
    Date of Patent: December 31, 2024
    Assignee: SHIN-ETSU CHEMICAL CO., LTD.
    Inventors: Shohei Mimura, Hideo Kaneko, Tsuneo Terasawa
  • Patent number: 12181797
    Abstract: An extreme ultraviolet mask including a substrate, a reflective multilayer stack on the substrate and a multi-layer patterned absorber layer on the reflective multilayer stack is provided. Disclosed embodiments include an absorber layer that includes an alloy comprising ruthenium (Ru), chromium (Cr), platinum (Pt), gold (Au), iridium (Ir), titanium (Ti), niobium (Nb), rhodium (Rh), molybdenum (Mo), tungsten (W) or palladium (Pd), and at least one alloying element. The at least one alloying element includes ruthenium (Ru), chromium (Cr), tantalum (Ta), platinum (Pt), gold (Au), iridium (Ir), titanium (Ti), niobium (Nb), rhodium (Rh), molybdenum (Mo), hafnium (Hf), boron (B), nitrogen (N), silicon (Si), zirconium (Zr) or vanadium (V). Other embodiments include a multi-layer patterned absorber structure with layers that include an alloy and an alloying element, where at least two of the layers of the multi-layer structure have different compositions.
    Type: Grant
    Filed: September 23, 2021
    Date of Patent: December 31, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Pei-Cheng Hsu, Ping-Hsun Lin, Ta-Cheng Lien, Hsin-Chang Lee
  • Patent number: 12179464
    Abstract: Disclosed is a method for manufacturing ultra-thin glass. The method includes: patterning, on a mother glass substrate comprising a plurality of display cells and a dummy area surrounding the display cells, a cutting line having a shape corresponding to the display cells; forming a mother glass protective film on the mother glass substrate; forming a through-hole which corresponds to the cutting line by etching the mother glass substrate; and cutting bridges which are formed by the mother glass substrate and connect the through-holes.
    Type: Grant
    Filed: June 17, 2022
    Date of Patent: December 31, 2024
    Assignee: LG Display Co., Ltd.
    Inventors: Doowon Seo, Wooseok Roh, Moongoo Kim, Chan Park, Eungchul Park
  • Patent number: 12181792
    Abstract: An optical proximity correction (OPC) method of effectively imitating a mask topography effect for a mask having a curvilinear pattern includes generating a library for edge filters of a near field by using an electromagnetic field simulation; generating an any-angle edge filter by using the library; for a mask having a curvilinear pattern, generating a first mask image by using thin mask approximation; determining whether the curvilinear pattern satisfies a reference; when the curvilinear pattern satisfies the reference, performing skewed Manhattanization on the curvilinear pattern and then generating a second mask image by applying the any-angle edge filter to edges of the curvilinear pattern.
    Type: Grant
    Filed: February 18, 2022
    Date of Patent: December 31, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Narak Choi, Dongwon Kang
  • Patent number: 12176211
    Abstract: A reflection mode photomask includes a multilayer over a substrate. The reflection mode photomask further includes a plurality of absorber stacks over the multilayer. Each absorber stack of the plurality of absorber stacks includes an absorber layer, wherein a material of the absorber layer is selected from the group consisting of tantalum oxynitride and tantalum silicon oxynitride. Each absorber stack of the plurality of absorber stacks further includes an anti-reflective coating (ARC) layer on the absorber layer, wherein a material of the ARC layer is selected from the group consisting of tantalum nitride and tantalum silicon.
    Type: Grant
    Filed: July 21, 2023
    Date of Patent: December 24, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chun-Lang Chen, Chih-Chiang Tu
  • Patent number: 12174526
    Abstract: A pellicle for an EUV photo mask includes a first layer, a second layer, and a main membrane disposed between the first layer and second layer. The main membrane includes a plurality of co-axial nanotubes, each of which includes an inner tube and one or more outer tubes surrounding the inner tube, and two of the inner tube and one or more outer tubes are made of different materials from each other.
    Type: Grant
    Filed: January 14, 2022
    Date of Patent: December 24, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Tzu-Ang Chao, Chao-Ching Cheng, Han Wang, Ming-Yang Li, Gregory Michael Pitner
  • Patent number: 12174527
    Abstract: A pellicle for an EUV photo mask includes a first capping layer, a matrix layer disposed over the first capping layer, a second capping layer disposed over the matrix layer; and a metallic layer disposed over the second capping layer.
    Type: Grant
    Filed: July 25, 2023
    Date of Patent: December 24, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventor: Yun-Yue Lin
  • Patent number: 12169678
    Abstract: Disclosed is an operating method of an electronic device for manufacture of a semiconductor device. The operating method includes receiving a layout image of the semiconductor device, generating an intermediate image by generating assist features based on main features of the layout image, evaluating a process result by performing simulation based on the intermediate image, and correcting the intermediate image by correcting shapes of the main features and/or the assist features of the intermediate image based on the process result.
    Type: Grant
    Filed: October 26, 2021
    Date of Patent: December 17, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Useong Kim, Bayram Yenikaya, Mindy Lee, Xin Zhou, Hee-Jun Lee, Woo-Yong Cho