Abstract: A display device can include a display panel having an active area including a plurality of subpixels; at least one hole area surrounded by the active area; a boundary area between the at least one hole area and the active area; a first gate line on the active area and the boundary area to supply a scan signal to a first group of subpixels; a second gate line on the active area and the boundary area to supply an emission signal to the first group of subpixels. Also, the display device can include a first data line disposed on the active area and the boundary area to supply a first data voltage to a second group of subpixels; and a second data line disposed on the active area and the boundary area to supply a second data voltage to a third group of subpixels.

Abstract: Integrated-optics systems are presented in which an optically active device is optically coupled with a silicon waveguide via a passive compound-semiconductor waveguide. In a first region, the passive waveguide and the optically active device collectively define a composite waveguide structure, where the optically active device functions as the central ridge portion of a rib-waveguide structure. The optically active device is configured to control the vertical position of an optical mode in the composite waveguide along its length such that the optical mode is optically coupled into the passive waveguide with low loss. The passive waveguide and the silicon waveguide collectively define a vertical coupler in a second region, where the passive and silicon waveguides are configured to control the distribution of the optical mode along the length of the coupler, thereby enabling the entire mode to transition between the passive and silicon waveguides with low loss.

Abstract: A semiconductor device includes a base substrate. A first thin-film transistor is disposed on the base substrate. The first thin-film transistor includes a first input electrode, a first output electrode, a first semiconductor pattern disposed below a first insulating layer, and a first control electrode disposed on the first insulating layer and below a second insulating layer. A second thin-film transistor includes a second input electrode, a second output electrode, a second semiconductor pattern disposed on the second insulating layer, and a second control electrode disposed on an insulating pattern formed on the second semiconductor pattern and exposes a portion of the second semiconductor pattern. The first semiconductor pattern includes a crystalline semiconductor. The second semiconductor pattern incudes an oxide semiconductor. The first semiconductor pattern, the first control electrode, the second semiconductor pattern, and the second control electrode are overlapped.

Abstract: A display device can include a display panel having an active area including a plurality of subpixels, at least one hole area surrounded by the active area, a boundary area disposed between the at least one hole area and the active area, a first gate line on the active area and the boundary area, and supplying a scan signal to a first group subpixels, a second gate line disposed on the active area and the boundary area and supplying a EM signal to the first group subpixels, a first data line disposed on the active area and the boundary area and supplying a data voltage to a second group of subpixels excluding a green subpixel, and a second data line disposed on the active area and the boundary area and supplying the data voltage to a third group subpixels including a green subpixel.

Abstract: The present invention provides a container used in a stereolithography apparatus and having excellent transparency, shape accuracy, and durability. The present invention relates to a container for holding a photocurable composition (3), the container being used in a stereolithography apparatus comprising a container (2), an active energy beam irradiation apparatus (5), and an actuator (8), wherein the container (2) comprises a bottom (2?) and a wall, the bottom (2?) comprises a first layer (X) comprising a hard resin, a second layer (Y) comprising a soft resin, and a third layer (Z) comprising a fluorine resin, the second layer (Y) is laminated on the first layer (X) and the third layer (Z) is laminated on the second layer (Y), the pencil hardness measured according to JIS K 5600-5-4:1999 for the first layer (X) is 3 B or harder, the hardness measured for the second layer (Y) using a type A durometer compliant with JIS K 6253-3:2012 is 10 to 90, and the third layer (Z) has a thickness of 0.1 to 5.0 mm.

Abstract: Provided is a display device having a structure in which a hole area in which camera sensors or the like are disposed is included in an active area of a display panel. Data lines among a plurality of data lines bypassing the hole area are disposed on different layers to prevent an increase in the load of data lines, through which green subpixels are driven. Degradations in the luminance of subpixels disposed around the hole area and driven through the data lines bypassing the hole area are prevented. The uniformity of luminance around the hole area is improved.

Abstract: A non-volatile memory system includes a first non-volatile memory device, a second non-volatile memory device that performs a write operation more slowly than the first non-volatile memory device, where the first and second non-volatile memory devices are different types of non-volatile memory devices, and a controller that controls the first and second non-volatile memory devices to concurrently perform the write operation for data input from a host based on a write command signal and that outputs a write completion signal to the host when one of the first and second non-volatile memory devices completes the write operation.

Abstract: An optoelectronic semiconductor chip has a first semiconductor layer sequence which comprises a multiplicity of microdiodes, and a second semiconductor layer sequence which comprises an active region The first semiconductor layer sequence and the second semiconductor layer sequence are based on a nitride compound semiconductor material, the first semiconductor layer sequence is before the first semiconductor layer sequence in the direction of growth, and the microdiodes form an ESD protection for the active region.

Abstract: A light emitting device and method for making the same is disclosed. The light-emitting device includes an active layer sandwiched between a p-type semiconductor layer and an n-type semiconductor layer. The active layer emits light when holes from the p-type semiconductor layer combine with electrons from the n-type semiconductor layer therein. The active layer includes a number of sub-layers and has a plurality of pits in which the side surfaces of a plurality of the sub-layers are in contact with the p-type semiconductor material such that holes from the p-type semiconductor material are injected into those sub-layers through the exposed side surfaces without passing through another sub-layer. The pits can be formed by utilizing dislocations in the n-type semiconductor layer and etching the active layer using an etching atmosphere in the same chamber used to deposit the semiconductor layers without removing the partially fabricated device.

Abstract: According to one embodiment, a method is disclosed for manufacturing a semiconductor light emitting device. The method can include forming a nitride semiconductor layer including a light emitting layer on a first substrate having an unevenness, bonding the nitride layer to a second substrate, and separating the first substrate from the nitride layer by irradiating the nitride layer with light. The forming the nitride layer includes leaving a cavity in a space inside a depression of the unevenness while forming a thin film on the depression. The film includes a same material as part of the nitride layer. The separating includes causing the film to absorb part of the light so that intensity of the light applied to a portion of the nitride layer facing the depression is made lower than intensity of the light applied to a portion facing a protrusion of the unevenness.

Abstract: In a method for producing a semiconductor light emitting device: a semiconductor lamination of first and second semiconductor layers having different conductive types is formed; a portion of the semiconductor lamination is removed to expose an area of a surface of the first semiconductor layer; a conductor layer connecting the first and second semiconductor layers is formed; a first electrode is formed on the exposed areas of the first semiconductor layer and a second electrode is formed on an upper surface of the second semiconductor layer; a barrier layer covering at least one of the first and second electrodes is formed; and a connection part in the conductor layer connecting the first and second semiconductor layers is removed.

Abstract: A method of manufacturing a light emitting diode, includes a process of forming an n-type nitride semiconductor layer, a light emitting layer, and a p-type nitride semiconductor layer on a temporary substrate, a process of forming a p-type electrode on the p-type nitride semiconductor layer, a process of forming a conductive substrate on the p-type electrode, a process of removing the temporary substrate to expose the n-type nitride semiconductor layer, a process of forming a nanoimprint resist layer on the n-type nitride semiconductor layer, a process of pressing the nanoimprint mold on the nanoimprint resist layer to transfer the nano-pattern onto the nanoimprint resist layer, and a process of separating the nanoimprint mold from the nanoimprint resist layer having the nano-pattern and etching a portion of the nanoimprint resist layer having the nano-pattern to form an n-type electrode.

Abstract: A method of applying a conversion means to an optoelectronic semiconductor chip includes preparing the optoelectronic semiconductor chip having a main radiation face, preparing the conversion means, the conversion means being applied to a main carrier face of a carrier, arranging the conversion means such that it faces the main radiation face and has a spacing relative to the main radiation face, and releasing the conversion means from the carrier and applying the conversion means to the main radiation face by irradiation and heating of an absorber constituent of the conversion means and/or of a release layer located between the conversion means and the carrier with a pulsed laser radiation which passes through the carrier.

Abstract: A light emitting diode chip manufacturing method includes the following steps: a substrate is provided. A first semiconductor layer is formed on the substrate. A light-emitting layer is formed on a portion of the first semiconductor layer, and the surface of the first semiconductor layer not covered by the light-emitting layer is exposed. A second semiconductor layer is formed on the light-emitting layer. A hard shielding layer is formed on the second semiconductor layer and the exposed surface of the first semiconductor layer, such that a multi-layer stacked structure is formed on the substrate. A cutting treatment is performed. An etching treatment is performed. The hard shielding layer is patterned to form a current blocking layer on the second semiconductor layer, and the current blocking layer is made of the hard shielding layer.

Abstract: An LED includes a substrate, a first n-type GaN layer, a connecting layer, a second n-type GaN layer, a light emitting layer, and a p-type GaN layer. The first n-type GaN layer, the connecting layer, and the second n-type GaN layer are formed on the substrate in sequence. The connecting layer is etchable by alkaline solution, and a bottom surface of the second n-type GaN layer facing towards the connecting layer has a roughed exposed portion. The GaN on the bottom surface of the second n-type GaN layer is N-face GaN. A top surface of the second n-type GaN layer facing away from the connecting layer includes a first area and a second area. The light emitting layer and the p-type GaN layer are formed on the first area of the top surface of the second n-type GaN layer in sequence.

Abstract: A method includes: a step of forming a gate electrode (14) on a substrate (10a); a step of forming a gate insulating film (15) to cover the gate electrode (14), and then forming an In-Ga-Zn-O-based oxide semiconductor layer (16) in which a ratio of In:Ga:Zn in atomic % is 1:1:1 or 4:5:1 on the gate insulating film (15) to overlap the gate electrode (14); a step of forming a source electrode (19a) and a drain electrode (19b) on the oxide semiconductor layer (16) to overlap the gate electrode (14) and to face each other; and a step of performing an annealing process in an atmosphere containing steam (S) on the substrate (10a) provided with the source electrode (19a) and the drain electrode (19b).

Abstract: A liquid crystal display device includes a first substrate and a second substrate with a liquid crystal layer therebetween. The first substrate includes drain lines, gate lines, thin-film transistors that output signals to pixel electrodes, and an organic film that is formed between each thin-film transistor and each pixel electrode. The organic film has a contact hole for electrical connection between a source electrode of each thin-film transistor and each pixel electrode. A step is formed in a layer underlying the organic film and an edge portion of the organic film toward the thin-film transistor, the edge portion forming the contact hole, being formed to lie on a lower plane of the step. A sidewall part of the contact hole which is formed in the organic film is formed to have a taper angle of at least 60 degrees.

Abstract: A semiconductor light emitting device having high reliability and excellent light distribution characteristics can be provided with an n-electrode arranged on a light extraction surface on the side opposite to the surface whereupon a semiconductor stack is mounted on a substrate. A plurality of convexes are arranged on a first convex region and a second convex region on the light extraction surface. The second convex region adjoins the interface between the n-electrode and the semiconductor stack, between the first convex region and the n-electrode. The base end of the first convex arranged in the first convex region is positioned closer to a light emitting layer than the interface between the n-electrode and the semiconductor stack, and the base end of the second convex arranged in the second convex region is positioned closer to the interface between the n-electrode and the semiconductor stack than the base end of the first convex.

Abstract: A thin film transistor fabrication method allows forming a first photoresist pattern on a triple layer of insulation, conductive and metal films opposite to a semiconductor pattern. A first metal pattern and a conductive pattern are formed through an etch process before forming source and drain regions through a first ion injection process. A second photoresist pattern with a narrower width than that of the first photoresist pattern is derived from the first photoresist pattern. The first metal pattern is reformed into a second metal pattern with a narrower width than that of the second photoresist pattern. A process is performed that includes removing the second photoresist pattern, forming LDD (Lightly Doped Drain) regions in the semiconductor pattern, and forming GOLDD (Gate Overlap LDD) regions in the semiconductor pattern. A second insulation film is formed before forming source and drain electrodes on the second insulation film.

Abstract: An optical semiconductor element and a manufacturing method thereof that can improve the light extraction efficiency with maintaining the yield. The manufacturing method includes forming a plurality of recesses arranged at equal intervals along a crystal axis of a semiconductor film in a surface of the semiconductor film; and performing an etching process on the surface of the semiconductor film, thereby forming a plurality of protrusions arranged according to the arrangement form of the plurality of recesses and deriving from the crystal structure of the semiconductor film in the surface of the semiconductor film.

Abstract: A method of manufacturing a waveguide eliminates a prior art reflow step and introduces certain new steps that permit fabricating of an ultra-low loss waveguide element on a silicon chip. The ultra-low loss waveguide element may be adapted to fabricate a number of devices, including a wedge resonator and a ultra-low loss optical delay line having an extended waveguide length.

Abstract: A light emitting diode chip includes a substrate, an epitaxial layer, two inclined plane units, and two electrode units. The substrate has top and bottom surfaces. The epitaxial layer is disposed on the top surface of the substrate. Each of the inclined plane units is inclined downwardly and outwardly from the epitaxial layer toward the bottom surface of the substrate, and includes an inclined sidewall formed on the epitaxial layer, and a substrate inclined wall formed on the substrate. Each of the electrode units includes an electrode disposed on the epitaxial layer, and a conductive portion extending from the electrode to the substrate inclined wall along corresponding one of the inclined plane units.

Abstract: A semiconductor light emitting device includes a first semiconductor layer having a bottom surface with uneven patterns, an active layer formed on the first semiconductor layer, a second semiconductor layer formed on the active layer, a second electrode formed on the second semiconductor layer, and a first electrode formed under the first semiconductor layer.

Abstract: Solid state lighting devices and associated methods of manufacturing are disclosed herein. In one embodiment, a solid state light device includes a light emitting diode with an N-type gallium nitride (GaN) material, a P-type GaN material spaced apart from the N-type GaN material, and an indium gallium nitride (InGaN) material directly between the N-type GaN material and the P-type GaN material. At least one of the N-type GaN, InGaN, and P-type GaN materials has a non-planar surface.

Abstract: A light emitting device and method for making the same is disclosed. The light-emitting device includes an active layer sandwiched between a p-type semiconductor layer and an n-type semiconductor layer. The active layer emits light when holes from the p-type semiconductor layer combine with electrons from the n-type semiconductor layer therein. The active layer includes a number of sub-layers and has a plurality of pits in which the side surfaces of a plurality of the sub-layers are in contact with the p-type semiconductor material such that holes from the p-type semiconductor material are injected into those sub-layers through the exposed side surfaces without passing through another sub-layer. The pits can be formed by utilizing dislocations in the n-type semiconductor layer and etching the active layer using an etching atmosphere in the same chamber used to deposit the semiconductor layers without removing the partially fabricated device.

Abstract: Disclosed herein are a patterned substrate for a light emitting diode and a light emitting diode employing the patterned substrate. The substrate has top and bottom surfaces. Protrusion patterns are arranged on the top surface of the substrate. Furthermore, recessed regions surround the protrusion patterns. The recessed regions have irregular bottoms. Thus, the protrusion patterns and the recessed regions can prevent light emitted from a light emitting diode from being lost due to the total reflection to thereby improve light extraction efficiency.

Abstract: A device includes a textured substrate having a trench extending from a top surface of the textured substrate into the textured substrate, wherein the trench comprises a sidewall and a bottom. A light-emitting device (LED) includes an active layer over the textured substrate. The active layer has a first portion parallel to the sidewall of the trench and a second portion parallel to the bottom of the trench.

Abstract: A method for fabricating a semiconductor lighting chip includes steps of providing a substrate with an epitaxial layer thereon. The epitaxial layer comprises a first semiconductor layer, an active layer and a second semiconductor layer successively grown on the substrate. The epitaxial layer has dislocation defects traversing the first semiconductor layer, the active layer and the second semiconductor layer. The epitaxial layer is then subjected to an etching process which remove parts of the second semiconductor layer and the active layer along the dislocation defects to form recesses recessing from the second semiconductor layer to the active layer. Thereafter a first electrode and a second electrode are formed on the first semiconductor layer and the second semiconductor layer, respectively.

Abstract: A submount for a light emitting diode and a method for fabricating the same are provided. The method includes the following steps: (a) providing a silicon substrate; (b) forming a mask layer on the silicon substrate to expose a part of the silicon substrate; (c) forming a first silicon oxide layer in the part of the silicon substrate which is exposed; and (d) removing the mask layer and the first silicon oxide layer, so as to form a recess in the silicon substrate.

Abstract: Provided is a light-emitting device having a structure in which a high refractive index component is provided between a solid light-emitting element and air, has an uneven structure on a surface in contact with air, and can be reused. The light-emitting device includes a substrate having a refractive index of 1.6 or higher and a light-transmitting property, a solid light-emitting element including a light-emitting region having a refractive index of 1.6 or higher on one surface of the substrate, and a component having a refractive index of 1.6 or higher and a light-transmitting property on the other surface of the substrate, wherein the component includes an uneven structure on a surface in contact with air and is connected to the substrate via a liquid having a refractive index of 1.6 or higher and a light-transmitting property.

Abstract: A method for manufacturing a semiconductor laser includes the steps of preparing a mold with a pattern surface having recesses, forming a stacked semiconductor layer including a grating layer, forming a resin part on the grating layer, forming a resin pattern portion on the resin part, forming a diffraction grating by etching the grating layer using the resin part as a mask, and forming a mesa-structure on the stacked semiconductor layer. Each of the recesses includes two end portions and a middle portion between the two end portions. A depth of at least one of the two end portions from the pattern surface is greater than that of the middle portion. The step of forming the mesa-structure includes the step of etching the stacked semiconductor layer so as to remove end portions of the diffraction grating in a direction orthogonal to a periodic direction thereof.

Abstract: A semiconductor light emitting element comprising a light-reflecting layer formed on a support substrate, the light-reflecting layer having light reflectivity and including a bank portion having a particular plane pattern, a first electrode formed on the light-reflecting layer so as to surround the bank portion of the light-reflecting layer, the first electrode having light transparency, a stacked semiconductor layer formed on the first electrode, the stacked semiconductor layer, and a second electrode selectively formed on the stacked semiconductor layer, wherein the bank portion of the light-reflecting layer has a portion that overlaps the second electrode when viewed in plan, a portion that rises up from the first electrode when viewed in cross section, and a side wall surface that reflects light emitted from the active layer to a region of the second semiconductor layer in which the second electrode is not formed.

Abstract: A process for overcoming extreme topographies by first planarizing a cavity in a semiconductor substrate in order to create a planar surface for subsequent lithography processing. As a result of the planarizing process for extreme topographies, subsequent lithography processing is enabled including the deposition of features in close proximity to extreme topographic surfaces (e.g., deep cavities or channels) and, including the deposition of features within a cavity. In a first embodiment, the process for planarizing a cavity in a semiconductor substrate includes the application of dry film resists having high chemical resistance. In a second embodiment, the process for planarizing a cavity includes the filling of cavity using materials such as polymers, spin on glasses, and metallurgy.

Abstract: A transistor is manufactured by a method including: forming a first wiring layer; forming a first insulating film to cover the first wiring layer; forming a semiconductor layer over the first insulating film; forming a conductive film over the semiconductor layer; and performing at least two steps of etching on the conductive film to form second wiring layers which are apart from each other, wherein the two steps of etching include at least a first etching process performed under the condition that the etching rate for the conductive film is higher than the etching rate for the semiconductor layer, and a second etching process performed under the condition that the etching rates for the conductive film and the semiconductor layer are higher than those of the first etching process.

Abstract: A method for etching a diaphragm pressure sensor based on a hybrid anisotropic etching process. A substrate with an epitaxial etch stop layer can be etched utilizing an etching process in order to form a diaphragm at a selective portion of the substrate. The diaphragm can be oriented at an angle (e.g., 45 degree) with respect to the substrate in order to avoid an uncertain beveled portion in a stress/strain field of the diaphragm. The diaphragm can be further etched utilizing an etch finishing process to create an anisotropic edge portion on the major areas of the diaphragm and optimize the thickness and size of the diaphragm. Such an approach provides an enhanced diaphragm structure with respect to a wide range of pressure sensor applications.

Abstract: Embodiments of the invention relate to a stereoscopic image display device using a pattern retarder method, which can widen a vertical viewing angle when watching a stereoscopic image, and a method for fabricating the same. The stereoscopic image display device comprises: a display panel having data lines, gate lines crossing the data lines, and a plurality of pixels formed in cell areas defined by the crossings of the data lines and the gate lines; and a pattern retarder having a first retarder for passing only left circularly polarized light therethrough and a second retarder for passing only right circularly polarized light therethrough, wherein a plurality of light absorption patterns are formed in a first substrate of the display panel, and the long axis direction of the light absorption patterns is the same as the long axis direction of the first retarder and the second retarder.

Abstract: A light emitting device and method for making the same is disclosed. The light-emitting device includes an active layer sandwiched between a p-type semiconductor layer and an n-type semiconductor layer. The active layer emits lights when holes from the p-type semiconductor layer combine with electrons from the n-type semiconductor layer therein. The active layer includes a number of sub-layers and has a plurality of pits in which the side surfaces of a plurality of the sub-layers are in contact with the p-type semiconductor material such that holes from the p-type semiconductor material are injected into those sub-layers through the exposed side surfaces without passing through another sub-layer. The pits can be formed by utilizing dislocations in the n-type semiconductor layer and etching the active layer using an etching atmosphere in the same chamber used to deposit the semiconductor layers without removing the partially fabricated device.

Abstract: A nitride semiconductor device includes a first nitride semiconductor layer having a C-plane as a growth surface, and unevenness in an upper surface; and a second nitride semiconductor layer formed on the first nitride semiconductor layer to be in contact with the unevenness, and having p-type conductivity. The second nitride semiconductor layer located directly on a sidewall of the unevenness has a p-type carrier concentration of 1×1018/cm3 or more.

Abstract: An LED includes a substrate, a first n-type GaN layer, a connecting layer, a second n-type GaN layer, a light emitting layer, and a p-type GaN layer. The first n-type GaN layer, the connecting layer, and the second n-type GaN layer are formed on the substrate in sequence. The connecting layer is etchable by alkaline solution, and a bottom surface of the second n-type GaN layer facing towards the connecting layer has a roughed exposed portion. The GaN on the bottom surface of the second n-type GaN layer is N-face GaN. A top surface of the second n-type GaN layer facing away from the connecting layer includes a first area and a second area. The light emitting layer and the p-type GaN layer are formed on the first area of the top surface of the second n-type GaN layer in sequence.

Abstract: A semiconductor light-emitting device capable of improving current distribution, and a method for manufacturing the same is disclosed, wherein the semiconductor light-emitting device comprises a substrate; an N-type nitride semiconductor layer on the substrate; an active layer on the N-type nitride semiconductor layer; a P-type nitride semiconductor layer on the active layer; a groove in the P-type nitride semiconductor layer to form a predetermined pattern in the P-type nitride semiconductor layer; a light guide of transparent non-conductive material in the groove; and a transparent electrode layer on the P-type nitride semiconductor layer with the light guide.

Abstract: An organic light-emitting display panel is provided that improves luminous efficiency and luminescent color by adjusting the difference in film thickness between layers of different luminescent colors, such as intermediate layers, when the intermediate layer and light-emitting layers are formed by a wet method. By varying the film thickness of an interlayer insulation film, which is a lower layer of an organic light-emitting element, the volume of a contact hole is varied by color, thereby adjusting the volume of a concavity in each anode plate. When ink that includes material for the intermediate layer, or like, is sprayed by an inkjet method, the film thickness of the intermediate layer, or like, changes in accordance with the amount of ink filing the concavity. Therefore, by adjusting the difference in volume between concavities of different colors, the difference in film thickness between the intermediate layers, or like, is finely adjusted.

Abstract: Provided is a light-emitting device having a structure in which a high refractive index component is provided between a solid light-emitting element and air, has an uneven structure on a surface in contact with air, and can be reused. The light-emitting device includes a substrate having a refractive index of 1.6 or higher and a light-transmitting property, a solid light-emitting element including a light-emitting region having a refractive index of 1.6 or higher on one surface of the substrate, and a component having a refractive index of 1.6 or higher and a light-transmitting property on the other surface of the substrate, wherein the component includes an uneven structure on a surface in contact with air and is connected to the substrate via a liquid having a refractive index of 1.6 or higher and a light-transmitting property.

Abstract: A method for making a solar cell includes following steps. A silicon substrate is provided, and the silicon substrate has a first surface and a second surface opposite to the first surface. A patterned mask layer is located on the second surface, and the patterned mask layer includes a number of bar-shaped protruding structures aligned side by side. A slot is defined between each two adjacent protruding structures to expose a portion of the second surface of the silicon substrate. The exposed portion of the second surface is etched to form a protruding pair. The mask layer is removed. A doped silicon layer is located on the three-dimensional nano-structures. An upper electrode is applied on at least part of a surface of the doped silicon layer. A back electrode is placed on the first surface of the silicon substrate.

Abstract: A solution for designing and/or fabricating a structure including a quantum well and an adjacent barrier is provided. A target band discontinuity between the quantum well and the adjacent barrier is selected to coincide with an activation energy of a dopant for the quantum well and/or barrier. For example, a target valence band discontinuity can be selected such that a dopant energy level of a dopant in the adjacent barrier coincides with a valence energy band edge for the quantum well and/or a ground state energy for free carriers in a valence energy band for the quantum well. The quantum well and the adjacent barrier can be formed such that the actual band discontinuity corresponds to the target band discontinuity.

Abstract: A method of fabricating a light emitting device comprising: providing a substrate, wherein the substrate comprises a first major surface and a second major surface opposite to the first major surface, forming a plurality of light emitting stack layers on the first major surface, forming an etching protection layer on the plurality of light emitting stack layers, forming a plurality of discontinuous holes or continuous lines on the substrate by a laser beam with the depth of 10˜150 ?m, cleaving the substrate through the plurality of discontinuous holes or continuous lines, providing a adhesion layer on the second major surface of the substrate, and expanding the adhesion layer to form a plurality of separated light emitting device.

Abstract: A convex part formation method of forming a convex part in parallel with a <110> direction of a backing on the backing having a {100} face as the top surface thereof, includes: (a) forming a mask layer in parallel with the <110> direction on the backing; (b) etch the backing so as to form a convex-part upper layer whose sectional shape on a cutting plane corresponding to a {110} face is an isosceles trapezoid, the base of which is longer than the upper side thereof, and the side surface of which has an inclination of ?U; and (c) further etching the backing so as to form a convex-part lower layer whose sectional shape on the cutting plane corresponding to the {110} face is an isosceles trapezoid, the base of which is longer than the upper side thereof, and the side surface of which has an inclination of ?D (where ?D??U).

Abstract: A method for making light emitting diode is provided. The method includes following steps. A light emitting diode chip is provided, wherein the light emitting diode chip comprises a first semiconductor layer, an active layer and a second semiconductor layers stacked together in that order. A patterned mask layer is located on a surface of the first semiconductor layer, wherein the patterned mask layer includes a number of bar-shaped protruding structures aligned side by side, and a slot is defined between each two adjacent protruding structures to expose a portion of the first semiconductor layer. The exposed portion of the first semiconductor layer is etched to form a protruding pair. A number of M-shaped three-dimensional nano-structures are formed by removing the mask layer. A first electrode is electrically connected with the first semiconductor layer. A second electrode is electrically connected with the second semiconductor layer.

Abstract: A reflecting light emitting structure includes a substrate having a plurality of grooves formed in a first face of the substrate is disclosed. The first face is in a first crystallographic plane. Each of the plurality of grooves includes a first sidewall that is coplanar with a second crystallographic plane and a second sidewall that is coplanar with a third crystallographic plane. A buffer layer is provided on the substrate to reduce mechanical strain between the substrate and a light emitting diode (LED) fabricated on the buffer layer.

Abstract: A method for making light emitting diode is provided. The method includes following steps. A light emitting diode chip is provided, the light emitting diode includes a first semiconductor layer, an active layer and a second semiconductor layers stacked on a surface of a substrate in that order. A patterned mask layer is located on the second semiconductor layer, and the patterned mask layer includes a number of bar-shaped protruding structures aligned side by side. The second semiconductor layer is etched to form a number of three-dimensional nano-structures preform. The mask layer is removed to form a number of M-shaped three-dimensional nano-structures. The second semiconductor layer and the active layer are etched to expose a portion of the first semiconductor layer. A first electrode is electrically connected with the first semiconductor layer. A second electrode is electrically connected with the second semiconductor layer.

Abstract: A method for making light emitting diode is provided. The method includes following steps. A substrate is provided. A patterned mask layer is located on a surface of the substrate, and the patterned mask layer includes a number of bar-shaped protruding structures aligned side by side, a slot is defined between each two adjacent protruding structures to expose a portion of the substrate. The exposed substrate is etched, and each two adjacent protruding structures begin to slant face to face until closed to form a protruding pair. A number of three-dimensional nano-structures are formed by removing the patterned mask layer. A first semiconductor layer, an active layer and a second semiconductor layers are grown on the number of three-dimensional nano-structures in that order. A first electrode is electrically connected with the first semiconductor layer. A second electrode is electrically connected with the second semiconductor layer.