Abstract: Disclosed is a manufacture method of the array substrate, including: sequentially forming a gate, a gate insulating layer, an active layer, an ohmic contact layer and a metal layer on a substrate, forming a photoetching mask on the metal layer, where thickness of the photoetching mask in a half exposure area of the mask plate is from 2000 ? to 6000 ?; etching the metal layer, the ohmic contact layer and the active layer outside a covering area of the photoetching mask; ashing the photoetching mask for a preset time with an ashing reactant, wherein the ashing reactant comprises oxygen, and the preset time is from 70 seconds to 100 seconds; and sequentially etching the metal layer, the ohmic contact layer and the active layer based on the ashed photoetching mask, and forming a channel region of the array substrate. The present disclosure further discloses an array substrate, and a display panel.

Abstract: A display device includes: a substrate including a pad area; a plurality of first conductive pads disposed in a matrix form in the pad area in a first direction and in a second direction intersecting the first direction; protrusions disposed on the plurality of first conductive pads; and a plurality of second conductive pads disposed on the plurality of first conductive pads and the protrusions. The plurality of second conductive pads include: contact portions in contact with the first conductive pads; and raised portions configured to extend from the contact portions, to cover the protrusions, and to have heights greater than that of the contact portions. The plurality of second conductive pads include an ultrasonic bondable material.

Abstract: A light-emitting device, including a first type semiconductor layer, a patterned insulating layer, a light-emitting layer, and a second type semiconductor layer, is provided. The patterned insulating layer covers the first type semiconductor layer and has a plurality of insulating openings. The insulating openings are separated from each other. The light-emitting layer is located in the plurality of insulating openings and covers a portion of the first type semiconductor layer. The second type semiconductor layer is located on the light-emitting layer.

Abstract: A light extraction substrate includes a glass substrate having a first surface and a second surface. A first light extraction region can be defined on and/or adjacent the first surface. The first light extraction region includes nanoparticles. A second light extraction region can be defined on at least a part of the second surface. The second light extraction region has a surface roughness of at least 10 nm.

Abstract: The present invention discloses a double color micro LED display panel including a plurality of pixels. Each of the pixels includes a substrate, a first semiconductor layer configured on the substrate, a second semiconductor layer configured on the first semiconductor layer, and a third semiconductor layer configured between the first semiconductor layer and the second semiconductor layer. The first semiconductor layer and the second semiconductor layer are P type, and the third semiconductor layer is N type. The first semiconductor layer and the third semiconductor layer form a first light emitting diode to emit a first light, and the second semiconductor layer and the third semiconductor layer form a second light emitting diode to emit a second light.

Abstract: An optical signal to be detected enters single photon avalanche diode cells (SPAD) in a SPAD array and triggers photo event currents. Optical waveguides in the sensor carry an internal optical signal and a 1xN splitter divides the optical power into waveguide branches 206, 206?, . . . 206N-1. At the coupling structure, comprising 207, 207?, . . . 207N-1 positive-intrinsic-negative diode photodetector/waveguide structures, photo event currents from SPAD cells are converted to a change in the internal optical signal, by modifying internal optical signals 208, 208?, . . . 208N-1. A waveguide combiner further integrates the modified internal optical signals resulting from the photo event currents from all the cells in the sub-array. After all waveguide branches' signals are combined, a photodetector detects the internal optical signal and outputs an electrical signal.

Abstract: A display apparatus includes a substrate partitioned into a central area and a peripheral area disposed adjacent to the central area. The central area includes a display area; a first insulating layer corresponding to the peripheral area of the substrate; at least one slit corresponding to a region of the first insulating layer; and a cladding layer, which covers the at least one slit, on the first insulating layer.

Abstract: A display device includes: light-emitting regions different in luminescent colors and including luminescent layers separated for each of the luminescent colors; a low-threshold layer lower in threshold voltage than any one of the luminescent layers included in a pair of different-color light-emitting regions included in the light-emitting regions, different in the luminescent colors, and adjacent to each other; a continuous layer under the luminescent layers and the low-threshold layer, including first areas and a second area continuously, the first areas being in contact with the respective light-emitting regions, the second area being in contact with the low-threshold layer; pixel electrodes under the continuous layer, overlapping with the respective light-emitting regions; and a counter electrode over the luminescent layers and the low-threshold layer, being opposed to the pixel electrodes. The low-threshold layer is between the pair of different-color light-emitting regions.

Abstract: Disclosed in an embodiment is a semiconductor device package comprising a substrate and a plurality of semiconductor structures arranged to be spaced apart at the center of the substrate, wherein the semiconductor structure is arranged on the substrate and includes a first conductive type semiconductor layer, a second conductive type semiconductor layer, and an active layer arranged between the first conductive type semiconductor layer and the second conductive type semiconductor layer, and the ratio of the maximum height of the outermost surface of the first conductive type semiconductor layer to the length of the spacing distance between the adjacent semiconductor structures is 1:3 to 1:60.

Abstract: A mask, a manufacturing method therefor, and a manufacturing method for a display substrate are provided. The mask includes: a first clamping region and a second clamping region, which are opposite to each other in a first direction, and at least one mesh region between the first clamping region and the second clamping region, the mesh region is in a first shape, in a case where the mask is stretched in the first direction, the mesh region is in a target shape, the target shape is different from the first shape, and the target shape includes a polygon shape, a circle shape, or an ellipse shape.

Abstract: A light-emitting device includes a light-emitting element, the wavelength conversion member, and a light adjustment member. The light-emitting element includes a support substrate, and a first light-emitting portion and a second light-emitting portion disposed adjacent to each other. The wavelength conversion member is configured to perform wavelength conversion of first light emitted from the first light-emitting portion and second light emitted from the second light-emitting portion into third light. The light adjustment member overlaps one of the first light-emitting portion and the second light-emitting portion in a plan view. In the light-emitting element, an emission intensity of the first light at a light emission peak wavelength of the second light is lower than an emission intensity of the second light at the light emission peak wavelength of the second light, during light emission of the light-emitting device.

Abstract: Discussed is a display device capable of preventing lowering in a cathode voltage by the provision of an auxiliary connection portion and improving both the transmission efficiency of a transmissive portion and the luminance of an emission portion in a structure having both the transmissive portion and the emission portion.

Abstract: An electrostatic-type transducer (1) includes: an insulator sheet (11) formed of an elastomer; a plurality of first electrode sheets (12, 13, 14) which is arranged on a front surface side of the insulator sheet (11), adhered to the insulator sheet (11) by fusion of the insulator sheet (11), and arranged with a distance from each other in the surface direction of the insulator sheet (11); and one second electrode sheet (15) which is disposed on the back surface side of the insulator sheet (11) and adhered to the insulator sheet (11) by fusion of the insulator sheet (11), and in which portions facing the plurality of first electrode sheets (12, 13, 14) and portions facing each region between the adjacent first electrode sheets (12, 13, 14) in the surface direction are formed integrally.

Abstract: Trenched VCSEL emitter structures are described. In an embodiment, an emitter structure includes a cluster of non-uniformly distributed emitters in which each emitter includes an inside mesa trench and an oxidized portion of an oxide aperture layer extending from the inside mesa trench. An outside moat trench is located adjacent the inside mesa trench and is formed to a depth past the oxide aperture layer.

Abstract: A system includes a mask configured to forwardly diffract an input beam as a first set of two polarized beams. The system also includes a polarization conversion element configured to convert the first set of two polarized beams into a second set of two polarized beams having opposite handednesses. The two polarized beams having opposite handednesses interfere with one another to generate a polarization interference pattern.

Abstract: A method for fabricating light emitting diode (LED) dice includes the steps of: providing a substrate, and forming a plurality of die sized semiconductor structures on the substrate. The method also includes the steps of providing a receiving plate having an elastomeric polymer layer, placing the substrate and the receiving plate in physical contact with an adhesive force applied by the elastomeric polymer layer, and performing a laser lift-off (LLO) process by directing a uniform laser beam through the substrate to the semiconductor layer at an interface with the substrate to lift off the semiconductor structures onto the elastomeric polymer layer. During the laser lift-off (LLO) process the elastomeric polymer layer functions as a shock absorber to reduce momentum transfer, and as an adhesive surface to hold the semiconductor structures in place on the receiving plate.

Abstract: A manufacturing method for an LED includes: providing a substrate having an upper surface divided into a plurality of zones; a LED group formed on each of the zones and wherein: a plurality of the LED groups includes a first LED group; and the LEDs of the first LED group include a defective LED; forming a testing circuit on the substrate to electrically connect the LEDs; testing the first LED group by the testing circuit; recording a position of the defective LED; providing a carrier; and performing one of the following steps by the position of the defective LED: removing the defective LED from the substrate and then transferring the other LEDs in the first LED group to the carrier; transferring the other LEDs other than the defective LED in the first LED group to the carrier; or transferring the LEDs to the carrier and repairing it on the carrier.

Abstract: The disclosure relates to the field of display technology, and discloses a display panel. The display panel includes: a substrate including a display area; a backplane film layer, on a side of the substrate and in the display area; a via hole, in the display area and running through the backplane film layer; and a protective barrier, in the via hole and covering the end side of the backplane film layer.

Abstract: A method of forming a piezoelectric film can include providing a wafer in a CVD reaction chamber and forming an aluminum nitride material on the wafer, the aluminum nitride material doped with a first element E1 selected from group IIA or from group IIB and doped with a second element E2 selected from group IVB to provide the aluminum nitride material comprising a crystallinity of less than about 1.5 degree at Full Width Half Maximum (FWHM) to about 10 arcseconds at FWHM measured using X-ray diffraction (XRD).

Abstract: A semiconductor device is provided. The semiconductor device includes a first semiconductor layer; a second semiconductor layer on the first semiconductor layer; an active region between the second semiconductor layer and the first semiconductor layer; an electron blocking structure between the active region and the second semiconductor layer; a first nitride semiconductor layer between the active region and the electron blocking structure, and including indium and aluminum elements; and a second nitride semiconductor layer between the electron blocking structure and the second semiconductor layer, including indium element and devoid of gallium element; wherein the first nitride semiconductor layer has a first indium content, the second nitride semiconductor layer has a second indium content, and the first indium content is greater than the second indium content.

Abstract: An apparatus for positioning micro-devices on a substrate includes one or more supports to hold a donor substrate and a destination substrate, an adhesive dispenser to deliver adhesive on micro-devices on the donor substrate, a transfer device including a transfer surface to transfer the micro-devices from the donor substrate to the destination substrate, and a controller. The controller is configured to operate the adhesive dispenser to selectively dispense the adhesive onto selected micro-devices on the donor substrate based on a desired spacing of the selected micro-devices on the destination substrate. The controller is configured to operate the transfer device such that the transfer surface engages the adhesive on the donor substrate to cause the selected micro-devices to adhere to the transfer surface and the transfer surface then transfers the selected micro-devices from the donor substrate to the destination substrate.

Abstract: Various embodiments include methods of fabricating an array of self-aligned vertical solid state devices and integrating the devices to a system substrate. The method of fabricating a self-aligned vertical solid state device comprising: providing a semiconductor substrate, depositing a plurality of device layers on the semiconductor substrate, depositing an ohmic contact layer on an upper surface of one of the plurality of device layers, wherein the device layers comprises an active layer and a doped conductive layer, forming a patterned thick conductive layer on the ohmic contact layer; and selectively etching down the doped conductive layer that does not substantially etch the active layer.

Abstract: An apparatus includes a substrate having a surface and a transparent photocatalyst coating secured on the surface of the substrate, wherein the transparent photocatalyst coating includes titanium oxide and a component selected from a fluorescent dye, ultra-fine glitter, indium tin oxide, aluminum zinc oxide, silver nitrate, and combinations thereof. The substrate is preferably selected from an appliance handle, doorknob, switch, keyboard, countertop, appliance handle, equipment button, touchscreen, handrail, light emitting device, and light cover. Such substrates are frequently touched by one or more users and may become contaminated. However, the transparent photocatalyst coating may be self-decontaminating.

Abstract: Quantum dots and methods of making quantum dots are described. A method begins with forming quantum dots having a core-shell structure with a plurality of ligands on the shell structure. The method includes exchanging the plurality of ligands with a plurality of second ligands. The plurality of second ligands have a weaker binding affinity to the shell structure than the plurality of first ligands. The plurality of second ligands are then exchanged with hydrolyzed alkoxysilane to form a monolayer of hydrolyzed alkoxysilane on a surface of the shell structure. The method includes forming a barrier layer around the shell structure by using the hydrolyzed alkoxysilane as a nucleation center.

Abstract: An electronic component includes a package substrate extending in a longitudinal direction, and chip components disposed along the longitudinal direction of the package substrate and each connected to the package substrate by a bump. A height of a bump connecting at least one chip component disposed at an end portion in the longitudinal direction among the chip components and the package substrate is greater than a height of a bump connecting at least one chip component disposed inward relative to the end portion in the longitudinal direction among the chip components and the package substrate.

Abstract: An organic light-emitting display device and a manufacturing method thereof are disclosed. The display device includes a substrate including a first area, a second area and a third area, the second area being located between the first area and the third area; a plurality of pixels on the substrate, the plurality of pixels being located in the third area; a boss portion on the substrate, the boss portion being located in the second area; and an opening located in the first area and surrounded by the plurality of pixels. Each of the pixels includes a first electrode layer, an organic light-emitting layer, and a second electrode layer which are sequentially arranged in a direction away from the substrate. At least one of the organic light-emitting layer and the second electrode layer extends toward the opening and is disconnected at the boss portion. The boss portion includes a photoresist material.

Abstract: A system includes a processor and a memory with instructions. The instructions include, in response to receiving a zoned graph request, determining a current breakeven point on a current date based on a strike price of an option. The instructions include estimating a future strike price of the option based on an expiration date of the option, determining a future breakeven point on the expiration date of the option based on the estimated future strike price, and determining a range as a current price corresponding to the current breakeven point to a future price corresponding to the future breakeven point. The instructions include, for each time between the current date and the expiration date, determining a middle breakeven point at the corresponding time based on the range and generating a zoned graph including the current breakeven point, the future breakeven point, and each middle breakeven point at the corresponding times.

Abstract: Provided are a display panel and a display device. The display panel includes a base substrate, a first transistor, and a planarization layer. The first transistor includes a first active layer, a first gate, a first source, and a first drain. The planarization layer is located above the first source. In the direction perpendicular to the base substrate, at least one insulating layer and a first organic area are provided between the film layer where the first active layer is located and the planarization layer. An insulating layer in the first organic area is made of organic material and the first organic area is located in a display area.

Abstract: A touch display apparatus for sensing a touch of a user and/or a tool is provided. The touch display apparatus includes upper electrodes on emission areas. The upper electrodes may be separated by a separating partition on a separating area and a second opening of a bank insulating layer. Each of the upper electrodes may be connected to one of link wires, which are disposed between a device substrate and the bank insulating layer. Thus, in the touch display apparatus, a process for sensing the touch of the user and/or the tool may be simplified, and a process efficiency may be improved.

Abstract: A method for manufacturing an active matrix substrate includes: (A) a step of forming a laminated film including a lower conductive film, a lower insulating film, and a semiconductor film in this order on a substrate; (B) a step of forming a first resist layer; (C) a step of performing a patterning on the laminated film, the step including, in the first formation region, forming the first substructure including a first lower conductive layer, a first lower insulating layer, and a first semiconductor layer respectively formed from the lower conductive film, the lower insulating film, and the semiconductor film, and (D) a step of forming source and drain electrodes electrically connected to the first semiconductor layer.

Abstract: For optical communications between semiconductor ICs, optical transceiver assembly subsystems may be integrated with a processor. The optical transceiver assembly subsystems may be monolithically integrated with processor ICs or they may be provided in separate optical transceiver ICs coupled to or attached to the processor ICs.

Abstract: A light emitting device includes at least one light emitting and connecting unit that includes an epitaxial layer structure and a metallic connecting layer structure, and an insulating substrate that has a main substrate body and first and second contact members. The connecting layer structure interconnects the epitaxial layer structure and the main substrate body, and is completely plane at least right under the epitaxial layer structure. The contact members extend from a first surface to a second surface on the main substrate body, and are disposed outside an imaginary projection of the epitaxial layer structure on the main substrate body. The first contact member is electrically connected with the connecting layer structure. Alight emitting apparatus including the device is also disclosed.

Abstract: A semiconductor structure includes a glass substrate and a device wafer. The glass substrate includes a glass layer, a heat dissipation layer and a silicon nitride layer stacked from bottom to top. The device wafer includes at least one semiconductor device integrated in a device layer situated over the silicon nitride layer of the glass substrate. Or, the glass substrate includes a glass layer and a silicon nitride layer stacked from bottom to top. The device wafer includes at least one semiconductor device integrated in a device layer, and a heat dissipation layer is stacked on the device layer, wherein the heat dissipation layer is bonded with the silicon nitride layer of the glass substrate. The present invention also provides a method of wafer bonding for manufacturing said semiconductor structure.

Abstract: A laser power control device includes a storage unit that stores relational data having a measurement value of a heat radiation sensor, which measures intensity of heat radiation of an irradiation object irradiated with a laser beam from a laser machining device in association with a power value of the laser beam on a machining surface of the laser machining device.

Abstract: Provided is a thermoelectric element assembly including a soft support including a plurality of through-holes, and a plurality of p-type thermoelectric elements and a plurality of n-type thermoelectric elements inserted into a plurality of through-holes of the support, wherein a thickness of the support is less than a length of the thermoelectric element.

Abstract: A display device includes a window and a display panel attached to the window. The display panel includes a flat display area and a curved display area, and the curved display area may be thinner than the flat display area.

Abstract: Provided is a back side emitting light source array device and an electronic apparatus, the back side emitting light source array device includes a substrate, a distributed Bragg reflector (DBR) provided on a first surface of the substrate, a plurality of gain layers which are provided on the DBR, the plurality of gain layers being spaced apart from one another, and each of the plurality of gain layers being configured to individually generate light, and a nanostructure reflector provided on the plurality of gain layers opposite to the DBR, and including a plurality of nanostructures having a sub-wavelength shape dimension, wherein a reflectivity of the DBR is less than a reflectivity of the nanostructure reflector such that the light generated is emitted through the substrate.

Abstract: A display module and a manufacturing method thereof are provided. The manufacturing method may include forming an epitaxial film comprising a light emitting layer, a first type semiconductor layer, and a second type semiconductor layer, attaching the epitaxial film to an intermediate substrate comprising a conductive material, patterning the epitaxial film to form a light emitting diode (LED) and coupling the LED to a driving circuit layer through the conductive material.

Abstract: A flex-tolerant structure includes a flexible and foldable substrate and traces on the substrate. Each trace includes a stretch-resistant layer and a metal layer covering the stretch-resistant layer, electrical flow can persist through these layers even if the traces are fractured. A display panel is also disclosed.

Abstract: The present disclosure provides a stealth dicing method and apparatus. With the method, the focusing element focuses the laser beam on the surface of material to be diced, and the dynamic-equilibrium plasma channel is formed in the material to be diced by means of self-focusing and defocusing effect of plasma generated by ionizing the material to be diced. The modified layer may be formed in the material to be diced throughout the plasma channel, so as to realize stealth dicing.

Abstract: A method for preparation of orientation-patterned (OP) templates comprising the steps of: depositing a first layer of a first material on a common substrate by a far-from-equilibrium process; and depositing a first layer of a second material on the first layer of the first material by a close-to-equilibrium process, wherein a first assembly is formed. The first material and the second material may be the same material or different materials. The substrate material may be Al2O3 (sapphire), silicon (Si), germanium (Ge), GaAs, GaP, GaSb, InAs, InP, CdTe, CdS, CdSe, or GaSe. The first material deposited on the common substrate may be one or more electronic or optical binary materials from the group consisting of AlN, GaN, GaP, InP, GaAs, InAs, AlAs, ZnSe, GaSe, ZnTe, CdTe, HgTe, GaSb, SiC, CdS, CdSe, or their ternaries or quaternaries. The far-from-equilibrium process is one of MOCVD and MBE, and the close-to-equilibrium process is HVPE.

Abstract: The present application relates to the technical field of semiconductor optoelectronics, in particular to a multi-active-region cascaded semiconductor laser. The multi-active-region cascaded semiconductor laser comprises: a plurality of cascaded active regions, wherein each cascaded active region comprises a plurality of active regions; and a tunnel junction, arranged on at least one side of the cascaded active region and electrically connected with the cascaded active region; wherein in the cascaded active region, at least one group of adjacent active regions are connected through a barrier layer. In this way, more active regions are added in the periodic gain structure, which improves the internal quantum efficiency of the device and also reduces the carrier density, thereby obtaining more gains.

Abstract: An LED array comprises a first mesa comprising a top surface, at least a first LED including a first p-type layer, a first n-type layer and a first color active region and a tunnel junction on the first LED, a second n-type layer on the tunnel junction, the second n-type layer comprising at least one n-type III-nitride layer with >10% Al mole fraction and at least one n-type III-nitride layer with <10% Al mole fraction. The LED array further comprises an adjacent mesa comprising a top surface, the first LED, a second LED including the second n-type layer, a second p-type layer and a second color active region. A first trench separates the first mesa and the adjacent mesa, cathode metallization in the first trench and in electrical contact with the first and the second color active regions of the adjacent mesa, and anode metallization contacts on the n-type layer of the first mesa and on the anode layer of the adjacent mesa.

Abstract: A light-emitting device includes a substrate including a top surface, a first side surface and a second side surface, wherein the first side surface and the second side surface of the substrate are respectively connected to two opposite sides of the top surface of the substrate; a semiconductor stack formed on the top surface of the substrate, the semiconductor stack including a first semiconductor layer, a second semiconductor layer, and an active layer formed between the first semiconductor layer and the second semiconductor layer; a first electrode pad formed adjacent to a first edge of the light-emitting device; and a second electrode pad formed adjacent to a second edge of the light-emitting device, wherein in a top view of the light-emitting device, the first edge and the second edge are formed on different sides or opposite sides of the light-emitting device, the first semiconductor layer adjacent to the first edge includes a first sidewall directly connected to the first side surface of the substrate,

Abstract: A light-emitting diode (LED) device includes a light-emitting layer having a core-shell structure that comprises a first semiconductor layer, an active layer, and a second semiconductor layer; a passivation layer formed to cover at least a portion of a side surface and a portion of an upper surface of the second semiconductor layer; a first electrode formed on a portion of the passivation layer that is located on a side surface of the light-emitting layer, the first electrode electrically connected to the first semiconductor layer and including a reflective material; and a second electrode formed on a portion of the passivation layer that is located on an upper surface of the light-emitting layer, the second electrode contacting a portion of the upper surface of the second semiconductor layer that is exposed.

Abstract: A laser light irradiation device includes: a laser light source; a spatial light modulator including a display unit configured to display a phase pattern; an objective lens configured to condense a laser light emitted from the spatial light modulator at the object; an image-transfer optical system configured to transfer an image of the laser light on the display unit to an entrance pupil plane of the objective lens; a reflected light detector configured to detect reflected light of the laser light which is incident in the object and reflected by an opposite surface opposite to a laser light entrance surface; and a controller configured to control the phase pattern. When the reflected light detector detects the reflected light, the controller displays a reflected light aberration correction pattern which is the phase pattern correcting aberration generated in the event of the laser light being transmitted through the object having twice the predetermined thickness.

Abstract: A display device includes a thin film transistor disposed on a base substrate, an insulation layer covering the thin film transistor, an organic light-emitting diode disposed on the insulation layer, a bus electrode and an organic fluoride pattern. The organic light-emitting diode includes a first electrode electrically connected to the thin film transistor, an organic light-emitting layer disposed on the first electrode, and a second electrode disposed on the organic light-emitting layer. The bus electrode is disposed on the second electrode. The organic fluoride pattern is disposed adjacent to the bus electrode.

Abstract: A light emitting device includes a first light emitting diode (LED). The first LED includes a first metallic layer. The first LED additionally includes a p-doped semiconductor layer over the first metallic layer. Additionally, the first LED includes a multi quantum well (MQW) semiconductor layer over the p-doped semiconductor layer. Moreover, the first LED includes an n-doped semiconductor layer over the MQW semiconductor layer. Next, the first LED includes a second metallic layer over the n-doped semiconductor layer. The light emitting device also includes a second LED over the first LED. Further, the light emitting device includes a third LED over the second LED.

Abstract: The present disclosure provides an LED light source, a surface light source display module, and a preparation method for the LED light source. The LED light source includes: an LED chip including a first reflective layer, a P—GaN layer, a light-emitting layer, an N—GaN layer and a substrate, which are sequentially arranged from bottom to top; a light excitation layer configured for emitting light upon excitation with a blue light, wherein the LED chip is covered by the light excitation layer, that is, the light excitation layer is disposed on a top surface of the substrate of the LED chip and in contact with a side surface of the LED chip, wherein four side surfaces of the light excitation layer are defined as light output regions; and a second reflective layer disposed on a top surface of the light excitation layer, and a top surface of the second reflective layer is defined as a total reflection region or a partial reflection region. The light emission angle of the LED light source can be enlarged.

Abstract: Disclosed is a light-emitting device comprising a light-emitting stack having a length, a width, a first semiconductor layer, an active layer on the first semiconductor layer, and a second semiconductor layer on the active layer, wherein the first semiconductor layer, the active layer, and the second semiconductor layer are stacked in a stacking direction. A first electrode is coupled to the first semiconductor layer and extended in a direction parallel to the stacking direction and a second electrode is coupled to the second semiconductor layer and extended in a direction parallel to the stacking direction. A dielectric layer is disposed between the first electrode and the second electrode.