Abstract: The display device includes: a flexible display panel including a display portion in which scanning lines and signal lines cross each other; a supporting portion for supporting an end portion of the flexible display panel; a signal line driver circuit for outputting a signal to the signal line, which is provided for the supporting portion; and a scanning line driver circuit for outputting a signal to the scanning line, which is provided for a flexible surface of the display panel in a direction which is perpendicular or substantially perpendicular to the supporting portion.

Abstract: A display device includes a substrate including a plurality of sub-pixels; a planarization layer disposed on the substrate and including a trench adjacent to the plurality of sub-pixels; a plurality of light emitting elements disposed in the plurality of sub-pixels and sharing an organic layer and a cathode; and an auxiliary electrode disposed in the trench and connected to the cathode. A side surface of the auxiliary electrode has a concave shape. The organic layer has an open portion that is disconnected by the auxiliary electrode. Therefore, it is possible to minimize current leakage through the common layer and prevent an increase in resistance of the cathode by the auxiliary electrode.

Abstract: A display panel and a manufacturing method thereof are provided. A driving circuit layer includes an auxiliary electrode and an undercut structure. An undercut space is defined on the undercut structure. The auxiliary electrode includes a connection portion. The connection portion extends along a peripheral direction of the undercut structure. The connection portion is exposed by the undercut space. A light-emitting layer and a second electrode are cut at where the undercut structure is. The second electrode is connected to the connection portion of the auxiliary electrode. An encapsulation layer extends into the undercut space and covers the second electrode.

Abstract: Provided are an array substrate, a fabrication method thereof, and a display panel. The array substrate includes a substrate; a reflective electrode layer on the substrate; a pixel defining layer on a side of the reflective electrode layer away from the substrate; an anti-reflection layer between the reflective electrode layer and the pixel defining layer, and configured to absorb light from outside, an orthographic projection of the anti-reflection layer on the substrate being within an overlapping portion between the orthographic projection of the reflective electrode layer on the substrate and the orthographic projection of the pixel defining layer on the substrate; and a black matrix on a side of the pixel defining layer away from the substrate, an orthographic projection of at least a portion of the anti-reflection layer on the substrate not overlapping with an orthographic projection of the black matrix on the substrate.

Abstract: An optical system, a display apparatus, and smart glasses are provided. The optical system includes a transflective element, a reflective element and a plurality of microstructures. The transflective element is configured to reflect collimated incident light to the reflective element. The reflective element is configured to reflect the collimated incident light back to a light incident surface of the transflective element, so as to adjust an angle at which the collimated incident light exits. The transflective element is further configured to transmit the reflected-back collimated incident light to a target region. The plurality of microstructures are configured to adjust angles at which ambient stray light incident on surfaces thereof exits, and to scatter the ambient stray light out of the target region.

Abstract: A method of forming a semiconductor device includes: forming a patterned hard mask layer on a semiconductor substrate; performing a first etching process to form a recess in an exposed portion of the semiconductor substrate, using a first etchant that includes a first halogen species; performing a second etching process using a second etchant that includes a second halogen species, such that the second halogen species forms a barrier layer in the semiconductor substrate, surrounding the recess; and growing a detection region in the recess using an epitaxial growth process. The barrier layer is configured to reduce diffusion of the first halogen species into the detection region.

Abstract: An LED module includes a first electrode and a second electrode disposed on the substrate, an LED chip disposed on the first electrode and the second electrode, and a first bump between the LED chip and the first electrode, and a second bump between the LED chip and the second electrode. The LED chip includes a cathode electrode facing the first electrode, an anode electrode facing the second electrode, and a step portion between the cathode electrode and the anode electrode, a distance between the first electrode and the cathode electrode is larger than a distance between the second electrode and the anode electrode, and the first bump is disposed to embed the step portion.

Abstract: Disclosed are apparatus and methods for a silicon photonic (SiPh) structure comprising the integration of an electrical integrated circuit (EIC); a photonic integrated circuit (PIC) disposed on top of the EIC; two or more polymer waveguides (PWGs) disposed on top of the PIC and formed by layers of cladding polymer and core polymer; and an integration fan-out redistribution (InFO RDL) layer disposed on top of the two or more PWGs. The operation of PWGs is based on the refractive indexes of the cladding and core polymers. Inter-layer optical signals coupling is provided by edge-coupling, reflective prisms and grating coupling. A wafer-level system implements a SiPh structure die and provides inter-die signal optical interconnections among the PWGs.

Abstract: A wiring structure includes a structure body including a pattern, a first conductive layer above the structure body, the first conductive layer having a shape, the shape crossing an edge of a pattern of the structure body and reflecting a step of the edge of the pattern of the structure body, a first insulating layer above the first conductive layer, the first insulating layer having a first opening overlapping the edge of the pattern of the structure body in a plane view, and r is arranged with a second opening in a region overlapping the semiconductor layer in a plane view, a second conductive layer in the first opening, the second conductive layer being connected to the first conductive layer.

Abstract: The invention relates to a 3D component printing process wherein a body is built up from starting material that is irradiated trace-by-trace with a beam, and to a 3D printed component produced by this process. The beam has an effective area profile that is not rotationally symmetric, the effective area profile of the beam being oriented in accordance with the track direction. The invention further relates to a beam orienting assembly for a 3D printing machine and a 3D printing machine comprising such a beam orienting assembly.

Abstract: A terahertz module includes: a terahertz chip which includes an active device which emits a terahertz wave; and a dielectric substrate coupled to the terahertz chip. The terahertz chip includes a semiconductor substrate. The active device is disposed on an upper surface of the semiconductor substrate. A cutout is formed in a portion of a first side surface, among a plurality of side surfaces of the dielectric substrate, the cutout extending from an upper side of the first side surface to a lower side of the first side surface. The terahertz chip is fit into the cutout in such a direction that the upper surface of the semiconductor substrate is parallel to the first side surface and the semiconductor substrate is arranged in a bottom side of the cutout.

Abstract: Provided is a ?-Ga2O3 based semiconductor film which is a semiconductor film in a circular shape having a crystal having a corundum-type crystal structure composed of ?-Ga2O3 or an ?-Ga2O3 solid solution as a main phase. The maximum value ?max and the minimum value ?min for off-angles at the center point X and four outer circumferential points A, B, C, and D of a surface of the semiconductor film satisfy the relationship of ?max-?min?0.30°. The off-angle is defined as an inclination angle ? of a crystal axis oriented in the substantially normal direction of the semiconductor film with respect to the film surface normal of the semiconductor film.

Abstract: An optoelectronic device includes a semiconductor die that includes a substrate layer, a laser diode, first and second conducting pads, a cathode pad, an anode pad, and a passivation layer. The laser diode and the conducting pads are formed on the substrate layer. The formation of the conducting pads directly on the substrate layer offers an increased area for heat dissipation. The cathode pad is formed on the first conducting pad whereas the anode pad is formed above the second conducting pad. The passivation layer is formed above the laser diode. The attachment of the semiconductor die to a submount of the optoelectronic device occurs by way of the cathode pad and the anode pad. After the attachment, a free space is created directly between the passivation layer and the submount to reduce the impact of solder bonding stress on the laser diode.

Abstract: A thin film packaging structure includes a first inorganic packaging layer for covering a device to be packaged; an organic packaging layer formed at a side of the first inorganic packaging layer; a second inorganic packaging layer formed at a side of the organic packaging layer facing away from the first inorganic packaging layer; and at least one first inorganic layer formed at a side of the first inorganic packaging layer facing away from the device to be packaged. The at least one first inorganic layer has an elasticity modulus greater than that of the first inorganic packaging layer or the second inorganic packaging layer. The present disclosure also provides a display panel.

Abstract: Sub-pixel circuits and methods of forming sub-pixel circuits that may be utilized in an organic light-emitting diode (OLED) display are described herein. The overhang structures are permanent to the sub-pixel circuit. The overhang structures include a conductive oxide. A first configuration of the overhang structures includes a base portion and a top portion with the top portion disposed on the base portion. In a first sub-configuration, the base portion includes the conductive oxide of at least one of a TCO material or a TMO material. In a second sub-configuration, the base portion includes a metal alloy material and the conductive oxide of a metal oxide surface. A second configuration of the overhang structures includes the base portion and the top portion with a body portion disposed between the base portion and the top portion. The body portion includes the metal alloy body and the metal oxide surface.

Abstract: A light emitting diode includes a first end and a second end facing each other, a current blocking layer, a first semiconductor layer, an active layer, a second semiconductor layer, and an insulating film surrounding outer circumferential surfaces of the first semiconductor layer, the active layer, and the second semiconductor layer and exposing at least a portion of the current blocking layer and at least a portion of the first semiconductor layer at the second end. The current blocking layer, the first semiconductor layer, the active layer, and the second semiconductor layer are sequentially disposed in a direction from the second end to the first end.

Abstract: A display panel and a method for manufacturing the display panel are provided. The method comprises forming an array driving layer, a binding terminal, a passivation layer, a covering layer and an electrode layer on a substrate, and applying a half-tone mask to perform a patterning process on the covering layer and the electrode layer, so that the covering layer forms a first covering portion connected to the binding terminal through a first through hole and a second covering portion corresponding to the array driving layer formed on the display area. The electrode layer forms a second electrode portion on the second covering portion.

Abstract: A method for manufacturing a wide band gap semiconductor device using a substrate of SiC wafer is disclosed. The method includes coating the substrate with a hard mask material, performing lithography to define patterned openings in the hard mask material of the substrate, etching the substrate to form patterned trenches from the defined patterned openings, removing the hard mask using a chemical process from the substrate, cleaning the substrate with the patterned trenches, performing epitaxy on the substrate to form a uniform single crystal layer over the patterned trenches to create a plurality of micro voids, kiss polishing the substrate, performing another epitaxy on the substrate using a fast epitaxial growth process to provide an active device epitaxial layer suitable to fabricate SiC devices, and after fabrication of the SiC devices, severing the plurality of micro voids to extract the SiC devices from the substrate of the SiC wafer.

Abstract: A cooling recover system and method are disclosed. A fluid, such as water, is chilled and provided to a cooling coil to cool and dehumidify air passing over the cooling coil. The fluid is output from the cooling coil through an outlet, and at least a portion of the fluid from the outlet of the cooling coil is provided to an inlet of a heat transfer coil to reheat air passing over the heat transfer coil. The fluid is warmed as it passes through the cooling coil, which warmer temperature serves to reheat the air passing over the heat transfer coil.

Abstract: A method of manufacturing an integrated circuit (IC) includes forming a first active region in a first cell. The method includes forming a plurality of second active regions in a second cell, wherein the second cell abuts the first cell. The method includes forming a third active region in a third cell, wherein the second cell is between the first cell and the third cell, and a height of the second cell is different from a height of the first cell or the third cell. The method includes forming a plurality of gate structures extending across each of the first active region, the plurality of second active regions, and the third active region. The method includes removing a first portion of a first gate structure at an interface between the first cell and the second cell between the first active region and the plurality of second active regions.

Abstract: A method for producing a planar light circuit is specified. The method comprises: providing a substrate free of light producing regions, depositing a waveguide layer, applying a photostructurable mask on the waveguide layer, photostructuring of the photostructurable mask such that the photostructurable mask is removed in regions, etching of the waveguide layer in the regions such that channels are produced in the waveguide layer, wherein the channels confine waveguides, removal of the photostructurable mask layer, and singulating into a planar light circuit. Furthermore, a planar light circuit is specified.

Abstract: A vehicular display assembly includes a pixelated display having a plurality of micro-LEDs disposed at a substrate. Packing density of micro-LEDs of the plurality of micro-LEDs at the substrate is at least 10 micro-LEDs per square centimeter. Each individual micro-LED of the plurality of micro-LEDs, when the vehicular display assembly is operated to emit light, may pass less than 4 mA electrical current. The vehicular display assembly is configured to be disposed at a portion of a vehicle equipped with the vehicular display assembly. With the vehicular display assembly disposed at the portion of the equipped vehicle, light emitted by the plurality of micro-LEDs, when the vehicular display assembly is operated to emit light, is viewable at the portion of the equipped vehicle.

Abstract: A light emitting device includes a substrate. First and second electrodes are on the substrate and spaced from each other. A first insulating layer is on the substrate and the first and second electrodes, and includes openings to partially expose opposing portions of the first and second electrodes adjacent an area between the first and second electrodes. At least one light emitting element is located in the opening. A first end of the at least one light emitting element is connected to a first portion of the first electrode exposed by the opening, and a second end of the at least one light emitting element is connected to a second portion of the second electrode exposed by the opening.

Abstract: Disclosed are a Mach-Zehnder interferometric optical modulator and a method for manufacturing the same. The modulator includes first and second lower clad layers, a core layer, an upper clad layer, a waveguide, and electrodes. The waveguide may include an input waveguide, a waveguide divider, branch waveguides, and a waveguide combiner. Each of the branch waveguides includes first and second connection regions connected to the waveguide combiner and the waveguide divider, respectively, and a phase shift region having a cross-section of a reverse mesa structure that has an upper width that is the same as widths of the first and second connection regions and a lower width that is smaller than the widths of the first and second connection regions.

Abstract: A light emitting element includes: a semiconductor structure; first and second electrodes formed above the semiconductor structure; and a protective film. In a plan view: the first electrode has a first connecting portion, a first extending portion, and two second extending portions, the second electrode has a second connecting portion, and two third extending portions, the first extending portion extends linearly in a direction from the first connecting portion toward the second connecting portion, the two second extending portions are located on opposite sides of the first extending portion, respectively, with each of the second extending portions having two bent portions and a linear portion extending parallel to the first extending portion and located between the two bent portions, and the two third extending portions are located between the first extending portion and the two second extending portions, respectively.

Abstract: An object is to improve reliability of a light-emitting device. A light-emitting device has a driver circuit portion including a transistor for a driver circuit and a pixel portion including a transistor for a pixel over one substrate. The transistor for the driver circuit and the transistor for the pixel are inverted staggered transistors each including an oxide semiconductor layer in contact with part of an oxide insulating layer. In the pixel portion, a color filter layer and a light-emitting element are provided over the oxide insulating layer. In the transistor for the driver circuit, a conductive layer overlapping with a gate electrode layer and the oxide semiconductor layer is provided over the oxide insulating layer. The gate electrode layer, a source electrode layer, and a drain electrode layer are formed using metal conductive films.

Abstract: An electroluminescent device includes a scanning line that extends in a first direction, a light emitting element, a driving transistor that supplies a driving current to the light emitting element, a first conductive layer that is supplied a fixed potential and extends in the first direction, a second conductive layer that is supplied the fixed potential and is disposed on a different layer than the first conductive layer, and a third conductive layer that is electrically connected to a first terminal of the driving transistor and to the light emitting element, and is disposed on a same layer as the second conductive layer. The third conductive layer is surrounded by the second conductive layer in plan view.

Abstract: A light emitting device in which a pixel is arranged is provided. The pixel includes a light emitting element, a first transistor configured to supply, to the light emitting element, a current corresponding to a luminance signal, and a second transistor configured to supply the luminance signal to a gate electrode of the first transistor. Diffusion regions respectively functioning as a source region and a drain region of the second transistor are of a first conductivity type, and a gate electrode of the second transistor is of a second conductivity type opposite to the first conductivity type.

Abstract: The present disclosure relates to an imaging element, a fabrication method, and electronic equipment by which an image having higher picture quality can be imaged. The imaging element includes a first light absorbing film formed in an effective pixel peripheral region, the effective pixel peripheral region being provided so as to enclose an outer side of an effective pixel region in which a plurality of pixels is disposed in a matrix, so as to cover a semiconductor substrate, a microlens layer provided as an upper layer than the first light absorbing film and having a microlens formed so as to condense light for each of the pixels in the effective pixel region, and a second light absorbing film provided as an upper layer than the microlens layer and formed in the effective pixel peripheral region. The present technology can be applied, for example, to a CMOS image sensor.

Abstract: The present document discloses a heterostructure for a high electron mobility transistor (HEMT). The heterostructure comprises a SiC substrate, an InxAlyGa1-x-yN nucleation layer (12), wherein x=0-1, y=0-1, preferably x<0.05 and y>0.50, more preferably x<0.03 and y>0.70 and most preferably x<0.01 and y>0.90, formed on the SiC substrate. The heterostructure further comprises a GaN channel layer formed on the InxAlyGa1-x-yN nucleation layer. A thickness of the GaN channel layer is 50 to 500 nm, preferably 100 to 450 nm, most preferably 150 to 400 nm. The GaN channel layer presents a rocking curve with a (002) peak having a FMHW below 300 arcsec, and a rocking curve with a (102) peak having a FMHW below 400 arcsec as determined by X-ray diffraction, XRD. A surface of an uppermost layer of the heterostructure (1) exhibits an atomic step-flow morphology with rms roughness over a 10 ?m2 scan area of below 1.8 nm, preferably below 1.

Abstract: Provided is an n-type GaN crystal, in which a donor impurity contained at the highest concentration is Ge, and which has a room-temperature resistivity of lower than 0.03 ?·cm and a (004) XRD rocking curve FWHM of less than 20 arcsec. The n-type GaN crystal has two main surfaces, each having an area of 2 cm2 or larger. One of the two main surfaces can have a Ga polarity and can be inclined at an angle of 0° to 10° with respect to a (0001) crystal plane. Further, the n-type GaN crystal can have a diameter of 20 mm or larger.

Abstract: The present invention provides a product with incorporated operation display panel that further improves visibility at the time of light emission. The product with incorporated operation display panel includes a transparent conductive sheet, a display panel with a touch sensor furnished at least with light emitting elements consisting of light emitting elements arranged in two dimensions and being the product with incorporated operation display panel furnished with a thin layer that covers the total or a part of the front surface of a display panel, and a transparent substrate that forms a light guiding path is disposed at an opening between a transparent conductive sheet and a thin layer, or at an opening between a transparent conductive sheet and a light emitting device array substrate. The transparent base has micropores provided in a resin base material made of a transparent resin, and the micropores are formed by a lattice-like louver.

Abstract: Semiconductor devices are described that have a metal interconnect extending vertically through a portion of the device to the back side of a semiconductor substrate. A top region of the metal interconnect is located vertically below a horizontal plane containing a metal routing layer. Method of fabricating the semiconductor device can include etching a via into a semiconductor substrate, filling the via with a metal material, forming a metal routing layer subsequent to filling the via, and removing a portion of a bottom of the semiconductor substrate to expose a bottom region of the metal filled via.

Abstract: Disclosed is a manufacture method of the array substrate, including: sequentially forming a gate, a gate insulating layer, an active layer, an ohmic contact layer and a metal layer on a substrate, forming a photoetching mask on the metal layer, where thickness of the photoetching mask in a half exposure area of the mask plate is from 2000 ? to 6000 ?; etching the metal layer, the ohmic contact layer and the active layer outside a covering area of the photoetching mask; ashing the photoetching mask for a preset time with an ashing reactant, wherein the ashing reactant comprises oxygen, and the preset time is from 70 seconds to 100 seconds; and sequentially etching the metal layer, the ohmic contact layer and the active layer based on the ashed photoetching mask, and forming a channel region of the array substrate. The present disclosure further discloses an array substrate, and a display panel.

Abstract: A display device includes: a substrate including a pad area; a plurality of first conductive pads disposed in a matrix form in the pad area in a first direction and in a second direction intersecting the first direction; protrusions disposed on the plurality of first conductive pads; and a plurality of second conductive pads disposed on the plurality of first conductive pads and the protrusions. The plurality of second conductive pads include: contact portions in contact with the first conductive pads; and raised portions configured to extend from the contact portions, to cover the protrusions, and to have heights greater than that of the contact portions. The plurality of second conductive pads include an ultrasonic bondable material.

Abstract: A light-emitting device, including a first type semiconductor layer, a patterned insulating layer, a light-emitting layer, and a second type semiconductor layer, is provided. The patterned insulating layer covers the first type semiconductor layer and has a plurality of insulating openings. The insulating openings are separated from each other. The light-emitting layer is located in the plurality of insulating openings and covers a portion of the first type semiconductor layer. The second type semiconductor layer is located on the light-emitting layer.

Abstract: A light extraction substrate includes a glass substrate having a first surface and a second surface. A first light extraction region can be defined on and/or adjacent the first surface. The first light extraction region includes nanoparticles. A second light extraction region can be defined on at least a part of the second surface. The second light extraction region has a surface roughness of at least 10 nm.

Abstract: The present invention discloses a double color micro LED display panel including a plurality of pixels. Each of the pixels includes a substrate, a first semiconductor layer configured on the substrate, a second semiconductor layer configured on the first semiconductor layer, and a third semiconductor layer configured between the first semiconductor layer and the second semiconductor layer. The first semiconductor layer and the second semiconductor layer are P type, and the third semiconductor layer is N type. The first semiconductor layer and the third semiconductor layer form a first light emitting diode to emit a first light, and the second semiconductor layer and the third semiconductor layer form a second light emitting diode to emit a second light.

Abstract: An optical signal to be detected enters single photon avalanche diode cells (SPAD) in a SPAD array and triggers photo event currents. Optical waveguides in the sensor carry an internal optical signal and a 1xN splitter divides the optical power into waveguide branches 206, 206?, . . . 206N-1. At the coupling structure, comprising 207, 207?, . . . 207N-1 positive-intrinsic-negative diode photodetector/waveguide structures, photo event currents from SPAD cells are converted to a change in the internal optical signal, by modifying internal optical signals 208, 208?, . . . 208N-1. A waveguide combiner further integrates the modified internal optical signals resulting from the photo event currents from all the cells in the sub-array. After all waveguide branches' signals are combined, a photodetector detects the internal optical signal and outputs an electrical signal.

Abstract: A display apparatus includes a substrate partitioned into a central area and a peripheral area disposed adjacent to the central area. The central area includes a display area; a first insulating layer corresponding to the peripheral area of the substrate; at least one slit corresponding to a region of the first insulating layer; and a cladding layer, which covers the at least one slit, on the first insulating layer.

Abstract: A display device includes: light-emitting regions different in luminescent colors and including luminescent layers separated for each of the luminescent colors; a low-threshold layer lower in threshold voltage than any one of the luminescent layers included in a pair of different-color light-emitting regions included in the light-emitting regions, different in the luminescent colors, and adjacent to each other; a continuous layer under the luminescent layers and the low-threshold layer, including first areas and a second area continuously, the first areas being in contact with the respective light-emitting regions, the second area being in contact with the low-threshold layer; pixel electrodes under the continuous layer, overlapping with the respective light-emitting regions; and a counter electrode over the luminescent layers and the low-threshold layer, being opposed to the pixel electrodes. The low-threshold layer is between the pair of different-color light-emitting regions.

Abstract: Disclosed in an embodiment is a semiconductor device package comprising a substrate and a plurality of semiconductor structures arranged to be spaced apart at the center of the substrate, wherein the semiconductor structure is arranged on the substrate and includes a first conductive type semiconductor layer, a second conductive type semiconductor layer, and an active layer arranged between the first conductive type semiconductor layer and the second conductive type semiconductor layer, and the ratio of the maximum height of the outermost surface of the first conductive type semiconductor layer to the length of the spacing distance between the adjacent semiconductor structures is 1:3 to 1:60.

Abstract: A mask, a manufacturing method therefor, and a manufacturing method for a display substrate are provided. The mask includes: a first clamping region and a second clamping region, which are opposite to each other in a first direction, and at least one mesh region between the first clamping region and the second clamping region, the mesh region is in a first shape, in a case where the mask is stretched in the first direction, the mesh region is in a target shape, the target shape is different from the first shape, and the target shape includes a polygon shape, a circle shape, or an ellipse shape.

Abstract: A light-emitting device includes a light-emitting element, the wavelength conversion member, and a light adjustment member. The light-emitting element includes a support substrate, and a first light-emitting portion and a second light-emitting portion disposed adjacent to each other. The wavelength conversion member is configured to perform wavelength conversion of first light emitted from the first light-emitting portion and second light emitted from the second light-emitting portion into third light. The light adjustment member overlaps one of the first light-emitting portion and the second light-emitting portion in a plan view. In the light-emitting element, an emission intensity of the first light at a light emission peak wavelength of the second light is lower than an emission intensity of the second light at the light emission peak wavelength of the second light, during light emission of the light-emitting device.

Abstract: Discussed is a display device capable of preventing lowering in a cathode voltage by the provision of an auxiliary connection portion and improving both the transmission efficiency of a transmissive portion and the luminance of an emission portion in a structure having both the transmissive portion and the emission portion.

Abstract: An electrostatic-type transducer (1) includes: an insulator sheet (11) formed of an elastomer; a plurality of first electrode sheets (12, 13, 14) which is arranged on a front surface side of the insulator sheet (11), adhered to the insulator sheet (11) by fusion of the insulator sheet (11), and arranged with a distance from each other in the surface direction of the insulator sheet (11); and one second electrode sheet (15) which is disposed on the back surface side of the insulator sheet (11) and adhered to the insulator sheet (11) by fusion of the insulator sheet (11), and in which portions facing the plurality of first electrode sheets (12, 13, 14) and portions facing each region between the adjacent first electrode sheets (12, 13, 14) in the surface direction are formed integrally.

Abstract: Trenched VCSEL emitter structures are described. In an embodiment, an emitter structure includes a cluster of non-uniformly distributed emitters in which each emitter includes an inside mesa trench and an oxidized portion of an oxide aperture layer extending from the inside mesa trench. An outside moat trench is located adjacent the inside mesa trench and is formed to a depth past the oxide aperture layer.

Abstract: A system includes a mask configured to forwardly diffract an input beam as a first set of two polarized beams. The system also includes a polarization conversion element configured to convert the first set of two polarized beams into a second set of two polarized beams having opposite handednesses. The two polarized beams having opposite handednesses interfere with one another to generate a polarization interference pattern.

Abstract: A method for fabricating light emitting diode (LED) dice includes the steps of: providing a substrate, and forming a plurality of die sized semiconductor structures on the substrate. The method also includes the steps of providing a receiving plate having an elastomeric polymer layer, placing the substrate and the receiving plate in physical contact with an adhesive force applied by the elastomeric polymer layer, and performing a laser lift-off (LLO) process by directing a uniform laser beam through the substrate to the semiconductor layer at an interface with the substrate to lift off the semiconductor structures onto the elastomeric polymer layer. During the laser lift-off (LLO) process the elastomeric polymer layer functions as a shock absorber to reduce momentum transfer, and as an adhesive surface to hold the semiconductor structures in place on the receiving plate.

Abstract: A manufacturing method for an LED includes: providing a substrate having an upper surface divided into a plurality of zones; a LED group formed on each of the zones and wherein: a plurality of the LED groups includes a first LED group; and the LEDs of the first LED group include a defective LED; forming a testing circuit on the substrate to electrically connect the LEDs; testing the first LED group by the testing circuit; recording a position of the defective LED; providing a carrier; and performing one of the following steps by the position of the defective LED: removing the defective LED from the substrate and then transferring the other LEDs in the first LED group to the carrier; transferring the other LEDs other than the defective LED in the first LED group to the carrier; or transferring the LEDs to the carrier and repairing it on the carrier.