Abstract: The present invention relates to a method for fabricating semiconductor device with negative differential conductance or transconductance. According to the present invention, a fabrication process thereof can be simplified by using an SOI (Silicon-On-Insulator) substrate, and a tunneling device exhibiting the negative differential conductance or transconductance at room temperature can be implemented by using P+-N+ junction barriers as tunneling barriers and implanting impurity ions into a channel region so that their density is higher than the effective density of states where electrons or holes can exist thereon. Since the semiconductor device with the negative differential conductance or transconductance can be also be implemented even at room temperature, there is an advantage in that the present invention can be applied to an SRAM or a logic device using a device which can be turned on/off in response to a specific voltage. Further, according to the fabrication method of the present invention.

Abstract: A method for fabrication of defect-free epitaxial layers on top of a surface of a first defect-containing solid state material includes the steps of selective deposition of a second material, having a high temperature stability, on defect-free regions of the first solid state material, followed by subsequent evaporation of the regions in the vicinity of the defects, and subsequent overgrowth by a third material forming a defect-free layer.

Abstract: A method of fabricating a device with spherical quantum dots by a combination of gas condensation and an epitaxial technique includes the following steps: (a) a quantum dots growth step, when the quantum dots are grown on the substrate by a gas condensation method; (b) a quantum dots processing step, when an ultrasonic cleaner is used with an organic solvent to vibrate the substrate in which quantum dots have been grown in step (a), or the substrate in which quantum dots have been grown in step (a) is thermally annealed at a high temperature to obtain a thin layer of quantum dots; and (c) an epitaxial layer cover step, when an epitaxial layer is covered over the quantum dots processed by step (b) by an epitaxial technique. By virtue of the above processes, a device with completely spherical quantum dots is obtained.

Abstract: A process for forming a thin layer of Silicon nanocrystals in an oxide layer is disclosed. The process includes, on a semiconductive substrate, thermally oxidizing a first portion of the substrate into an oxide layer, forming Silicon ions within the layer of oxide, and thermally treating the Silicon ions to become the thin layer of Silicon nanocrystals. In the inventive process the formation of the Silicon ions is by ionic implantation of the Silicon ions into the oxide at an ionization energy of between 0.1 keV and 7 keV, and preferably between 1 and 5 keV. This allows the Silicon atoms to coalesce in a lower temperature than would otherwise be possible. Additionally, more than one layer of nanocrystals can be formed by performing more than one implantation at more than one energy level. Embodiments of the invention can be used to form non-volatile memory devices with a very high quality having a very small size.

Abstract: The present invention discloses a method for fabricating multiple-thickness insulator layers via strain field generated by stress. The strain field is used for alternating a develop mechanism of insulator layers on the quantum dots. By forming the multiple-thickness insulator layers at various developing rates, not only leakage current is prevented, but also components are kept isolated in the nano-electronics components. In nano-electronics manufacturing, the method for fabricating multiple-thickness insulator layers results in both better product reliability and the yield rate. It is potential for integral circuit manufacturing.

Abstract: A method of forming a FINFET CMOS device structure featuring an N channel device and a P channel device formed in the same SOI layer, has been developed. The method features formation of two parallel SOI fin type structures, followed by gate insulator growth on the sides of the SOI fin type structures, and definition of a conductive gate structure formed traversing the SOI fin type structures while interfacing the gate insulator layer. A doped insulator layer of a first conductivity type is formed on the exposed top surfaces of a first SOI fin type shape, while a second doped insulator layer of a second conductivity type is formed on the exposed top surfaces of the second SOI fin type shape.

Abstract: A semiconductor device including a substrate having a dopant of a first polarity, a first semiconducting structure including a dopant of a second polarity disposed over the substrate, and having substantially planar top and side surfaces. The semiconductor device includes a first junction, formed between the first semiconducting structure and the substrate, having an area wherein at least one lateral dimension is less than about 75 nanometers.

Abstract: Several methods for producing an active region for a long wavelength light emitting device are disclosed. In one embodiment, the method comprises placing a substrate in an organometallic vapor phase epitaxy (OMVPE) reactor, the substrate for supporting growth of an indium gallium arsenide nitride (InGaAsN) film, supplying to the reactor a group-III-V precursor mixture comprising arsine, dimethylhydrazine, alkyl-gallium, alkyl-indium and a carrier gas, where the arsine and the dimethylhydrazine are the group-V precursor materials and where the percentage of dimethylhydrazine substantially exceeds the percentage of arsine, and pressurizing the reactor to a pressure at which a concentration of nitrogen commensurate with light emission at a wavelength longer than 1.2 um is extracted from the dimethylhydrazine and deposited on the substrate.

Abstract: In a method of forming a quantum dot having nanometeric size and a method of forming a gate electrode including the quantum dot, a first layer including a first material is deposited on the substrate. The first material has first atoms that are superbundant and bound with the weak bonding energy in the first layer. A second layer is deposited on the first layer. The second layer comprises a second material including second atoms that are capable of migrating into the first atoms. The first atoms are migrated into the second layer and the second atoms are migrated into the first layer, so that the second atoms are arranged in the first layer. Each of the second atoms in the first layer is formed into a quantum dot. An electrode layer is formed on the first layer after partially etching the second layer, and then a gate electrode is formed by patterning the electrode layer.

Abstract: A method of forming a semiconductor device includes the following steps: providing a plurality of semiconductor layers; providing means for coupling signals to and/or from layers of the device; providing a quantum well disposed between adjacent layers of the device; and providing a layer of quantum dots disposed in one of the adjacent layers, and spaced from the quantum well, whereby carriers can tunnel in either direction between the quantum well and the quantum dots.

Abstract: The present invention relates to a method for forming a plurality of quantum dots providing simultaneously reliability and massproduction effects. The present invention includes the steps of: a method for forming a quantum dot, including the steps of: forming a first insulating layer on a semiconductor substrate; forming an opening that exposes the semiconductor substrate by etching the first insulating layer; forming a single crystal semiconductor layer in the opening and on the first insulating layer adjacent to the opening; and forming a quantum dot on the first insulating layer adjacent to the opening by removing the single crystal semiconductor layer in the opening and portions of the singly crystal layer on the first insulating layer adjacent to the opening.

Abstract: A nanowire, nanosphere, metallized nanosphere, and methods for their fabrication are outlined. The method of fabricating nanowires includes fabricating the nanowire under thermal and non-catalytic conditions. The nanowires can at least be fabricated from metals, metal oxides, metalloids, and metalloid oxides. In addition, the method of fabricating nanospheres includes fabricating nanospheres that are substantially monodisperse. Further, the nanospheres are fabricated under thermal and non-catalytic conditions. Like the nanowires, the nanospheres can at least be fabricated from metals, metal oxides, metalloids, and metalloid oxides. In addition, the nanospheres can be metallized to form metallized nanospheres that are capable as acting as a catalyst.

Abstract: The present invention relates to a method for forming a plurality of quantum dots providing simultaneously reliability and massproduction effects. The present invention includes the steps of: a method for forming a quantum dot, including the steps of: forming a first insulating layer on a semiconductor substrate; forming an opening that exposes the semiconductor substrate by etching the first insulating layer; forming a single crystal semiconductor layer in the opening and on the first insulating layer adjacent to the opening; and forming a quantum dot on the first insulating layer adjacent to the opening by removing the single crystal semiconductor layer in the opening and portions of the singly crystal layer on the first insulating layer adjacent to the opening.

Abstract: An electronic device has a plurality of electrically conductive first nanowires, a layer system applied on the first nanowires, and also second nanowires applied on the layer system. The first and second nanowires are arranged skew with respect to one another. The layer system is set up in such a way that charge carriers generated by the nanowires can be stored in the layer system.

Abstract: A method for forming first and second linear structures of a first composition that meet at right angles, there being a gap at the point at which the structures meet. The linear structures are constructed on an etchable crystalline layer having the first composition. First and second self-aligned nanowires of a second composition are grown on this layer and used as masks for etching the layer. The self-aligned nanowires are constructed from a material that has an asymmetric lattice mismatch with respect to the crystalline layer. The gap is sufficiently small to allow one of the structures to act as the gate of a transistor and the other to form the source and drain of the transistor. The gap can be filled with electrically switchable materials thereby converting the transistor to a memory cell.

Abstract: A flash memory cell. The memory cell includes a substrate, a floating gate, a control gate, and a source/drain region. The floating gate, disposed over the substrate and insulated from the substrate, has a plurality of hut structures. The control gate is disposed over the floating gate and insulated from the floating gate. The source/drain region is formed in the substrate. This invention further includes a method of fabricating a flash memory cell. First, a polysilicon layer and a germanium layer are successively formed over a substrate and insulated from the substrate. Subsequently, the substrate is annealed to form a germanium layer having a plurality of hut structures on the polysilicon layer to serve as a floating gate with the polysilicon layer. Next, a control gate is formed over the floating gate and insulated from the floating gate. Finally, a source/drain region is formed in the substrate.

Abstract: A method for the production of a semiconductor structure having self-organized quantum wires is described. The process includes the formation of multi-atomic steps on a (001) oriented semiconductor substrate inclined at an angle toward the [110] direction. Quantum wires are then spontaneously formed in situ along edges of the multi-atomic steps during epitaxial growth of a semiconductor with a larger or smaller lattice constant than the substrate but with a band gap narrower than that of the underlying material. Further deposition of a layer of semiconductor with a lattice constant within 1% of the substrate but with a band gap wider than that of the wire material then buries the quantum wires between this layer and the substrate layers. These layers are free of defects.

Abstract: A method for aligning quantum dots effectively controls a growth position of the quantum dots for obviating an irregularity of a position of spontaneous formation quantum dots, and thus aligns the quantum dots in one-dimension (1-D) or two-dimension (2-D). A semiconductor device fabricated using the method manufactures a superlattice layer layer for adjusting an internal strain distribution by alternately depositing two semiconductor materials having different lattice constant, and grows spontaneous formation quantum dots on the superlattice layer. As a result, a strained force caused by the superlattice layer influences on the quantum dots so that the quantum dots can be regularly aligned.

Abstract: Indium Nitride (InN) and Indium-rich Indium Gallium Nitride (InGaN) quantum dots embedded in single and multiple InxGa1−xN/InyGa1−yN quantum wells (QWs) are formed by using TMIn and/or Triethylindium (TEIn), Ethyldimethylindium (EDMIn) as antisurfactant during MOCVD growth, wherein the photoluminescence wavelength from these dots ranges from 480 nm to 530 nm. Controlled amounts of TMIn and/or other Indium precursors are important in triggering the formation of dislocation-free QDs, as are the subsequent flows of ammonia and TMIn. This method can be readily used for the growth of the active layers of blue and green light emitting diodes (LEDs).

Abstract: Disclosed is a method of forming a quantum dots array. In the method of the present invention, a structure of wire-like quantum dots with good quality is formed in materials having an inconsistency in the lattice constant on a tilted substrate by using the binding property of atomic bonding due to chemical bonding steps of the tilted substrate, and the spacing of the wire-like quantum dots is varied by using the step width of the tilted substrate which is transformed due to a partial pressure of a source gas and the thickness of a buffer layer. The invention allows materials having an inconsistency in the lattice constant to be freely formed in the form of quantum wires with a growing technique only and accordingly to be used as base materials in use for manufacture of novel concept of optoelectronic devices which have not been obtained so far.

Abstract: A three dimensional structure comprising at least two materials capable of being deposited by vapor deposition. The structure is fabricated by the controlled vapor deposition of the materials onto a substrate.

Abstract: A laser system includes a laser diode with a low dimensional nanostructure, such as quantum dots or quantum wires, for emitting light over a wide range of wavelengths. An external cavity is used to generate laser light at a wavelength selected by a wavelength-selective element. The system provides a compact and efficient laser tunable over a wide range of wavelengths.

Abstract: Nanostructure manufacturing methods and methods for assembling nanostructures into functional elements such as junctions, arrays and devices are provided. Systems for practicing the methods are also provided.

Abstract: Nanopores for single-electron devices may be used as templates for placing of a desired number of nanoparticles at a desired location in the devices. Nanopores may be fabricated by providing on a substrate spaced apart electrode regions, a spacer region therebetween, and a cover layer on the spaced apart electrode regions and on the spacer region. A wet etching solution is contacted to the cover-layer. At least one of the spaced apart electrode regions is energized, to selectively wet etch the cover layer adjacent the spacer region and define a nanopore in the cover layer adjacent the spacer region. At least one nanoparticle is placed in the nanopore. Accordingly, nanopores can be aligned to a buried spacer region.

Abstract: The present invention provides a quantum structure product comprising a substrate having quantum ridges and quantum tips on at least one surface thereof. In some embodiments of the invention quantum ridges may support quantum wires and the quantum tips may support quantum dots. Grooves which separate the quantum ridges and quantum tips from each other may be shallow or deep, and may contain organic molecules, fullerene tubes, and fullerene balls.

Abstract: A single-electron transistor includes a projecting feature, such as a pyramid, that projects from a face of a substrate. A first electrode is provided on the substrate face that extends onto the projecting feature. A second electrode is provided on the substrate face that extends onto the projecting feature and that is spaced apart from the first electrode. At least one nanoparticle is provided on the projecting feature between the first and second electrodes. Accordingly, the geometric configuration of the projecting feature can define the spacing between the first and second electrodes.

Abstract: The method produces coherent dislocation-free regions from initially dislocated and/or defect-rich lattice mismatched layer grown on top of the substrate having a different lattice constant, which does not contain any processing steps before of after the lattice-mismatched layer growth. The process preferably uses in situ formation of a cap layer on top of a dislocated layer. The cap layer preferably has a lattice parameter close to that in the underlying substrate, and different from that in the lattice mismatched layer in no strain state. Under these conditions, the cap layer undergoes elastic repulsion from the regions in the vicinity of the dislocations, where the lattice parameter is the most different from that in the substrate. The cap layer is absent in these regions.

Abstract: Indium Nitride (InN) and Indium-rich Indium Gallium Nitride (InGaN) quantum dots embedded in single and multiple InxGa1−xN/InyGa1−yN quantum wells (QWs) are formed by using TMIn and/or Triethylindium (TEIn), Ethyldimethylindium (EDMIn) as antisurfactant during MOCVD growth, wherein the photoluminescence wavelength from these dots ranges from 480 nm to 530 nm. Controlled amounts of TMIn and/or other Indium precursors are important in triggering the formation of dislocation-free QDs, as are the subsequent flows of ammonia and TMIn. This method can be readily used for the growth of the active layers of blue and green light emitting diodes (LEDs).

Abstract: A quantum device is constituted from a two-dimensional array of quantum dots formed from metal atom aggregates contained in a metalloprotein complex. The metalloprotein is arranged on the surface of a substrate having an insulation layer with a pitch of the size of the metalloprotein complex. The diameter of the metal atom aggregates used in the quantum device is 7 nm or smaller, and the pitch of the metalloprotein complex is preferably from 11 to 14 nm.

Abstract: The invention relates to a device comprising microstructures or nanostructures on a support, characterized in that the support comprises:

Abstract: A method of forming a semiconductor device includes the following steps: providing a plurality of semiconductor layers; providing means for coupling signals to and/or from layers of the device; providing a layer of quantum dots disposed between adjacent layers of the device; and providing an auxiliary layer disposed in one of the adjacent layers, and spaced from the layer of quantum dots, the auxiliary layer being operative to communicate carriers with the layer of quantum dots.

Abstract: Disclosed is a chemical mechanical planarizing method useful for removing silicon carbide hardmask capping materials in the presence of Low-k dielectrics contained on semiconductor wafers. The method uses zirconia-containing slurries at acidic pH levels with the abrasive having a positive zeta potential to facilitate silicon carbide removal.

Abstract: A method of forming, on a single-crystal semiconductor substrate of a first material, quantum dots of a second material, including growing by vapor phase epitaxy the second material on the first material in optimal conditions adapted to ensuring a growth at a maximum controllable rate. In an initial step, a puff of a gas containing the second material is sent on the substrate, in conditions corresponding to a deposition rate much faster than the maximum controllable rate.

Abstract: The quantum dots 18a, 18b, 26a, 26b are formed on a plurality of surfaces whose normal direction are different from each other. The quantum dots are formed on the surfaces normal to each other, whereby the polarization dependency can be eliminated as described above. Thus, the optical semiconductor device can have very low polarization dependency.

Abstract: Quantum computing systems and methods that use opposite magnetic moment states read the state of a qubit by applying current through the qubit and measuring a Hall effect voltage across the width of the current. For reading, the qubit is grounded to freeze the magnetic moment state, and the applied current is limited to pulses incapable of flipping the magnetic moment. Measurement of the Hall effect voltage can be achieved with an electrode system that is capacitively coupled to the qubit. An insulator or tunnel barrier isolates the electrode system from the qubit during quantum computing. The electrode system can include a pair of electrodes for each qubit. A readout control system uses a voltmeter or other measurement device that connects to the electrode system, a current source, and grounding circuits. For a multi-qubit system, selection logic can select which qubit or qubits are read.

Abstract: A method is provided for forming quantum holes of nanometer levels. In an ion beam scanner, ions are projected from an ion gun onto a semiconductor substrate. During the projection, ions are focused into an ion beam whose focal point is controlled to determine the diameter of the ion beam, and the ion beam is accelerated. When being incident upon the semiconductor substrate, the ion beam is deflected so as to form a plurality of quantum holes. Also provided is a semiconductor for use in a light emitting device with quantum dots. Impurities are doped onto a semiconductor substrate to form a P-type semiconductor layer on which an undoped, intrinsic semiconductor is grown to a certain thickness. A plurality of quantum holes are provided for the intrinsic semiconductor layer, followed by filling materials smaller in energy band gap than the intrinsic semiconductor in annealed quantum holes through recrystallization growth. Next, an N-type semiconductor layer is overlaid on the quantum hole layer.

Abstract: A practically realizable semiconductor magnetic body having a flat-band structure is disclosed. The semiconductor magnetic body is formed by semiconductor quantum dots arranged on lattice points such that electrons can transfer between neighboring quantum dots and the electron energy band contains a flat-band structure, where each quantum dot is a structure in which electrons are confined inside a region which is surrounded by high energy potential regions, and the flat-band structure is a band structure in which energy dispersion of electrons has hardly any wave number dependency.

Abstract: A memory device and related methods are described. The memory device includes a plurality of cells, each cell including a MOSFET having a source coupled to a first end of a channel, a drain coupled to a second end of the channel, a gate formed on a gate insulator and extending from the source to the drain and a plurality of conductive islands, each surrounded by an insulator, formed in the channel. The islands have a maximum dimension of three nanometers. The surrounding insulator has a thickness of between five and twenty nanometers. Each island and surrounding insulator is formed in a pore extending into the channel. As a result, the memory cells are able to provide consistent, externally observable changes in response to the presence or absence of a single electron on the island.

Abstract: There is provided a single electron device. The device has weak links with bottle-neck figure in place of the tunnel junction of the prior device. The weak links are easily formed on the same substrate by simple processes and thus the integration of the single electron device can be easily achieved.

Abstract: A device includes a silicon substrate provided with a coating including at least one stacking constituted by a plane of GaN or GaInN quantum dots emitting visible light at room temperature in a respective layer of AIN or GaN. The method of making the device is also disclosed. The device can be incorporated in electroluminescent devices and exchange devices, emitting white light in particular.

Abstract: A method for the production of a semiconductor structure having self-organized quantum wires is described. The process includes the formation of multi-atomic steps on a (001) oriented semiconductor substrate inclined at an angle toward the [110] direction. Quantum wires are then spontaneously formed in situ along edges of the multi-atomic steps during epitaxial growth of a semiconductor with a larger or smaller lattice constant than the substrate but with a band gap narrower than that of the underlying material. Further deposition of a layer of semiconductor with a lattice constant within 1% of the substrate but with a band gap wider than that of the wire material then buries the quantum wires between this layer and the substrate layers. These layers are free of defects.

Abstract: A quantic effect device which functions using a Coulomb blockade phenomenon. The device includes two electron reservoirs, two sets of islands that are separated by a dielectric layer, a protective insulating layer and a control electrode.

Abstract: A process for forming an aerosol of semiconductor nanoparticles includes pyrolyzing a semiconductor material-containing gas then quenching the gas being pyrolyzed to control particle size and prevent uncontrolled coagulation. The aerosol is heated to densify the particles and form crystalline nanoparticles. In an exemplary embodiment, the crystalline particles are advantageously classified by size using a differential mobility analyzer and particles having diameters outside of a pre-selected range of sizes, are removed from the aerosol. In an exemplary embodiment, the crystalline, classified and densified nanoparticles are oxidized to form a continuous oxide shell over the semiconductor core of the particles. The cores include a density which approaches the bulk density of the pure material of which the cores are composed and the majority of the particle cores are single crystalline. The oxidized particles are deposited on a substrate using thermophoretic, electrophoretic, or other deposition means.

Abstract: A quantum structure (300) having photo-catalytic properties includes a monocrystalline substrate (302) and a monocrystalline metal oxide layer (308) formed of a material comprising titanium and oxygen and epitaxially grown overlying the substrate. The quantum structure further includes self-assembled quantum dots (312) disposed on the monocrystalline metal oxide layer and formed of a material comprising copper and oxygen.

Abstract: A circuit device is disclosed comprising at least two circuit layers or circuit devices vertically interconnected with a plurality of parallel and substantially equi-length nanowires disposed therebetween. The nanowires may comprise composites, e.g., having a heterojunction present along the length thereof, to provide for a variety of device applications. Also disclosed is a method for making the circuit device comprising growing a plurality of nanowires on a dissolvable or removable substrate, equalizing the length of the nanowires (e.g., so that each one of the plurality of nanowires is substantially equal in length), transferring and bonding exposed ends of the plurality of nanowires to a first circuit layer; and removing the dissolvable substrate. The nanowires attached to the first circuit layer then can be further bonded to a second circuit layer to provide the vertically interconnected circuit device.

Abstract: A method of forming, on a single-crystal semiconductor substrate of a first material, quantum dots of a second material, including growing by vapor phase epitaxy the second material on the first material in optimal conditions adapted to ensuring a growth at a maximum controllable rate. In an initial step, a puff of a gas containing the second material is sent on the substrate, in conditions corresponding to a deposition rate much faster than the maximum controllable rate.

Abstract: A new class of fabrication methods for embedded distributed grating structures is claimed, together with optical devices which include such structures. These new methods are the only known approach to making defect-free high-dielectric contrast grating structures, which are smaller and more efficient than are conventional grating structures.

Abstract: A first p-type silicon layer (3) is formed as a buried layer in a p-type single crystal silicon substrate (2), and an n-type silicon layer (4) is formed on the upper side of the silicon substrate (2). A second p-type silicon layer (5) for forming an opening is defined in the n-type silicon layer (4), and a metal protecting film (14) is formed on the upper side of the n-type silicon layer (4). An electrode layer (18) is formed on the rear side of the silicon substrate (2) via an oxide film (17). The electrode layer (18) and the silicon substrate (2) are electrically connected to each other via a connecting opening (17a) at portions aligned with the first p-type silicon layer (3). After a positive terminal and a negative terminal of a DC power source (V) are connected to the electrode layer (18) and to a counter electrode (11) respectively, a voltage is applied between the electrode layer (18) and the counter electrode (11) to carry out anodization.

Abstract: A nanometer-size quantum thin line is formed on a semiconductor substrate of a Si substrate or the like by means of the general film forming technique, lithographic technique and etching technique. By opportunely using the conventional film forming technique, photolithographic technique and etching technique, a second oxide film that extends in the perpendicular direction is formed on an Si substrate. Then, by removing the second oxide film that extends in the perpendicular direction, a second nitride film located below the film and a first oxide film located below the film by etching, a groove for exposing the Si substrate is formed. Then, a Si thin line is made to epitaxially grow on the exposed portion of the Si substrate. The quantum thin line is thus formed without using any special fine processing technique. The width of the groove can be accurately controlled in nanometers by controlling the film thickness of the second oxide film that is formed by oxidizing the surface of the second nitride film.

Abstract: A semiconductor quantum memory element is disclosed which can share the terminals easily among a plurality of memory elements and can pass a high current and which is strong against noise. In order to accomplish this a control electrode is formed so as to cover the entirety of thin film regions connecting low-resistance regions. As a result, the element can have a small size and can store information with high density. Thus, a highly integrated, low power consumption non-volatile memory device can be realized with reduced size. A method of forming a memory element is also disclosed including performing the following steps of forming a first insulating layer, a second insulating layer, a first conductive layer and a layer of amorphous silicon. The amorphous silicon layer is crystallized to a polycrystalline silicon film. Semiconductor drains are deposited to form charge trapping and storage regions.