Insulating Lining For Interior Of Metallic Cap Or Shell Casing Patents (Class 439/706)
  • Patent number: 7591656
    Abstract: A grounding terminal block assembly for securing to an existing ground wire to provide additional connection points for electrical systems such data, cable TV, and phone lines. The grounding terminal block assembly includes an elongated grounding bar with a plurality of threaded bores extending laterally therein. Fasteners are threaded into one or more of the threaded bores to provide connection points for ground wires from one or more electrical systems. A channel on one end of the grounding bar includes a slotted headless set screw for establishing a secure connection to an existing ground wire. Legs are provided integral with the grounding bar for providing direct connection to a wall or other structure. A detachable insulating cover is secured to the grounding bar to shield the grounding body and all wiring connections.
    Type: Grant
    Filed: October 24, 2008
    Date of Patent: September 22, 2009
    Assignee: Arlington Industries, Inc.
    Inventor: Thomas J. Gretz
  • Patent number: 7309657
    Abstract: Provided is a method for manufacturing a circuit board including an electrode wiring formed above a surface portion of a substrate, and a plurality of electrothermal converting elements which have a heating resistor film for generating thermal energy formed above the electrode wiring. The method includes: forming an electrode wiring layer for forming the electrode wiring, forming the heating resistor film; and collectively etching the electrode wiring layer and the heating resistor film to thereby form the electrode wiring. With the method according to the present invention, the circuit board can be manufactured with a higher density, higher endurance, and lower power consumption recording head to provide high resolution images.
    Type: Grant
    Filed: August 31, 2004
    Date of Patent: December 18, 2007
    Assignee: Canon Kabushiki Kaisha
    Inventors: Masato Kamiichi, Keiichi Sasaki
  • Patent number: 6811448
    Abstract: A fabrication system utilizes a protocol for removing native oxide from a top surface of a wafer. An exposure to a plasma, such as a plasma containing hydrogen and argon can remove the native oxide from the top surface without causing excessive germanium contamination. The protocol can use a hydrogen fluoride dip. The hydrogen fluoride dip can be used before the plasma is used. The protocol allows better silicidation in SMOS devices.
    Type: Grant
    Filed: July 15, 2003
    Date of Patent: November 2, 2004
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Eric N. Paton, Paul R. Besser, Qi Xiang
  • Patent number: 5685745
    Abstract: There is disclosed a connector in which provide even a small-size terminal can be retained with a large retaining force, and the retaining of the terminal can be released without the use of a release tool. In the connector, a terminal is inserted into each of receiving chambers, formed in a housing, from a rear side of the receiving chamber, and is retained in the receiving chamber. A pair of opposed retaining portions are formed in the receiving chamber, and have respective slanting surfaces converging in a direction of insertion of the terminal. The terminal has a pair of opposed retaining plates which slide respectively over the slanting surfaces to be resiliently deformed in a direction perpendicular to the direction of insertion of the terminal when the terminal is inserted. The pair of retaining plates, when passed past the slanting surfaces, are resiliently restored to be retainingly engaged respectively with the pair of retaining portions.
    Type: Grant
    Filed: April 23, 1996
    Date of Patent: November 11, 1997
    Assignee: Yazaki Corporation
    Inventors: Hiroshi Yamamoto, Yuji Hatagishi