Abstract: A measurement instrument for measuring electrical characteristics of a device under test (DUT) includes a synchronization signal generator configured to generate a synchronization signal transmittable from the measurement instrument to a receiver. The synchronization generator comprises a phase-locked loop (PLL) that locks the phase of the LO signal to the synchronization signal. The A/D clock signal is generated from the synchronization signal.

Abstract: A measurement instrument for measuring electrical characteristics of a device under test (DUT) includes a synchronization signal generator, a coarse phase detection counter and a fine phase detection counter. The synchronization signal generator is connectable with a receiver via a fiber optic cable and a duplexer configured to transmit a synchronization signal from the measurement instrument to the receiver and retransmit the received synchronization signal from the receiver to the measurement instrument. The coarse phase detection counter and the fine phase detection counter are configured to determine one or both of a distance from the receiver to the measurement instrument and a phase shift in the synchronization signal between the receiver and the measurement instrument.

Abstract: A measurement instrument for measuring electrical characteristics of a device under test (DUT) includes a synchronization signal generator for generating a synchronization signal transmittable to a receiver, a voltage controlled phase shifter (VCPS) connected with the synchronization signal generator and a phase-to-voltage converter configured to drive the VCPS. The synchronization signal is transmitted via a duplexer configured to transmit the synchronization signal from the measurement instrument to the receiver via a fiber optic cable and retransmit the received synchronization signal from the receiver to the measurement instrument via the fiber optic cable. The phase-to-voltage converter receives as inputs the synchronization signal input to the VCPS, the synchronization signal output from the VCPS and the retransmitted synchronization signal received at the measurement instrument from the receiver. An output of the phase-to-voltage converter is provided as input to the VCPS.

Abstract: An integrated multi-user satellite receiver includes: a single-chip, and the single-chip includes: a first synthesizer for generating a first oscillating signal having a first frequency; a first frequency multiplier for generating a second oscillating signal having a second frequency according to the first oscillating signal; a second synthesizer for generating a third oscillating signal having a third frequency; and a second frequency multiplier for generating a fourth oscillating signal having a fourth frequency according to the third oscillating signal; wherein the single-chip generates a first down-converted signal according to a first satellite signal and the second oscillating signal, generates a second down-converted signal according to the first satellite signal and the fourth oscillating signal, generates a third down-converted signal according to a second satellite signal and the second oscillating signal, and generates a fourth down-converted signal according to the second satellite signal and the

Abstract: A configurable passive mixer is described herein. According to one exemplary embodiment, the passive mixer comprises a clock generator, a controller, and a plurality of passive mixer cores connected in parallel. The clock generator comprises a local oscillator drive unit for each passive mixer core. The controller varies an effective transistor size of the passive mixer by separately configuring each of the passive mixer cores to enable/disable each passive mixer core. For example, the controller may selectively enable one or more of the passive mixer cores to vary the effective transistor width of the passive mixer. As the performance requirements and/or the operating communication standard change, the controller may re-configure each passive mixer core.

Abstract: A multi-band amplifier may operate in a first frequency band and a second frequency band. The multi-band amplifier may include a first amplifier, a second amplifier, and a coupler. The coupler may couple a signal, such as a communication signal, to a selected amplifier. In some embodiments, the coupler may include one or more inductive elements to couple the signal to the first or the second amplifier. In some embodiments, the inductive elements may include a balun.

Abstract: A loudspeaker array and methods for generating sound in an arc pattern. The loudspeaker array includes a plurality of loudspeakers. A delay network is included, the delay network having a plurality of stages. Each stage has a stage input and a stage output. The stage output of each stage is coupled to the stage input of a next stage. Each stage output is also connected to at least one of the plurality of loudspeakers. The stage input of the first stage is coupled to an audio signal input. Each stage is configured to add an electrical delay of the audio signal at each subsequent stage. The electrical delay is adjusted such that the plurality of loudspeakers generates sound in a desired radiation pattern.

Abstract: Apparatus and methods concern down-converting a radio frequency (RF) signal. As an example, one apparatus includes a first mixer and a second mixer. The first mixer down-converts an RF signal to produce a first intermediate frequency (IF) signal. The second mixer down-converts the first IF signal to produce a second IF signal having a plurality of phase components. The down-converter also includes a plurality of summing circuits. Each of the summing circuits is configured to combine various ones of the phase components of the second IF signal to produce a respective phase component of a third IF signal. The number of phase components in the third IF signal is different from the number of phase components in the second IF signal.

Abstract: The present invention relates to a method and device for distributing idle UE by a carrier in eNB of a multi-carrier based mobile communication system. The method of distributing idle UE in a multi-carrier based mobile communication system according to the present invention includes a process of determining a search rate by a carrier on the basis of information representing load on the carrier, a step of determining a cell reselection priority on the idle UE on the basis of the determined search rate, and a process of transmitting the determined cell reselection priority to the idle UE.

Abstract: A system and method for assigning received channels to preset tuning keys of a receiver. A series of preset keys are sequentially labeled and one preset key, such as the preset key marked “0,” is a pre-defined preset key. An elongated pressing of the pre-defined key causes the currently tuned channel, if it is not assigned to a preset key, to be assigned to an unassigned preset key. If the currently tuned channel is already assigned to a preset key, pressing the pre-defined key instead causes the currently selected channel to be un-assigned from that preset key. Radios with two tuners that each process different sets of radio signals assign channels for a particular tuner to alternating preset keys, allowing acceleration of sequentially selecting channels assigned to pre-set keys by pre-tuning another tuner to the next channel in the sequence.

Abstract: Interpolator and decimator apparatuses and methods are improved by the addition of an elastic storage element in the signal path. In one exemplary embodiment, the elastic element comprises a FIFO which advantageously allows short term variation in sample clocks to be absorbed, and also provides a feedback mechanism for controlling a delta-sigma modulated modulo-N counter based sample clock generator. The elastic element combined with a delta-sigma modulator and counter creates a noise-shaped frequency lock loop without additional components, resulting in a much simplified interpolator and decimator.

Abstract: A receiver is set forth that includes a tuner circuit and a converter circuit. The tuner circuit provides an analog signal corresponding to a modulated signal that is received on a selected channel. The converter circuit includes a sample clock that is used to convert the analog signal to a digital signal at a conversion rate corresponding to the frequency of the sample clock. The sample clock is selectable between at least two different clock frequencies.

Abstract: A portable wideband harmonic signal generator includes circuitry for generating a signal having a selected fundamental frequency, for producing a signal having a harmonic series of the selected fundamental frequency, for transferring the signal having the harmonic series using a balanced impedance output, and for directionally transmitting transferred signal having the harmonic series using a directional antenna having a characteristic impedance that is matched to the balanced impedance output. There is thus provided a compact, efficient transmitter and antenna assembly for transmitting a wideband signal.

Abstract: An electronic device capable of performing automatic frequency control (AFC) to maintain frequency and timing without good received bursts, in which an oscillation unit and a baseband processing unit are provided. Wherein, the baseband processing unit computes a compensation adjustment according to a prediction model and stored information regarding a previous digital value adjustment when detecting that the baseband processing unit is incapable of controlling the oscillation unit according to received bursts from the remote communication unit, and adjusts the oscillation unit according to the determined compensation adjustment.

Abstract: An apparatus and method for operating a frequency synthesizer wherein a value of an first control signal associated with a fine frequency feedback loop connected to a signal generator is monitored, and a second control signal associated with a medium or coarse frequency feedback loop connected to the signal generator is adjusted based on the monitoring. The first and second control signals are then output to control the frequency synthesizer.

Abstract: An embodiment of the invention provides a method of processing a radio frequency (RF) signal. According to the embodiment, the RF signal is first synthesized with a synthesis signal to generate a synthesized signal. Then, the synthesized signal is filtered with a filtering bandwidth to generate a filtered signal. Next, the filtered signal is converted into digital data. Then, the digital data is processed to analyze a plurality of carriers within the filtering bandwidth as presented in the RF signal.

Abstract: Mechanically tuned radios and related methods are disclosed that utilize ratiometric time measurements to detect settings for mechanical adjustment mechanisms. The radio systems and methods disclosed make a first time measurement associated with a mechanically adjusted circuit, make a second time measurement associated with the mechanically adjusted circuit, determine a setting for the mechanical adjustment mechanism based upon a ratio associated with the first and second time measurements, and utilize the setting to select a tuning frequency for signals received by the radio. More generally, ratiometric time measurements can be used to determine a setting for a mechanical adjustment mechanism for a mechanically adjusted circuit, and this setting can be used to at least part control a desired operational feature of a device.

Abstract: An in-vehicle wireless system, capable of operating at least in a copy mode and a transmission mode, comprises: at least one receiving unit receiving a wireless signal transmitted from a remote control transmitter and demodulates a control code signal; and at least one transmitting unit transmitting wireless signals at a plurality of carrier frequencies; and a control unit controlling so as to obtain a control code from the control code signal and store it in the copy mode, and so as to perform transmitting the modulated wireless signals at all carrier frequencies unique to a plurality of the garage door opening-closing mechanisms or the like. The receiving unit may include a detection circuit connected to a reception antenna directly.

Abstract: A mobile station including a processor and a memory storing program instructions. The instructions, when executed by the processor, cause the processor to determine if any candidate control channels of a list of candidate control channels are ineligible for selection by belonging to a private network to which the mobile station is not permitted access, analyze those candidate control channels not determined to be ineligible for selection to identify a primary candidate control channel, and attempt to select the primary candidate control channel.

Abstract: A radio-frequency (RF) apparatus, which may reside in a receiver or transceiver, includes receive-path circuitry. The receive-path circuitry includes a poly-phase filter and a harmonic filter. The poly-phase filter accepts an input signal and generates two output signals. One output signal of the poly-phase filter constitutes an in-phase (I) signal. The other output signal of the poly-phase filter constitutes a quadrature (Q) signal. The a harmonic filter couples to the poly-phase filter. The harmonic filter accepts as input signals the in-phase and quadrature output signals of the poly-phase filter.

Abstract: Disclosed is a radio frequency (RF) receiver for receiving a communication channel modulated on one or more carrier frequencies. The receiver may include a gain adjustable RF amplifier, a wideband signal power measurement circuit, and control logic. The control logic may be adapted to use outputs of one or more measurement circuits to classify interfering signals based on measured signal power and spectral proximity to the one or more channel carrier frequencies, and to adjust the gain of the radio frequency amplifier based on the classification.

Abstract: A first programmable frequency oscillator, which includes a first ramp comparator and programmable signal generation circuitry is disclosed. The programmable signal generation circuitry provides a ramping signal, which has a first frequency, based on a desired first frequency. The first ramp comparator receives the ramping signal and provides a first ramp comparator output signal based on the ramping signal. The first ramp comparator output signal is fed back to the programmable signal generation circuitry, such that the ramping signal is based on the desired first frequency and the first ramp comparator output signal. However, the first ramp comparator has a first propagation delay, which introduces a frequency error into the programmable frequency oscillator. Therefore, the first frequency is not proportional to one or more slopes of the ramping signal. As a result, the programmable signal generation circuitry compensates for the frequency error based on the desired first frequency.

Abstract: According to one embodiment, a register outputs a first control code in first and second operation modes, saves the first control code as a third control code at an end of the first operation mode, and outputs the third control code at a beginning of a third operation mode. In the first operation mode, a digital-to-analog converter supplies a control signal with a control voltage to a voltage controlled oscillator. In the second operation mode, the control signal is supplied to a buffer amplifier, the amplifier drives a bandlimiting filter, and the filter generates the control voltage. In the third operation mode, the control signal is supplied to the filter, and the filter generates the control voltage.

Abstract: A receiver is set forth that includes a tuner circuit and a converter circuit. The tuner circuit provides an analog signal corresponding to a modulated signal that is received on a selected channel. The converter circuit includes a sample clock that is used to convert the analog signal to a digital signal at a conversion rate corresponding to the frequency of the sample clock. The sample clock is selectable between at least two different clock frequencies.

Abstract: A system includes a weighting module, a mixer module, and a frequency selective impedance (FSI). The weighting module is configured to receive an input signal having an amplitude and to generate weighted outputs. Amplitudes of the weighted outputs have ratios relative to the amplitude of the input signal. The mixer module has switches configured to receive the weighted outputs and to generate a staircase waveform when the switches are clocked by clock signals. Amplitudes of steps of the staircase waveform are based on the ratios. The FSI is configured to communicate with the switches. The switches are configured to translate an impedance of the FSI centered on a first frequency to a second frequency determined by a frequency of the clock signals.

Abstract: Aspects of a method and system for transmission or reception of signals utilizing a DDFS clocked are provided. A first oscillator signal utilized for transmission and/or reception of signals of a first wireless communication protocol may be generated, and a direct digital frequency synthesizer (DDFS) may be clocked by the first oscillator signal to generate one or more second oscillator signals. The one or more second oscillator signals may be modulated to generate a signal adhering to a second wireless communication protocol. The one or more second oscillator signals may be utilized to demodulate signals of the second wireless communication protocol. A control word input to the DDFS may control a frequency of the one or more second oscillator signals generated by the DDFS. Simultaneous transmission and reception of signals of the second wireless communication protocol may be simulated by switching the control word input to the DDFS between two values.

Abstract: A clock signal generating arrangement for a communication device generates a system clock signal at an output for use as a timing reference. The clock signal generating arrangement comprises a reference clock generator for generating a reference clock signal, a main clock generator for generating a main clock signal having a greater accuracy than the reference clock signal, a clock adjust circuit coupled to the reference clock generator for generating a compensated reference clock signal to compensate for error in the reference clock signal and a clock signal selector coupled to the reference clock generator the main clock generator and the clock adjust circuit.

Abstract: A management unit allocates network resources multiservice communication devices capable of communicating via a plurality of networks. The management unit includes a communication device interface for facilitating a bidirectional data communication with the multiservice communication devices via a wireless control channel, the bidirectional data communication including outbound control data sent to multiservice communication devices and inbound control data received from at multiservice communication devices. The wireless control channel is separate from the communication between multiservice communication devices and the networks. A network interface receives network resource data from the networks. A management processing unit generates the outbound control data in response. The management processing unit facilities the handoff of a real-time service accessed by the multiservice communication devices via a first network to a second network.

Abstract: Methods and apparatus for reducing transmit emissions are described herein. The transmit out of band emissions in an adjacent band can be reduced while complying with existing wireless communication standards through utilization of one or more of reduced transmit bandwidth, transmit operating band offset, and channel index remapping. The transceiver can support a receive operating band that is substantially adjacent to a band edge. The transmit operating band can be offset from an adjacent frequency band, and can use a narrower operating band than is supported by the receiver. The transmit baseband signal can have a reduced bandwidth to reduce the amount of noise. The frequency offset can introduce a larger transition band between the transmit operating band edges and the adjacent frequency band of interest. The transceiver can remap channel assignments to compensate for the frequency offset such that the frequency offset introduced in the transmitter is transparent to channel allocation.

Abstract: A communications system includes a radio frequency (RF) element (104) for transforming an input RF signal into at least one of a first conditioned RF input signal associated with a first frequency range and a second conditioned RF input signal associated with a second frequency range higher than the first frequency range. The system also includes a local oscillator (LO) circuit (106) for generating at least a first LO signal, the LO circuit having an operating frequency range spanning at least a portion of a first inclusive frequency range defined by a lowest frequency of the first frequency range and a highest frequency of the second frequency range. The system further includes a mixer (108) for generating a first intermediate frequency (IF) signal based on one of the first and the second RF input signals and the first LO signal, and an IF element (110) for conditioning the first IF signal.

Abstract: The present invention provides architectures and methods which use multiple radio receive chains in mobile devices to boost performance of the mobile devices. While a first set of the receive chains are assigned to a serving base station, another set of receive chains are dynamically allocated to neighbor base stations and/or to the serving base station depending upon present or expected system conditions and timing. A first synthesizer is configured to provide signals to the first and second set of receive chains. Other synthesizers are also configured to provide signals to the second set of receive chains. Thus, depending on the mode of operation, the second set of receive chains utilizes signals from a given synthesizer as needed. A priori data may be used to allocate specific receive chains to the serving base station, neighboring base stations or both. Unused synthesizers may be turned off to conserve power.

Abstract: A rapidly adjustable local oscillation (LO) module for use in a radio transmitter or a radio receiver includes an oscillation generating module and a high frequency switching module. The oscillation generating module is operably coupled to generate a plurality of local oscillations. The high frequency switching module is operably coupled to, for a first one of a plurality of transmission paths, provide one of the plurality of local oscillations when a first transmission path selection indication is in a first state and provide another one of the plurality of local oscillations when the first transmission path selection indication is in a second state and, for a second one of the plurality of transmission paths, provide the one of the plurality of local oscillations when a second transmission path selection indication is in a first state and provide the another one of the plurality of local oscillations when the second transmission path selection indication is in a second state.

Abstract: A management unit allocates network resources to a plurality of multiservice communication devices capable of communicating via a plurality of networks. The management unit includes a communication device interface for facilitating a bidirectional data communication with the plurality of multiservice communication devices via a wireless control channel, the bidirectional data communication including outbound control data sent to at least one of the plurality of multiservice communication devices and inbound control data received from at least one of the plurality of multiservice communication devices, wherein the wireless control channel is separate from the communication between the plurality of multiservice communication devices and the plurality of networks. A network interface receives network resource data from the plurality of networks.

Abstract: A service aggregator allocates network resources to a plurality of multiservice communication devices capable of communicating via a plurality of networks. The service aggregator includes a communication device interface for facilitating a bidirectional data communication with the plurality of multiservice communication devices via a wireless control channel, the bidirectional data communication including outbound control data sent to at least one of the plurality of multiservice communication devices and inbound control data received from at least one of the plurality of multiservice communication devices, wherein the wireless control channel is separate from the communication between the plurality of multiservice communication devices and the plurality of networks. A network interface receives network resource data from the plurality of networks.

Abstract: The present invention relates to a quadrature divider which may be used in a phase locked loop or frequency synthesizer or with a single side band mixer. According to a preferred embodiment the divider takes a quadrature input and has a quadrature output. The divider has four analog mixers 1, 2, 3 and 4. The first two mixers 1, 2 take the in-phase quadrature input, while the second mixers 3, 4 take the quadrature-phase quadrature input. The outputs and feedback loops of the mixers are properly arranged such that the in-phase and quadrature-phase outputs of the divider have a determinisitic phase sequence relationship based on the phase sequence relationship of the corresponding quadrature inputs. Third order harmonics may be minimized or reduced by addition or subtraction of the mixer outputs. As the divider is able to take a quadrature input, there is no need for a dummy divider in the phase locked loop, thus saving space and power.

Abstract: A receiving apparatus includes: a demodulating unit which demodulates an IF signal obtained by subjecting a received RF signal to frequency conversion; a detecting unit which detects a carrier wave frequency error contained in the IF signal; a frequency control unit which sets an initial value of a frequency in the demodulation process by the demodulating unit and for correcting a frequency error of a frequency used for the demodulation process by the demodulating unit based on the carrier wave frequency error detected by the detecting unit; and a control unit which controls a setting of an initial value of a frequency in the demodulation process by the demodulating unit by means of the frequency control unit after a receiving channel is switched, based on the carrier wave frequency error before a receiving channel is switched, the error being detected by the detecting unit, when a receiving channel is switched.

Abstract: Frequency conversion methods and systems for Bluetooth and FM radio communication are provided. FM data may be received and/or transmitted via the FM radio and Bluetooth data may be received and/or transmitted via the Bluetooth radio. With an integration of frequency conversion for Bluetooth and FM, both systems can operate from a single frequency source, thereby reducing part count and power consumption. Communication between Bluetooth and FM channels may be enabled via a single chip.

Abstract: In a wireless device, a method and system for a baseband receiver interface including analog and digital components are provided. An analog or a digital interface may be selected for a I/Q data signal received from a front-end receiver. The analog interface may be a conventional RF or a VLIF interface. The I/Q data signal may be digitized when received from the analog interface and saturation detection may be used during digitization of the I/Q data signal. When the analog interface is the VLIF interface, a derotator may be used to remove the VLIF frequency. The derotator may be based on a CORDIC algorithm. The I/Q data signal may be converted from serial to parallel format when received from the digital interface. The received I/Q data signal may be decimated before transferred to a baseband processor.

Abstract: One embodiment includes a system configured to identify a preferred channel for radio communication from a plurality of consecutive integer frequencies including preferred channels and non-preferred channels, the system further to generate a plurality of radio channels corresponding to a plurality of consecutive integer frequencies based on a generation of reference frequencies, identifies preferred channels and non-preferred channels from the plurality of radio channels, where frequency synthesizer settling times of the preferred channels are faster than frequency synthesizer settling times of the non-preferred channels, scan the preferred channels for radio activity, select one of preferred channels responsive to the scanned radio activity; and utilize one of the reference frequencies to generate a radio frequency corresponding to the selected one of the preferred channels.

Abstract: Methods and systems for recovering a DC component in a zero-IF radio receiver are disclosed that involve receiving a frequency modulated radio frequency broadcast signal, down-converting the frequency modulated radio frequency broadcast signal directly to an original baseband frequency signal, wherein the original baseband frequency signal includes an original DC component, filtering the original baseband signal to obtain a filtered baseband signal, wherein the original DC component is removed, analyzing modulus values of the filtered baseband signal to determine an estimated quantity for the original DC component, and adding the estimated quantity for the original DC component to the filtered baseband signal to compensate for removal of the original DC component such that a reconstructed baseband signal is obtained.

Abstract: A circuit receives a first signal (for example, a baseband signal) and mixes it with a local oscillator (LO) signal, and outputs a second signal (for example, an RFOUT signal). The circuit includes multiple identical Mixer and Frequency Divider Pair (MFDP) circuits. Each MFDP can be enabled separately. Each MFDP includes a mixer and a frequency divider that provides the mixer with a local version of the LO signal. The MFDP outputs are coupled together so that the output power of the second signal (RFOUT) is the combined output powers of the various MFDPs. By controlling the number of enabled MFDPs, the output power of the second signal is controlled. Because the MFDPs all have identical layouts, accuracy of output power step size is improved. Because LO signal power within the circuit automatically changes in proportion to the number of enabled MFDPs, local oscillator leakage problems are avoided.

Abstract: A frequency synthesizer includes: a frequency source generating a reference signal that includes a plurality of pulses having periodicity based on a reference frequency; a feedback loop that includes, a phase detector circuit, a loop filter, a controlled oscillator that generates an output signal at an output, and a loop divide circuit; a non-linear circuit element at an input of the phase detector circuit, which generates intermodulation distortion that causes at least one spurious signal at the output; and a controller controlling the loop divide circuit and the non-linear circuit element. The frequency synthesizer further includes a dither circuit that adjusts the timing of some of the pulses of the reference signal based on a parameter provided by the controller to the non-linear circuit element, thereby, providing a jittered reference signal to the non-linear circuit element for attenuating the at least one spurious signal at the output.

Abstract: A phase detector includes a plurality of phase detectors located in a phase correction loop, each phase detector configured to receive as input a radio frequency (RF) input signal and an RF reference signal, each of the plurality of phase detectors also configured to provide a signal representing a different phase offset based on the phase difference between the RE input signal and the RF reference signal; and a switch configured to receive an output of each of the plurality of phase detectors and configured to select the output representing the phase offset, that is closest to a phase of an output of an amplifier.

Abstract: Methods and systems for a local oscillator generator based on quadrature mixing using a phase shifter. Aspects of one method may include generating a local oscillator signal, where a frequency of the local oscillator signal may be determined by controlling a phase of in-phase (I) components and quadrature phase (Q) components of a first signal and a second signal. For example, by appropriately controlling a phase of each component that is to be mixed, the local oscillator signal may have a frequency that is the sum of a frequency of the first signal and a frequency of the second signal, or a difference of the frequency of the first signal and the frequency of the second signal.

Abstract: A wireless communication system includes: a base station; a first wireless communication terminal that receives a first signal from the base station; and a second wireless communication terminal that receives a second signal from the base station. The first signal is to be used by the second wireless communication terminal. The first wireless communication terminal includes: a transmitting unit that transmits the first signal to the second wireless communication terminal. The second wireless communication terminal includes: a receiving unit that receives the first signal from the first wireless communication terminal; and a signal synthesizing unit that receives the first signal from the receiving unit and performs at least one synthesis based on the first signal and the second signal.

Abstract: A method and an apparatus for frequency synthesizing are provided for a wireless communication system. In a frequency synthesizer, a phase lock loop (PLL) circuit generates a first elemental frequency based on a reference frequency and a unity frequency. A first division module then divides the first elemental frequency to generate a second elemental frequency. A second division module divides the second elemental frequency a multiple of times to generate the unity frequency and a plurality of intermediate frequencies each having an exponential ratio to the unity frequency by a power of two. A second mixer is provided to mix one of the intermediate frequencies with the unity frequency to generate a step frequency, and a first mixer mixes the step frequency with one of the first and second elemental frequencies to generate an output frequency having a variety covering all frequency bands in an Ultra-Wide-Band (UWB) spectrum.

Abstract: A multi-mode PLL frequency synthesizer of a wireless multi-mode transceiver is provided which includes a reference frequency source providing an oscillator signal with a constant reference frequency, a first frequency synthesizer subunit for converting the signal into carrier signals with frequencies in the range of a first frequency band, a second frequency synthesizer subunit for transforming the oscillator signal into carrier signals having frequencies in the range of a second frequency band, and a third frequency synthesizer subunit for converting the oscillator signal into an auxiliary signal with a fixed frequency. The auxiliary signal is used together with the carrier signals of the second frequency band to generate carrier signals with frequencies in the range of a third and fourth frequency band.

Abstract: A frequency synthesizer for use in a transmitter operates to receive outbound transmit data and to modulate the outbound transmit data to produce a modulated RF signal. The modulated RF signal can then be amplified to produce an outbound RF signal.

Abstract: There is disclosed a frequency synthesizer having an HF synthesizer for generating a first reference frequency signal having a variable frequency in a high-frequency band as a unit synthesizer, an LF synthesizer for generating a second reference frequency signal in a low-frequency band as another unit synthesizer, and an arithmetic circuit including a mixer for receiving the first and second reference frequency signals, a divider for receiving the second reference frequency signal, a mixer for receiving the first reference frequency signal and an output signal from the divider, a divider for receiving an output signal from the mixer, a divider for receiving an output signal from the mixer and capable of switching a division ratio, and a switch for switching and outputting output signals from the dividers, wherein an output signal of the switch is outputted as a first local signal, and an output signal from the divider is outputted as a second local signal.

Abstract: The present invention reduces adjacent channel interference for a wireless peripheral device. A direct digital synthesizer generates a waveform having intermediate angular changes during a transition time between symbol intervals. After the transition time, the direct digital synthesizer generates the waveform with an angular value that corresponds to the symbol being transmitted. In an exemplary embodiment, a generated waveform is characterized by one of two designated frequencies in response to a value of an input information bit. The waveform is further characterized by at least one intermediate frequency during a transition time between a change of the designated frequency. Another embodiment of the invention utilizes phase changes rather than frequency changes during reduce adjacent channel interference. With another aspect of the invention, methods are provided to determine waveform parameters for reducing adjacent channel power (ACP) to a maximum level of interference.