Abstract: A radar system includes a first chip having a first radio frequency (RF) contact; a second chip having a second RF contact; a first RF oscillator integrated in the first chip and has an output coupled to the first RF contact; a second RF oscillator integrated in the second chip; a transmission line connecting the first RF contact to the second RF contact; a demodulator that is arranged in the second chip and has a first RF input; wherein the first RF oscillator is configured to generate a first RF oscillator signal that is transmitted to the first RF input of the demodulator via the first RF contact, the transmission line, and the second RF contact, and wherein a controller is configured to determine a first propagation delay of the first RF oscillator signal arriving at the second chip on a basis of information obtained from the demodulator.

Abstract: An electronic device may include wireless circuitry with a baseband processor, a transceiver, a front-end module, and an antenna. The transceiver may include mixer circuitry. The mixer circuitry may include switches controlled by oscillator signals. The mixer circuitry may also include oscillator phase noise cancelling capacitors controlled by inverted oscillator signals. Operated in this way, the mixer circuitry exhibits improved noise figure performance.

Abstract: A circuit comprising a differential transmission line and eight switches provides non-reciprocal signal flow. In some embodiments, the circuit can be driven by four local oscillator signals. The circuit can be used to form a gyrator. The circuit can be used to form a circulator. The circuit can be used to form three-port circulator than can provide direction signal flow between a transmitter and an antenna and from the antenna to a receiver. The three-port circulator can be used to implement a full duplex transceiver that uses a single antenna for transmitting and receiving.

Abstract: A radio module, comprises a battery; and a radio circuit, the radio circuit comprising: a DC-to-DC converter coupled with the batters and configured to convert a battery voltage to a first DC voltage level; at least one regulator coupled with the DC-to-DC converter and configured to covert the first DC voltage level to a second DC voltage level; at least one circuit block coupled with the at least one regulator such that the second DC voltage level is configured to provide power to the at least one circuit block; a real time clock configured to provide a clock signal to the at least one circuit block; and a management unit coupled with the at least one circuit block and configured to implement a state machine to control the at least one circuit block, wherein the state machine causes the management unit to cause the second DC voltage level to be removed from the at least one circuit during a first state comprising the state machine and, during a second state comprising the state machine, cause the second DC v

Abstract: A radar method is described. According to one exemplary embodiment, the method includes generating a first RF oscillator signal in a first chip and supplying the first RF oscillator signal to a transmission (TX) channel of the first chip and transmitting the first RF oscillator signal from the TX channel of the first chip to the second chip via a transmission line.

Abstract: Various embodiments provide for a circuit for measuring a frequency difference, a phase difference, or both of at least two clock signals (e.g., a reference clock signal and a feedback clock signal). In particular, various embodiments described herein may be used in a circuit design to convert an input phase of two clock signals to a frequency difference, which may be outputted in the form of a digital word. Additionally, various embodiments described herein may be used in a circuit design to convert an input phase of two clock signals as phase difference output, which may be outputted in the form of a digital word. Various embodiments can provide the frequency difference, the phase difference, or both in near real-time and with only a small amount of latency.

Abstract: A digital phase locked loop includes a digital phase detector, a digital loop filter, a digital controlled oscillator, a first divider that divides the second frequency of the oscillation signal depending on a first division value and outputs the division result as a division signal having a third frequency, a second divider that divides the second frequency of the oscillation signal depending on a second division value and outputs the division result as an output signal having a final frequency, a dithering block that receives the division signal and performs dithering on the first division value based on a preset pattern as cycles of the division signal pass, and a digital phase domain filter that performs second low pass filtering on the division signal in a phase domain and outputs the result of the second low pass filtering as the feedback signal.

Abstract: Method and transceiver arrangements for reducing a leakage signal's impact on a receiver part 320 of the transceiver arrangement 300. The leakage signal originates from a transmitter part 310 of the transceiver arrangement 300. The radio base station is adapted to communicate in a Time Division Duplex, TDD mode in a cellular network. The method comprises frequency shifting 402, by the transmitter part 310, a downlink, DL, baseband by an offset frequency, fc, the DL baseband comprising DL data. Furthermore, the method comprises to mixing 404, by the transmitter part (310), the frequency shifted DL baseband with a Transmitter Local Oscillator, TX LO, frequency, fLO to produce a DL signal spectrum.

Abstract: An electromagnetic (EM) signal booster, in some embodiments, comprises a bandpass filter comprising a high pass filter and a low pass filter coupled to the high pass filter, and further comprising a low cutoff frequency and a high cutoff frequency, both cutoff frequencies being adjustable; a first amplifier coupled to the high pass filter; and a second amplifier coupled to the first amplifier, wherein the high cutoff frequency is adjusted to within a first threshold value above a minimum high cutoff frequency and the low cutoff frequency is adjusted to within a second threshold value below a maximum low cutoff frequency.

Abstract: RF circuitry, which includes a first passive voltage-gain network and a first MOS-based RF receive amplifier, is disclosed. The first passive voltage-gain network provides a first passive RF receive signal using a first RF receive signal, such that an energy of the first passive RF receive signal is obtained entirely from the first RF receive signal by the first passive voltage-gain network. A voltage of the first passive RF receive signal is greater than a voltage of the first RF receive signal. The first MOS-based RF receive amplifier receives and amplifies the first passive RF receive signal to provide a first amplified RF receive signal.

Abstract: In an example, a method includes: in a first mode, causing a first tuner of an entertainment system to receive and process a first RF signal from a first antenna configured for a first band to output a first audio signal of a first radio station and causing a second tuner of the entertainment system to receive a second RF signal from a second antenna configured for the first band to determine signal quality metrics for one or more radio stations of the first band; in a second mode, causing the first tuner to output a first signal representation of the first RF signal and causing the second tuner to receive and process the second RF signal to output a second signal representation of the second RF signal; and causing a phase diversity combining circuit to process the first and second signal representations to output an audio signal of the first radio station, without disruption of output from the entertainment system of a broadcast of the first radio station.

Abstract: Circuits for field-programmable receiver front ends are provided. These front ends can include a field programmable common source low noise transconductance amplifier (LNTA), a field programmable common gate LNTA, first and second four-phase I/Q mixers, first, second, third, and fourth transimpedance amplifiers, an I-path complex combiner, and a Q-path complex combiner. Transconductance cells in each of the field programmable common source LNTA and field programmable common gate LNTA can be programmed to operate in one of a class-AB mode, a class-C mode, and an OFF mode.

Abstract: A user equipment (UE), receiver and method are generally described herein. The UE may include a mixer, a local oscillator (LO) and an analog-to-digital converter (ADC). The mixer may downconvert a differential radio frequency (RF) signal using LO signals and provide downconverted signals to the ADC. The mixer may provide decoupled lowpass filtering. The lowpass filter capacitors may retain charge when discharging is completed. For each differential signal, the mixer may have an input pullup resistor, first switches receiving the signal and driven by different LO signals, second switches receiving signals from the first switches such that connected pairs of switches may have driven by different LO signals, an ADC input resistor, charging capacitors each connected between first switches driven by the same LO signal, and grounding capacitors each connected to second switches associated with different RF signal outputs and driven by different LO signals.

Abstract: A test and measurement instrument including a splitter configured to split an input signal having a particular bandwidth into a plurality of split signals, each split signal including substantially the entire bandwidth of the input signal; a plurality of harmonic mixers, each harmonic mixer configured to mix an associated split signal of the plurality of split signals with an associated harmonic signal to generate an associated mixed signal; and a plurality of digitizers, each digitizer configured to digitize a mixed signal of an associated harmonic mixer of the plurality of harmonic mixers. A first-order harmonic of at least one harmonic signal associated with the harmonic mixers is different from an effective sample rate of at least one of the digitizers.

Abstract: An extremely high frequency (EHF) protocol converter may include a transducer, an EHF communication circuit, a protocol conversion circuit, and a circuit port. The transducer may be configured to convert between an electromagnetic EHF data signal and an electrical EHF signal. The EHF communication circuit may be configured to convert between a baseband data signal and the electrical EHF signal. The protocol conversion circuit may be adapted to convert between the baseband data signal having data formatted according to a first data protocol associated with a first external device and a second baseband data signal having data formatted according to a second data protocol associated with a second external device. The second data protocol may be different from the first data protocol. The circuit port may conduct the second baseband data signal to the second external device.

Abstract: One exemplary receiver for a wireless communication system includes signal processing components arranged to generate a receiver output according to a radio frequency (RF) signal. The signal processing components include amplifiers having a class-AB biased amplifier included therein. The signal processing components are disposed in a chip, and the class-AB biased amplifier is an amplifier which processes a signal corresponding to the RF signal before any other amplifier included in the chip. The class-AB biased amplifier has a first amplifier block, a bias circuit and a second amplifier block. The first amplifier block is arranged to receive an input at the input port and generating a first output. The bias circuit is arranged to bias the first amplifier block for a class-AB operation. The second amplifier block is arranged to generate an output at the output port according to the first output.

Abstract: A receiver front end circuit includes a low-noise amplifier including: a first receiver path having: a first low-noise transconductor to amplify a received signal and output the amplified received signal; and a first mixer to down-convert the amplified received signal. A second receiver path includes: an auxiliary receiver having: a second transconductor to output an amplified received signal; a baseband amplifier having an input port and an output port; a first resistance coupling the input port to the output port of the baseband amplifier and to convert the amplified received signal from current to voltage and set a voltage gain of the second receiver path; and a second resistance coupled from the output port of the baseband amplifier to the first mixer output. In some examples, frequency-upconversion feedback path includes a third mixer to frequency up-convert the amplified received signal at an output of the second receiver path.

Abstract: In one embodiment, an apparatus includes a first block configured to decompose an input signal into a positive component and a negative component. The apparatus further includes a second block configured to generate a mixer positive driver component from the positive component and a mixer negative driver component from the negative component and input the mixer positive driver component and the negative driver component into a mixer for a wireless transmitter.

Abstract: A passive mixer with channel impedance equalization is disclosed. In an exemplary embodiment, an apparatus includes replica devices configured to generate replica output signals and an error amplifier configured to generate bias signals based on the replica output signals. The bias signals are configured to equalize on-state channel impedances associated with a mixer.

Abstract: A complex intermediate frequency mixer (IFM) for frequency translating a received complex intermediate frequency, IF, signal, wherein the received complex IF signal comprises at least two frequency bands located at upper-side and lower-side of 0 Hz, is provided. The complex intermediate frequency mixer comprises a first, second, third and fourth mixer (M1, M2, M3, M4). The complex intermediate frequency mixer further comprises a first, second, third and fourth gain adjusting component (?1, ?2, ?2, ?1), connected to a first, second, third and fourth mixer output (M1-out, M2-out, M3-out, M4-out), respectively. Moreover, a first summing unit (S1), connected to a first gain output (?1-out), a fourth gain output (?1-out) and a third mixer output (M3-out) negated, and second summing unit (S2), connected to the second gain output (?2-out), the third gain output (?2-out) and the fourth mixer output (M4-out), are configured to output a first baseband complex signal of the received complex IF signal.

Abstract: A mixer includes an input stage to convert an RF input signal to an output signal, and a mixer core to mix the output signal from the input stage with a local oscillator signal. The input stage may include an input cell having a first differential pair of cross-connected transistors, and a linearizer coupled to the input cell. The linearizer may include a second differential pair of transistors having first and second inputs coupled to the input terminals and first and second outputs coupled to the output terminals.

Abstract: Techniques for providing a transceiver with a sliding intermediate frequency (IF). In an aspect, a PLL generates a single local oscillator (LO) signal used for both up-conversion by a transmit (TX) signal path and down-conversion by a receive (RX) signal path, wherein the LO frequency is chosen as the TX carrier frequency. As the TX and RX carrier frequencies may generally differ by a variable amount, the RX signal path utilizing the (TX) LO frequency for down-conversion may be characterized as having a “sliding” IF. To accommodate the sliding IF receiver architecture, specific processing functions such as charge sampling, discrete-time analog band-pass filtering, and sub-sampling analog-to-digital conversion (ADC) are described.

Abstract: A system is disclosed for monitoring of individual frequency channels in an RF signal band by configuration of the electronic processor to operate the tunable filter to select desired channel sub bands. Measurement of forward and/or reverse-propagating fields within the selected sub-bands may be performed and corresponding power levels recorded. The records may be used to provide monitoring signals, such as measures of forward and reflected power, as well as VSWR, return loss. Indications or alarms may be activated if any of these quantities, associated with any one or more channels, falls outside a predetermined acceptable operating range.

Abstract: Radio frequency (RF) architectures for spectrum access networks are provided. Embodiments of the invention generally provide a radio frequency (RF) architecture for customer premise equipment (CPE) for use in, for example, IEEE 802.22 wireless regional area networks (WRANs). In some embodiments, the CPE RF architecture includes two receive chains with a directional antenna and an omni-directional antenna, respectively. The CPE RF architecture facilitates opportunistic out-of-band spectrum sensing and WRAN signal receiving that are performed in parallel with data transmission.

Abstract: Disclosed is a method of adjusting the receive frequency of a radio frequency (RF) receiver die (4), the RF receiver die (4) comprising a mixer (8) with an associated local oscillator (10) and a first low-noise amplifier (6) arranged to operate over a first frequency range, the method comprising affixing a second low-noise amplifier (40) arranged to operate over a second frequency range to the RF receiver die (4).

Abstract: Compressing a variable phase component of a received modulated signal with a second harmonic injection locking oscillator, and generating a delayed phase-compressed signal with a fundamental injection locking oscillator, and combining the phase-compressed signal and the delayed phase-compressed signal to obtain an estimated derivative of the variable phase component, and further processing the estimated derivative to recover data contained within the received modulated signal.

Abstract: A conversion circuit for converting a complex analog input signal having an in-phase (I) component and a quadrature-phase (Q) component is disclosed. It comprises a channel-selection filter configured to filter the complex analog input signal, thereby generating a channel-filtered I and Q components, and one or more processing circuits. Each processing circuit comprises four mixers for generating a first and a second frequency-translated I component, and a first and a second channel-filtered Q component based on two LO signals with equal LO frequency and a 90° mutual phase shift. Each processing circuit also comprises a combiner circuit for generating a first, a second, a third, and a fourth combined signal proportional to sums and differences between the frequency translated I and Q components. The first and the fourth combined signals form a first complex signal, and the second and the third combined signals form a second complex signal.

Abstract: Example embodiments comprise a diversity receiver, and corresponding method, for measuring a differential phase between a first local oscillator of a first antenna and a second local oscillator of a second antenna in the presence of a primary interference signal and at least one secondary interference signal. The method may comprise receiving a primary communication signal, a primary reference signal and additional reference signals, and processing these signals such that a summation signal does not substantially comprise the at least one secondary interference signal. The estimation of differential phase is achieved by a phase shift calculation between processed signal components, using that a summation of all signal components equals, or is approximately equal to, a predetermined signal.

Abstract: Systems and methods according to embodiments of the present invention are provided for increasing the power efficiency of a communications device by allowing it to support dual-SIM functionality while issuing simultaneous wake ups for each SIM. Embodiments of the present invention leverage time sharing solutions to minimize the amount of circuitry needed in a communications device to issue wake ups while avoiding the drawbacks of other time sharing solutions that result in increased overhead due to requiring multiple transitions from an idle state to an active state.

Abstract: A method for reciprocal-mixing noise cancellation may include receiving, from a first mixer, a first signal comprising a wanted signal at a first frequency and a modulated signal at a second frequency. The modulated signal may be a product of a reciprocal-mixing of an unwanted signal with a phase noise. One or more portions of the modulated signal may overlap the wanted signal, adding a reciprocal-mixing noise to the wanted signal. A second signal may be generated by mixing, at a second mixer, the first signal with a third signal, which is at a third frequency related to a blocker offset frequency. A gain may be applied to the second signal to generate an amplified second signal that may be subtracted from the first signal to generate a fourth signal. The fourth signal may be filtered to generate the wanted signal at the first frequency without the reciprocal-mixing noise.

Abstract: The noise response in a passive mixer circuit is improved by discharging the switching transistors in the mixer circuit in an appropriate time slot prior to activation. In addition to improving the noise response, tilt in conversion gains and linearity can be reduced. A passive mixer circuit includes bypass switches arranged in proximity to the switching transistors that make up the mixer core. These bypass switches, which are activated in intervals just prior to the active intervals of their neighboring switching transistors, discharge to ground accumulated charges on the switching transistors or on reactive components around switches.

Abstract: Compressing a variable phase component of a received modulated signal with a second harmonic injection locking oscillator, and generating a delayed phase-compressed signal with a fundamental injection locking oscillator, and combining the phase-compressed signal and the delayed phase-compressed signal to obtain an estimated derivative of the variable phase component, and further processing the estimated derivative to recover data contained within the received modulated signal.

Abstract: A 4-phase filter includes four filter units including resistors and capacitors which inputs input signals, and provides the input signal via a switch buffer to a secondary capacitor provided in parallel to a primary capacitance of each filter unit, thus enabling a shift of an operational frequency band according to whether or not the switch buffer is in an output-high-impedance state.

Abstract: An antenna receives an RF signal and an RF signal at different frequency bands. An oscillator outputs a local oscillator signal at a frequency f1. An oscillator outputs a local oscillator signal at a frequency f2. A modulator modulates the frequency based on the local oscillator signal at the frequency f1 and the local oscillator signal at the frequency f2, and generates a plurality of local oscillator signals at different frequencies. A frequency converter mixes the plurality of local oscillator signals, at different frequencies, generated by the modulator, with the RF signal and the RF signal, and generates baseband signals of the RF signal and the RF signal. A signal processor performs a predetermined process for the baseband signals generated by the frequency converter.

Abstract: A receiver, receiving method, and use of an in-phase signal and a quadrature-phase signal is provided, that includes a mixer in the receiving path, an oscillator whose output is connected to a mixer input of the mixer, whereby the oscillator is formed to output a base signal, oscillating at a base frequency, at the output, a clock generation device to generate a clock signal from the base signal, whose input is connected to the output of the oscillator, whereby the clock generation device has a frequency converter for converting a base frequency of the base signal by the factor F=x+A, where x is a positive whole number and A a rational number between 0 and 1, and a signal processing device, which is connected downstream of the mixer in the receive path, whereby the signal processing device is connected to the clock generation device for control with the clock signal.

Abstract: In one embodiment, the present invention includes a mixer circuit to receive and generate a mixed signal from a radio frequency (RF) signal and a master clock signal, a switch stage coupled to an output of the mixer circuit to rotatingly switch the mixed signal to multiple gain stages coupled to the switch stage, and a combiner to combine an output of the gain stages.

Abstract: An RF signal reception device including: a transposition device of signals of frequency fRF to a first intermediate frequency IF1<fRF; a first bandpass filter centered on IF1; a sampler at a frequency fs<IF1; a second discrete-time filter centered on a second intermediate frequency IF2=?·fs/M+fs/(M·n); a decimation device of a factor M; an analog-digital convertor to operate at a frequency fs/M; where ?, n and M are strictly positive real numbers chosen such that: ?<fs/(2·BWch·M), and BWch/2<fs/M·n), with BWch: bandwidth of a channel of the received RF signals.

Abstract: A signal processor includes a frequency generator that employs a direct digital synthesizer (DDS) to generate a first local oscillator (LO) signal with a variable first LO frequency. The signal processor also includes an oscillator generating a second LO signal having a second LO frequency. The DDS employs programmable frequency control word and a sampling clock signal having a variable sampling clock frequency that is derived from the second LO frequency, to generate a DDS output signal from which the first LO signal is produced. The variable sampling clock frequency and the programmable frequency control word are selected to avoid crossing spurs in the frequency spectrum of the DDS output signal.

Abstract: The present invention relates to a circuit arrangement (300) for generating non-overlapping and immune-to-1/f-noise signals as has been described. A break-before-make (BBM) circuit ensures that the differential I/Q signals (LO—0, LO—90, LO—180, LO—270), driving the transistors (M11, M12, M21, M22) of mixers (16A, 16B) in an RF receiver (200), are non-over-lapping for having at any time only one of these transistors turned on. The duty cycle of each driving signal is measured, and the difference (?) in the duty cycle corresponding to two subsequent LO phases is determined through a respective differential amplifier (38A-38D). Each differential amplifier is configured to have a current output (LT—0, LT—90, LT—180, LT—270), which is then fed back to the input of the input buffer (30A-30D) corresponding to the first LO phase in order to adjust its logic threshold (LT) level and make the difference (?) equal to zero.

Abstract: Embodiments of the present invention provide a receiver and a receiving method of the receiver, so that monolithic integration of multiple receiving channels can be implemented. The receiver includes: a zero intermediate frequency channel, performing in-phase/quadrature (IQ) down conversion on a radio frequency signal at a first frequency band using a frequency division or frequency multiplication signal of a first oscillation signal; and a superheterodyne channel, performing down conversion on a radio frequency signal at a second frequency band using the frequency division or frequency multiplication signal of the first oscillation signal, where the first frequency band is different from the second frequency band.

Abstract: Certain aspects of a method and system for mitigating effects of pulling in multiple phase locked loops in multi-standard systems may include selecting an input frequency range of operation at a voltage controlled oscillator based on a particular wireless band of operation in a system that handles a first wireless communication protocol and a second wireless communication protocol. An image rejection mixer may be enabled to generate an output signal for the particular wireless band of operation based on mixing a plurality of received signals within a selected frequency range. An in-phase (I) component and a quadrature (Q) component of the generated output signal may be generated by utilizing a RC-CR quadrature network.

Abstract: A voltage sampling RF receiver in which an impedance control circuit controls the input impedance, by using a mixer stage which generates a feedback voltage, which is coupled to the RF input by a feedback resistor. A biasing arrangement can be used to adjust the feedback path so that local oscillator leakage signals are suppressed.

Abstract: An RF sensing circuit with a voltage-controlled oscillator comprises a low noise amplifier (LNA), a voltage-controlled oscillator (VCO), a frequency demodulating unit, a bandpass filter (BPF) and a digital signal processing unit. The VCO has an injection signal input port and a voltage input port, wherein the injection signal input port is electrically connected with an output of the LNA. The frequency demodulating unit is electrically connected with an output of the VCO and the BPF is electrically connected with an output of the frequency demodulating unit. The digital signal processing unit is electrically connected with an output of the BPF and the voltage input port of the VCO.

Abstract: The teachings presented herein allow the same sequence of local oscillator waveform sample values to be used for driving two harmonic rejection mixers for which quadrature operation is desired, irrespective of whether the oversampling rate of the sequence is divisible by four or only divisible by two. This ability is obtained by controlling whether the quadrature mixer clocks coincidentally with the in-phase mixer, or clocks a half clock cycle out of phase relative to the in-phase mixer. Several advantages attend the contemplated circuit arrangement and method of operation. Example advantages include the improved matching that comes from operating both mixers with the identical waveform sample values, and the improved flexibility in optimizing the harmonic rejection and/or interference-related operation of the mixers over a broader range of frequencies of interest, which flows from having a larger set of usable OSRs.

Abstract: Systems, methods, and other embodiments associated with radio coexistence using clock rate adaptation are described. According to one embodiment, a device includes a system bus configured to transmit and receive data at a clock rate. The device also includes a radio logic configured to receive radio frequency signals. The device further includes a clock logic configured to adjust the clock rate of the system bus when the radio logic is receiving the radio frequency signals.

Abstract: A modulation circuit for use in a radiofrequency transmitter includes a local oscillator circuit configured to generate one or more local oscillator signals at a desired frequency and with a duty cycle at or about twenty-five percent, and a modulator configured to generate one or more modulated signals responsive to the one or more local oscillator signals and one or more baseband information signals. In at least one embodiment, the modulation circuit includes a modulator comprising a combined mixing and transconductance circuit that includes a transistor circuit for each baseband information signal serving as a modulation input to the modulator. Each transistor circuit comprises a first transistor driven by the baseband information signal and coupling a modulator output node to a corresponding transconductance element, and a second transistor driven by one of the one or more local oscillator signals and coupling the corresponding transconductance element to a signal ground node.

Abstract: Efficient carrier aggregation is enabled in a receiver employing a single frequency source, and dividing the frequency source by different frequency dividing factors to generate two or more RF LO frequencies. Received signals are down-converted to intermediate frequencies by mixing with the respective RF LO frequencies. By utilizing only a single high frequency source, embodiments of the present invention avoid spurious and injection locking issues that arise when integrating two or more frequency sources, and additionally reduce power consumption as compared to a multiple frequency source solution.

Abstract: Systems and methods for combining signals from multiple active wireless receivers are discussed herein. An exemplary system comprises a first downconverter, a phase comparator, a phase adjuster, and a second downconverter. The first downconverter may be configured to downconvert a received signal from a first antenna to an intermediate frequency to create an intermediate frequency signal. The phase comparator may be configured to mix the received signal and a downconverted signal to create a mixed signal, compare a phase of the mixed signal to a predetermined phase, and generate a phase control signal based on the comparison, the downconverted signal being associated with the received signal from the first antenna. The phase adjuster may be configured to alter the phase of the intermediate frequency signal based on the phase control signal. The second downconverter may be configured to downconvert the phase-shifted intermediate frequency signal to create an output signal.

Abstract: An embodiment of a system and method provides a carbon nanotube transistor (CNT) mixer with a low local oscillator power requirement and no inter-modulation products. Specifically, an embodiment of the system and method provides two kinds of device current-voltage (I-V) characteristics on the same integrated circuit: exponential and linear. The CNT I-V characteristics support both the ideal exponential control characteristic (determined by physics constants) and the ideal linear control characteristic (also determined by physics constants), resulting in an ideal multiplier. In other words, the CNT mixer is mathematically equivalent to an ideal multiplier. Such an ideal multiplier can be used as a mixer with low local oscillator power requirement and virtually no inter-modulation products.

Abstract: A mixer for mixing a received signal and a local oscillator signal is provided. The local oscillator signal is modulated by means of a modulation signal and the modulated local oscillator signal is injected into the received signal.