Abstract: An automatic gain control apparatus includes a first comparing module, a counting module, a second comparing module, and a control module. The first comparing module compares an input signal with a first threshold level and a second threshold level to generate a first compared output signal and a second compared output signal respectively. The counting module performs counting operations upon the first compared output signal and the second compared output signal to generate a first counting number and a second counting number respectively. The second comparing module compares the first counting number with a first threshold number to generate a first detection signal and compares the second counting number with a second threshold number to generate a second detection signal. The control module controls the gain of a radio frequency amplifier or an intermediate frequency amplifier according to the first detection signal and the second detection signal.

Abstract: There is provided a transceiver comprising a first node for receiving a received signal and transmitting a transmitted signal; a receiver, connected between a first voltage and the first node, for processing the received signal; a transmitter, connected between a second voltage and the first node, for generating the transmitted signal; and a DC voltage controller for selecting a DC component of a voltage of the first node to at least one of: selectively activate at least one of the transmitter and the receiver; and selectively substantially deactivate at least one of the transmitter and receiver.

Abstract: The invention specifies a circuit arrangement with a radio-frequency mixer (4) in which a plurality of preamplifiers (1, 2, 3) in a receiver have a common output node (6). This node is connected to a common, broadband radio-frequency mixer (4) via common coupling capacitances (41, 42). Switching means (17, 18; 27, 28; 37, 38) can be used to connect and disconnect the preamplifiers (1 to 3), which can be associated with various frequency bands, independently of one another. The present principle can be applied in multiband receivers in mobile radio and allows integration using little chip area with good radio-frequency characteristics.

Abstract: An amplifier device for a mode antenna has a number of amplifiers and a number of outputs. An input signal is fed to each amplifier, which is amplified by the respective amplifier into an amplified input signal. The amplified input signals are fed to an output matrix arranged after the amplifiers. Respective output signals are emitted by the output matrix at the outputs. The output matrix causes each amplified input signal to supply an output signal contribution for each output signal. Each output signal contribution of each output signal has an output-side contribution offset in relation to the corresponding amplified input signal, which depends on the amplified input signal that supplied the output signal contribution, and the output signal to which the output signal contribution contributes. The amplifier device is especially able to be used in a transmit arrangement for radio-frequency signals.

Abstract: At least one adjustable gain analog amplifier (120, 124 and 128) in an analog line-up (102) amplifies by a gain an analog signal at an input of the analog line-up (102). The at least one adjustable gain analog amplifier (120, 124 and 128) is operable at one or more gains. At least one digital estimation device (134, 140 and 146) receives signal via an output (108) of the analog line-up (10) and provides a digital signal estimate representative of an analog signal at an input of a respective one of the at least one adjustable gain analog amplifier (120, 124 and 128) in the analog line-up (102). An AGC controller (152) monitors the digital signal estimate. The AGC controller (152) adjusts the gain of the at least one analog amplifier (120, 124 and 128). An RF receiver and an integrated circuit utilizing the novel features are also disclosed.

Abstract: An amplification system including a high gain amplifier, filter module and low gain amplifier. The high gain amplifier for receiving an input RF signal and processing the input RF signal to produce a first amplified signal while the high gain amplifier is operating near its saturation point. The filter module having at least one band pass filter to receive the first amplified signal and process the first amplified signal to remove unwanted characteristics of the first amplified signal to produce a processed first amplified signal. The low gain amplifier receiving the processed first amplified signal and processing the processed first amplified signal to produce a second amplified signal that has an increase in signal strength over the processed first amplified signal while the low gain amplifier is operating near its saturation point.

Abstract: Static and dynamic DC offsets in receivers may be cancelled in two stages using a digitally implemented offset-correction loop.

Abstract: A frequency mixer includes a semiconductor substrate. An input current feedback amplifier is formed on the semiconductor substrate and receives a radio frequency (RF) signal and a local oscillator (LO) signal. An inverting current feedback amplifier is formed on the semiconductor substrate and connected to the input current feedback amplifier for inverting the LO signal and producing a half-wave signal. An output current feedback amplifier is formed on the semiconductor substrate and connected to an output of the input and inverting current feedback amplifiers and operative as an inverting summer for the RF and LO signals such that the output polarity of the RF signal is reversed.

Abstract: A method may compensate for direct current (DC) offset in a radio frequency reception device. The method may include partitioning an analog portion of the reception device into a plurality of zones, for each zone, calibrating initial DC offset compensation to be applied within an operating range of a respective zone, the operating range of the other zones being limited to a threshold operating range, and determining DC offset compensation to be applied to the reception device throughout the operating range based on the basic DC offset compensations.

Abstract: A gain control circuit of the wireless receiver comprises a plurality of stages-amplifier, an analog gain control circuit, and a digital gain control circuit, wherein the analog gain control circuit generates an analog controlling voltage for regulating the gain of the post-amplifier by an analog gain controlling process, and the digital gain control circuit is used for determining a plurality of gain curves for the pre-amplifier, and the gain curves are all operating between the first default voltage and second default voltage. While the analog controlling voltage is over the first default voltage or second default voltage, the gain curve will be switched, thereby, the analog gain controlling process can be with the digital gain controlling process therein for improving the linearity of the gain regulation and reducing the transient response during the gain switching process.

Abstract: An integrated circuit chip include a transmitter configured for transmitting an electromagnetic signal, a receiver configured for receiving an electromagnetic signal, and an amplifier operatively coupled to the receiver. The amplifier includes a plurality of variable-gain Gm-C filter stages connected in series and configured for selectively amplifying frequency components within a frequency bandwidth of the received electromagnetic signal.

Abstract: A filter circuit includes first capacitors, second capacitors capable of altering a cutoff frequency by being connected in parallel with the first capacitors, first switches for connecting the second capacitors in parallel with the first capacitors, and charging circuits for the second capacitors. The charging circuits include second switches, and resistances for attenuating the amplitudes of input voltages to be fed to the second capacitors, by being connected in series with the second capacitors. The second capacitors are charged through the resistances in a state where the first switches are turned OFF and where the second switches are turned ON. Thus, a DC offset which is ascribable to the cutoff frequency switching of a filter is reduced.

Abstract: A direct current (DC) offset correction system for a direct conversion receiver and corresponding receiver and methods facilitate reduction of DC offsets in such receivers. One method includes calibrating a DC offset correction system in a closed loop configuration over each of a plurality of gain settings to provide a plurality of offset data for an operating mode of the direct conversion receiver; selecting one of the plurality of offset data based on a current gain setting of the direct conversion receiver as supplied, e.g., by an AGC system; and operating the DC offset correction system in an open loop configuration using the one of the plurality of offset data to correct for a DC offset in the direct conversion receiver.

Abstract: An active splitter circuit arrangement includes a first amplification module having a number of first input ports and first output ports. The first amplification module is configured to provide first stage amplification to a received input signal and produce from the amplified input signal a number of output signals, each substantially matching the input signal. Also included is a first gain control device having a number of gain input ports respectively coupled to the first output ports and a gain output port coupled to at least one of the first input ports. The first gain control device is configured to control a gain of the first amplification module. Next, a number of second amplification modules corresponding to the number of output signals has a number of second input ports respectively coupled to the first output ports.

Abstract: A wireless communication circuit has a second control circuit which reduces the gain of the differential converter when the signal level of the RF signal is at least a specified level and the RF signal includes a disturbing wave of a predetermined level or higher.

Abstract: A method and system for diversity transmission from a mobile station. Signals sent from a mobile station to a base station may suffer from fading. To combat this, diversity transmission is used to compensate for the effects of fading and destructive multi-path interference by sending two or more signals. Signals to be transmitted from the mobile station are split into a first split signal and a second split signal and diversified from one another. Diversification of the split signals may be accomplished by modifying the phase of either the first split signal, the second split signal or both the first and second split signal. The diversified signals may then be transmitted from a first and second antenna.

Abstract: An RF circuit module, in which a power amplifier and a transceiver are united, with reduced interference between its electronic circuit blocks, downsized and still having high performance, and with a stable performance not dependent on the ground land structure on the motherboard, is provided. The ground plane 110 for at least a last-stage amplifier 11 of the power amplifier 10 where the greatest power is generated in the whole RF circuit block, that is, the source of generating the greatest noise and heat for the RF circuit block, is isolated from the ground plane for at least one circuit portion of the transceiver 9 including an LNA 51, receiver 52, transmitter 30, and VCO 70. These ground planes are connected to a common ground plane 480 through different connection conductors, respectively.

Abstract: A low voltage differential signaling transceiver includes a transmitter and a receiver, the transmitter having a first terminal in signal communication with a transmission line, a source resistance in signal communication with the first terminal, a switch in signal communication with the source resistance and in switchable signal communication from ground or an input voltage, a voltage regulator in switchable signal communication with the switch for providing the input voltage to the switch, and a voltage controller in signal communication between the first terminal and the voltage regulator for controlling the input voltage to provide a controlled voltage to a receiver; and the receiver having an amplifier having a first input, a first pad in signal communication with the first input, a load resistance, and a second pad in signal communication with the load resistance, where the first and second pads are both in signal communication with one end of a first transmission line.

Abstract: A circuit arrangement includes two adjustable amplification devices where the signal output of the first amplification device is connected to the signal input of the second amplification device. The first amplification device has a digital input for controlling its gain and the second amplification device has an input for controlling its gain. The input for gain control in the second amplification device is connected to the input for controlling the gain of the first amplification device via a means such that a change in the gain of the second amplification device in one direction is effected by a change in gain, brought about by means of the control, in the first amplification device in the opposite direction such that the total gain remains essentially the same.

Abstract: In a video IF channel the gain of the circuit is achieved ahead of the IF filter and the output of the filter, including its noise, need only be amplified a relatively small amount, thus preserving an acceptable signal to noise ratio. In one embodiment, a variable gain amplifier is used as the first stage amplifier and a fixed gain amplifier is used for the output stage.

Abstract: A receiver (100) adjusts its overall gain based on the detected power level of an incoming signal. The receiver is built with two detectors (D1, D2) which operate with different detecting ranges within the dynamic range of the incoming signal. If the actual power level of the incoming signal falls within one of the resolving ranges, an automatic gain control adjusts the gain of the receiver to a corresponding gain value. If not, the resolving range of one of the two detectors is shifted and eventually reduced to cover the portion of the dynamic range in which the power level is comprised. The gain of the receiver is then temporarily adjusted and a new measurement is carried out by the detector using the new resolving range. The AGC then re-adjusts the gain of the receiver based on the measurement given by the modified detector.

Abstract: Modulation-demodulation format selectable (MFS) processor, cross-correlator and transmit filter for processing, cross-correlating and filtering in-phase and quadrature-phase baseband signal and providing a first bit rate and a second bit rate baseband signal to a modulator and a transmitter for modulation and transmission of the processed filtered baseband signal. Transmit amplifier operated in a first radio frequency (RF) band for amplification of the first bit rate modulated signal and a second RF amplifier operated in a second RF band for amplification of the second bit rate modulated signal. Switch for selecting the first or the second bit rate or first or second modulation format signal and providing selected signal to a transmitter. Receiver for receiving transmitted signal. Demodulator and demodulator filter mis-matched to transmit baseband filter.

Abstract: A programmable variable gain amplifier includes at least three amplifiers. A first amplifier is configured to amplify an input signal. A second amplifier, which includes a programmable output load stage, is configured to receive an output signal from the first amplifier and to output a first differential output signal. The output load stage includes multiple first switches and multiple first diode-connected transistors that are open-circuited or short-circuited by the first switches. A third amplifier, which includes a programmable current mirror input stage, is configured to receive the first differential output signal from the second amplifier through the current mirror input stage and to output a second differential output signal. The current mirror input stage includes multiple second switches and multiple second transistors that are open-circuited or short-circuited by the plurality of second switches.

Abstract: An automatic gain control (AGC) technique can quickly sense signal size over a large dynamic range by using a peak detector block in the analog portion of the receiver. The peak detector block can compare a received signal to predetermined thresholds (chosen to divide a potential signal range into smaller ranges). Therefore, the peak detector block can assist the automatic gain control (AGC) in quickly sizing the received signal. The AGC technique can also reduce digital filter settling time by simulating a gain change and providing this simulated value to the digital filters of the receiver. DC or spur components can be estimated prior to and after performing an analog gain change and then removed from digital signal samples. The digital signal samples sampled prior to performing the analog gain change can then be rescaled and provided to the digital filter, thereby avoiding discontinuity in a digital signal.

Abstract: The present invention relates to an amplifier arrangement having a plurality of amplifier stages that form a series circuit. Each amplifier stage comprises a current mirror, the translation ratio of which defines the gain of the amplifier stage. Moreover, a current coupling-out element is provided in each amplifier stage, a partial current being output at said element, and the partial currents are added together in a summation element. An RSSI signal associated with the summed currents is provided at the output of the summation element. The RSSI amplifier arrangement provides constant and thermostable signal amplification, low sensitivity to overvoltages, and exhibits a low current requirement and good radio frequency properties.

Abstract: A frequency agile sequential amplifier circuit that includes first and second RF amplifiers coupled by a SAW delay line, a double balanced mixer coupling the first RF amplifier to the SAW delay line, the output of the first RF amplifier providing a signal as a first input to the double balanced mixer and a variable pulse generator coupled to both said first and second RF amplifiers to cause them to sequentially and alternately conduct, and a divide/2 circuit coupling said variable pulse generator to said double balanced mixer as a second input at ½ the rate of said RF amplifiers to cause the sequential amplifier circuit to achieve frequency agility and to substantially maintain its sensitivity.

Abstract: A self-tuned millimeter wave transceiver module includes a microwave monolithic integrated circuit (MMIC) having at least one amplifier. A controller is operatively connected to the MMIC for sensing amplifier operating conditions and tuning the at least one amplifier to an optimum operating condition. The controller includes a surface mounted microcontroller chip operatively connected to the MMIC.

Abstract: A receiving circuit of a direct conversion system is provided which includes a differential amplifier circuit which amplifies a received signal, a mixer which combines the amplified received signal and an oscillation signal having a predetermined frequency to thereby perform frequency conversion, and a high gain amplifier circuit in which a plurality of programmable gain amplifiers and a plurality of filters which eliminate noise of the received signal and an unnecessary wave, are connected in a multistage and which is configured such that an amplification factor is varied according to the level of the received signal. In the receiving circuit, the low noise amplifier is brought to a non-operating state to thereby allow execution of a DC offset cancel operation of the corresponding programmable gain amplifier on the pre-stage side of the high gain amplifier circuit.

Abstract: The receiver is provided which comprises a mixer, a low pass filter coupled to the mixer and a plurality of gain controllers serially coupled to an output of the low pass filter (LPF). A plurality of analog-to-digital converters (ADCs) is coupled so that an input of a first of the ADCs is coupled to the output of the LPF. An input of each of a remaining portion of the ADCs is individually coupled to a corresponding output of each of the serially coupled gain blocks. An output path traced from the output of the LPF to an output of each of the analog-to-digital converters may be referred to as a processing path. Each processing path may comprise a gain controller and an ADC, except for the first processing path, which may have an ADC coupled directly to the output of the LPF.

Abstract: Disclosed is a variable gain control circuit for executing automatic-gain-control on a variable gain amplification block composed of a plurality of amplifiers on which discrete gain setting is executed by a programmable-gain-amp method. A baseband amplifier (a variable gain amplifier) is composed of a plurality of amplifiers on which discrete gain setting is executed by a programmable-gain-amp method. A programmable-gain-amp control processing block references a programmable-gain-amp control data table on the basis of a difference between a current receive signal level and a predetermined receive signal level to determine the gain of the baseband amplifier, thereby making a programmable-gain-amp data generator generate programmable-gain-amp data.

Abstract: There are provided, as a low noise amplifier (70) a low noise amplifier (71) with a low gain and a low noise amplifier (72) with a high gain, selectively operable under control of a bias current, and an output from the low noise amplifier (72) and a quadrature demodulator (80) are connected with a serial capacitance (73) and also an output from the low noise amplifier (71) and the quadrature demodulator (80) are serially connected. A control section (66) controls a reception circuit so that the low noise amplifier (71) operates when a reception signal level is high and the low noise amplifier (72) operates when the reception signal level is low. When the low noise amplifier (72) operates, a DC bias current thereof is made flow separately from a DC bias current of the quadrature demodulator (80), and, when the low noise amplifier (71) operates, a DC bias current thereof is shared with the quadrature demodulator.

Abstract: A received low-frequency standard radio wave, which is an amplitude modulation signal, is converted to an intermediate frequency signal Sa, and is output to a detection circuit and an AGC circuit. The detection circuit and AGC circuit generates an RF control signal Sf1 and IF control signal Sf2 from the input intermediate frequency signal Sa, and controls an RF control circuit and IF control circuit by outputting the generated RF control signal Sf1 and IF control signal Sf2 to the RF control circuit and IF control circuit. By this a radio wave reception device can speed up AGC operation.

Abstract: A Radio Frequency (RF) power amplifier includes a transconductance stage, an AC coupling element, and a cascode stage. The transconductance stage is adapted to receive an input RF voltage signal and to produce an output RF current signal. The cascode stage is adapted to receive an input RF current signal and to produce an output RF voltage signal. The AC coupling element couples between the transconductance stage and the cascode stage and is operable to AC couple the output RF current signal of the transconductance stage as the input RF current signal of the cascode stage.

Abstract: A signal strength indicator circuit that includes a first amplifier configured to receive a first input signal from a first mixer and a second input signal from a second mixer;. The circuit also includes a second amplifier configured to receive a first set of differential inputs from the first amplifier. The circuit further includes a third amplifier configured to receive a second set of differential inputs from the second amplifier stage. Even further, the circuit includes an output port for emitting an output signal that is a rectified combination of the first input signal and the second input signal. Also, a method of processing signals input into a signal strength indicator circuit.

Abstract: An AGC circuit includes both wide-band and narrow-band VGAs. Two power monitors monitor the power level of the two VGAs. Based upon the signals provided by the power monitors, the AGC circuit derives two error terms. The AGC circuit filters and combines the error terms to determine a desired adjustment to the total gain and a desired adjustment to the distribution of the gain between the wide-band VGA and the narrow-band VGA. The AGC circuit also minimizes the noise figure of the narrow-band VGA subject to linearity constraints.

Abstract: Disclosed is an automatic gain controller capable of reducing signal saturation or signal distortion caused by out-of-band signals of a filter extracting an object signal or delay of a control signal and capable of precisely measuring a signal level in a filter band. An AGC response control section compares a level of control voltage (“V2_I terminal” signal) outputted from a first AGC control section and inputted into a “V2_I terminal” with a level of control voltage (“V3_I terminal” signal) outputted from a second AGC control section and inputted into a “V3_I terminal”. If the control voltage, which is the “V3_I terminal” signal, outputted from the second AGC control section is less than the control voltage, which is a “V2_I terminal” signal, outputted from the first AGC control section, the AGC response control section controls an AGC amplifier by using the control voltage outputted from the second AGC control section.

Abstract: An example automatic gain control (AGC) system in which an adder adds a radio frequency (RF) signal power of only the low-frequency component of an RF signal and an intermediate-frequency (IF) signal of an output from a variable-gain intermediate-frequency amplifier, which is higher than the frequency of the low-frequency component, and outputs the result to an A/D converter. This construction makes it possible to input power data for the RF stage to a demodulation LSI. The demodulation LSI separates the low-frequency component from the input signal, and by detecting the power of the extracted signal, is able to obtain the output data for the RF signal, and it separates the IF component from the input signal, and by detecting the power of the extracted signal, is able to obtain the output data for the IF signal.

Abstract: A computer system provides a wireless audio signal transmitter module which is capable of transmitting audio signal wirelessly from a host computer to at least one remote wireless signal receiver. The wireless audio signal transmitter module is connected to a sound effect interface for receiving audio signal from the computer. The audio signal is processed, modulated, and then transmitted out by an antenna. The wireless signal is received and processed by the audio signal receiver located within an effective transmission distance. The signal is then transmitted to a user via a microphone.

Abstract: In a receiver used in the spread spectrum communication system, power of a base band signal which is obtained by A/D converting an output of a quadrature demodulator is detected by a base band signal power-detecting unit, where the quadrature demodulator demodulates an IF signal outputted from an AGC amplifier. The base band signal is despeaded by a despreading unit, and converted into a symbol rate signal, power of which is detected by a symbol rate signal power-detecting unit. An error rate of a desired wave is detected by an error rate-detecting unit on the basis of the symbol rate signal. Output signals of the base band signal power-detecting unit, the symbol rate signal power-detecting unit, and the error rate-detecting unit are supplied to an AGC amplifier-controlling unit which controls a gain of the AGC amplifier.

Abstract: A receiver comprises a first Variable Gain Amplifier (VGA) that amplifies an input signal in accordance with a first gain to produce a first amplified signal. The first gain is controlled based on the first amplified signal. The receiver includes a second VGA that produces a second amplified signal responsive to the first amplified signal. The second VGA has a second gain controlled based on the second amplified signal.

Abstract: Disclosed herein is a direct conversion type signal processing semiconductor integrated circuit device capable of suppressing a DC voltage variation in the output of a variable gain amplifier upon the transition to a reception mode, reproducing stable receiving characteristics and improving receiving sensitivity. In the signal processing semiconductor integrated circuit device, voltage reference circuits for generating reference voltages for controlling or restricting currents for current sources for supplying operating currents for amplifiers constituting a reception-system circuit are boosted upon the transition from an idle mode or the like to the reception mode to allow the currents to flow into the constant-current sources of the amplifiers after the stabilization of the generated reference voltages.

Abstract: The thermal interference due to the self heating of transistors constituting a gilbert cell circuit is reduced, thereby largely improving the receiving sensitivity to signals. A mixer circuit composed of a gilbert cell circuit comprises transistors T1 to T6. Each of the transistors T1 to T4 is con figured so that four transistors may be connected in parallel. In a layout on a semiconductor chip, four transistors T1a to T1d and T2a to T2d respectively constituting the transistors T1 and T2 are respectively separated into two pairs, and the respective two pairs are laid out in a crisscross shape so that they are crossed with each other. Similarly, four transistors T3a to T3d and T4a to T4d respectively constituting the transistors T3 and T4 are respectively separated into two pairs, and the respective two pairs are laid out in a crisscross shape so that they are crossed with each other. Thus, the thermal influence applied on the transistors T1 to T4 is uniformed.

Abstract: The invention relates to a low-noise amplifier circuit and a method for amplifying low-power signals in a low-noise manner. Said signals are supplied to the inputs of several amplifiers (20 . . . 29) which are arranged in parallel. The output signals of said amplifiers (20 . . . 29) are multiplied by each other.

Abstract: A self-tuned millimeter wave transceiver module includes a microwave monolithic integrated circuit (MMIC) having at least one amplifier. A controller is operatively connected to the MMIC for sensing amplifier operating conditions and tuning the at least one amplifier to an optimum operating condition. The controller includes a surface mounted microcontroller chip operatively connected to the MMIC.

Abstract: A multi-stage amplifier is coupled with a power detector. The multi-stage amplifier includes a plurality of amplifier stages in series, with a signal path extending through them. The power detector is coupled to an interior node of the amplifier along the signal path, and is operable to sample a first signal being transmitted on the signal path. The power detector outputs a second signal reflective of a power of the first signal. In one embodiment, the interior node is in a matching network of the amplifier disposed between a first amplifier stage and a final amplifier stage of the amplifier. The second signal may be used in a feedback network to adjust an amount of amplification of the first signal by the amplifier.

Abstract: The present invention reduces automatic gain control (AGC) transients using first and second AGC processing branches to receive a signal. A gain is selectively adjusted (if desired) in the one of the AGC processing branches during a first time period. However, a gain is not adjusted in the other AGC processing branch during that first time period. The signals generated by the first and second AGC processing branches are then diversity processed to generate a received signal. The diversity processing effectively reduces the effect of any AGC transient.

Abstract: A power amplifier having a phase shift and impedance transformation element is disclosed. The power amplifier comprises a plurality of amplification paths, a first phase shift element at an input of each amplification path and a second phase shift element at an output of each amplification path. The amplifier also comprises an impedance transformation element associated with the second phase shift element and a power combiner configured to combine an output of each amplification path into a single output.

Abstract: A transmitter into which a modulated signal (TX) is fed, the transmitter comprising an adjustable amplifier (1) for adjusting transmission power level, the modulated signal (TX) being fed into to the input of the amplifier (1), an amplification branch (11) arranged after the adjustable amplifier (1) on the signal path, the amplification branch comprising a power amplifier (3) for further amplifying the transmission power level, and at least one filter (27, 28) arranged after the power amplifier (3) on the signal path for filtering the frequency band to be transmitted. The transmitter further comprises an antenna (9) after the amplification branch (11) on the signal path for transmitting signals. The transmitted is characterized by a bypass branch (10) which operatively couples the output of the adjustable amplifier (1) and the antenna (9) and is used for bypassing the amplification branch (11) and connecting signals to be transmitted at low transmission power levels directly to the antenna (9).

Abstract: A repeater and method for automatically setting output signal level of the repeater is disclosed. The repeater includes: a voltage detection unit for measuring a voltage of signal amplified by a plurality of the amplifiers; a digital variable resist unit for providing a reference voltage value Vref; a comparison unit for comparing the detected voltage Vdec from the voltage detection unit and the reference voltage value Vref from the digital variable resist unit; and a control unit for setting output signal level of the repeater by controlling the digital variable resistor unit to generate the reference voltage Vref to be identical to the detected voltage Vdec and controlling an output of repeater based on the comparison result from the comparison unit after setting the output signal level of the repeater.

Abstract: A device for ensuring that the amplitude of signals fall within a predetermined range, said device comprising input means for receiving a plurality of input signals at substantially the same time, a first path for increasing the amplitude of any of the input signals having an amplitude below a first threshold, a second path for decreasing the amplitude of any of the input signals having an amplitude which exceeds a second threshold and combining the outputs of the first and second paths to provide a plurality of signals having amplitudes between said first and second thresholds.