Plural Amplifier Stages Patents (Class 455/253.2)
  • Patent number: 6782244
    Abstract: An amplifier provides two or more selectively enabled amplifier segments allowing a source signal to be amplified with a selectable output power. A bias circuit responsive to a bias control signal enables selectable combinations of one or more amplifier segments, thus allowing selection of a desired output power. Selecting a desired output signal power via the bias control signal corresponds to selecting an overall amplifier quiescent current that decreases with decreasing output signal power. Thus, the amplifier permits a controlling system, such as a mobile terminal (e.g., cellular telephone) to amplify a transmit signal with a selectable transmit signal output power and corresponding level of amplifier quiescent power consumption. Preferably, each segment comprises one or more transistor amplification stages which, when enabled by the bias circuit, are biased to permit maximum power linear amplification for the transmit signal.
    Type: Grant
    Filed: March 16, 2001
    Date of Patent: August 24, 2004
    Assignee: RF Micro Devices, Inc.
    Inventors: Victor E. Steel, Jon D. Jorgenson, Khoi Tam Vu
  • Patent number: 6775525
    Abstract: A radio communication apparatus including at the transmitter-side output stage a high-frequency power amplifier module that has incorporated therein a single-stage amplifier using one multi-finger type heterojunction bipolar transistor (HBT) or a multi-stage amplifier using a plurality of HBTs sequentially connected in cascade, and at the output end an antenna connected to the high-frequency power amplifier module, wherein first capacitors and first resistors are inserted in series between the input terminal of the high-frequency power amplifier module and the control fingers of the HBT, and second resistors are inserted between the control terminal of the high-frequency power amplifier module and the control fingers of the HBT and connected to the nodes of the first resistors and the first capacitors.
    Type: Grant
    Filed: October 26, 2000
    Date of Patent: August 10, 2004
    Assignee: Renesas Technology Corporation
    Inventors: Tomonori Tanoue, Kiichi Yamashita
  • Publication number: 20040082305
    Abstract: Systems and methods are described for a sideband suppression technique for quadrature modulation using magnitude measurements. Gain imbalance, phase imbalance, or both gain and phase imbalance are corrected in a quadrature modulator. Predetermined voltage levels are applied to one or both of the quadrature modulator input channels and resultant output magnitudes are measured. Then, a gain correction factor, a phase correction factor or both gain and a phase correction factors are determined as a function of the measured output magnitudes. Gain imbalance, phase imbalance or both gain and imbalance are then corrected using the gain and phase correction factors.
    Type: Application
    Filed: October 25, 2002
    Publication date: April 29, 2004
    Inventors: Mark A. Kirschenmann, Sumit A. Talwalkar
  • Patent number: 6711392
    Abstract: A balanced power amplifier for radio frequencies. The power amplifier may be switched from operating in a saturation mode, so that AMPS-type radio telephone signals may be optimally amplified, to a linear mode so that CDMA signals may be amplified. A directional coupler splits an input signal into quadrature signal components which are supplied to the input of a pair of dual mode power amplifiers. The output signals from the dual mode amplifiers are recombined in a directional coupler. The directional coupler effectively applies all of the output power to an antenna connected to one of the coupler ports, and effectively isolates the output stages of the amplifiers from any reflected power generated by the antenna.
    Type: Grant
    Filed: June 30, 2000
    Date of Patent: March 23, 2004
    Assignee: International Business Machines Corporation
    Inventor: John D. Gillis
  • Publication number: 20040002314
    Abstract: An integrating apparatus is provided, which includes a power supply for providing a power to be the main power of the integrating apparatus, a controller connected electrically with the power supply so as to control the operation of the integrating apparatus, a storage device connected electrically with the controller for storing a data, and at least a transmitting interface connected with at least a 3C equipment so that the 3C equipment transmits the data through the transmitting interface.
    Type: Application
    Filed: April 18, 2003
    Publication date: January 1, 2004
    Applicant: Prolific Technology, Inc.
    Inventors: Tsung Hsien Tsai, Chia-Yin Yang
  • Patent number: 6658243
    Abstract: A high frequency power amplifying apparatus is provided with an amplifying section with a plurality of amplifying stages connected in cascade. A power control signal is supplied to the amplifying section through a control terminal so as to control the output of the high frequency power amplifying apparatus. Each of the amplifying stages has a gain smaller than that of a preceding stage. Gain control signals generated from the power control signal are supplied to the respective amplifying stages. Dividing resistors are connected in series with one another between the control terminal and a reference potential so as to divide the voltage of the power control signal to thereby generate a plurality of different gain control signals. Different ones of the gain control signals are supplied to the respective amplifying stages, an absolute value of a voltage of the gain control signal applied to each stage is smaller than that applied to an earlier preceding stage.
    Type: Grant
    Filed: July 22, 2002
    Date of Patent: December 2, 2003
    Assignees: Hitachi, Ltd., Hitachi Tohbu Semiconductor, Ltd.
    Inventors: Hitoshi Akamine, Nobuhiko Ishihara, Tetsuaki Adachi, Yasuhiro Nunogawa, Kogi Sugita
  • Publication number: 20030181184
    Abstract: A radio receiver portion of a transceiver includes a differential amplifier that is used to provide a fast response. A pair of input MOSFETs of the differential amplifier stage are coupled to an active load. A voltage follower circuit is coupled to each output stage of the two stage differential amplifier to drive a current through a load without reducing the output voltage. The voltage follower stages each include a current mirror that replicates current level defined by an input MOSFET of the voltage follower circuit and, by its configuration, a voltage level produced by the differential amplifier to the input MOSFET of the voltage follower circuit. Accordingly, the differential amplifier stage defines the amplification of the circuit while the voltage follower circuits replicate the amplified output with the ability to drive a load.
    Type: Application
    Filed: May 3, 2002
    Publication date: September 25, 2003
    Inventors: Hooman Darabi, Ken Evans
  • Publication number: 20030181179
    Abstract: A method and apparatus for dynamically controlling a programmable gain amplifier (PGA) in a radio receiver to provide a plurality of gain steps thereby providing automatic gain control (AGC) in a receiver intermediate frequency (IF) stage comprises an analogy peak detector formed to including a constant current source and a plurality of MOSFETs all configured to produce an output voltage (DC) whose value reflects a peak amplitude of a received differential quadrature phase shift keyed (QPSK) signal. A first circuit portion generates currents that are proportional to the square of the magnitude of the gate to source voltage for each of a plurality of MOSFETs coupled to receive the differential QPSK signal and a second circuit portion produces a voltage that is equal to the square root of the sum of the squares of the currents produced (drawn) by the MOSFETs of the first circuit portion.
    Type: Application
    Filed: May 3, 2002
    Publication date: September 25, 2003
    Inventor: Hooman Darabi
  • Patent number: 6625433
    Abstract: An automatic gain control (AGC) system controls a receiver having multiple amplifier stages with near constant compression. The AGC system controls gain, and thus compression, of each stage employing information generated by the other stages to generate feedback signals at a system level. A central controller uses threshold detection to monitor signal power at each stage of the receiver signal path as well as overall signal gain. Based on these various signal power measurements, the central controller adjusts signal gain of the input to one or more stages, while maintaining overall signal gain for a constant output signal level. The AGC function may be implemented by switching the gain of each stage's variable amplifier in discrete steps in discrete steps, with the step size being coarser for stages closer to the input signal than those closer to the final output baseband signal.
    Type: Grant
    Filed: September 29, 2000
    Date of Patent: September 23, 2003
    Assignee: Agere Systems Inc.
    Inventors: John R. Poirier, Christopher J. Strobel
  • Publication number: 20030162518
    Abstract: A rapid acquisition gain control system for use in a wireless communication device having an RF input and a receive signal path including RF and baseband portions. The system includes two or more dual-state gain elements, two or more power detectors and control logic. The gain elements are sequentially coupled in the receive signal path of the wireless device and collectively have multiple combined gain states. Each combined gain state corresponds to one of several gain range segments of a predetermined dynamic range. Each power detector is coupled to detect an output power level associated with one of the gain elements. The control logic changes the combined gain state of the gain elements if a change of power level of energy processed in the receive signal path exceeds a predetermined threshold and a different combined gain state is indicated by the power detectors.
    Type: Application
    Filed: June 14, 2002
    Publication date: August 28, 2003
    Inventors: Keith R. Baldwin, Mark A. Webster, Donald K. Whitney, Donald S. Langford, James R. Paviol
  • Publication number: 20030064696
    Abstract: The disclosed invention provides a wireless communication receiver that is able to lessen the effect of noise that accompanies gain change by programmable gain amplifiers. Such noise is produced when direct conversion type programmable gain amplifiers by which gains are adjustable in steps are used for gain control of signals of CDMA or the like in which reception is not intermitted.
    Type: Application
    Filed: September 25, 2002
    Publication date: April 3, 2003
    Inventors: Yukinori Akamine, Hisayoshi Kajiwara, Satoshi Tanaka, Takashi Yano, Hirotake Ishii, Akio Yamamoto, Kazuaki Hori, Kazuhiko Hikasa
  • Patent number: 6498927
    Abstract: A wireless or wired communication system and method is provided including a transmitter and a receiver. A RF communication system in accordance with the present invention includes an apparatus and gain control method between RF receiver and baseband modem in case of a plurality of gain stages inside a receiver. The gain of each stage can be controlled by an integrated gain controller. The gain controller monitors the signal level of each gain stage to place its gain to optimal value. The gain control apparatus and method can be implemented in a digital AGC system. The gain controller accepts a signal implementing gain control and thus there is no stability issue. When distributed gain stages are present inside a related art receiver and separate gain control loops are used, stability issues can arise. In a preferred embodiment of an apparatus and method, the baseband modem decides the amount of gain control and adjusts the gain of certain gain stages by the proper amount.
    Type: Grant
    Filed: August 29, 2001
    Date of Patent: December 24, 2002
    Assignee: GCT Semiconductor, Inc.
    Inventors: Suwon Kang, Jeong-Woo Lee, Joonbae Park
  • Publication number: 20020183029
    Abstract: A high frequency power amplifying apparatus is provided with an amplifying section with a plurality of amplifying stages connected in cascade. A power control signal is supplied to the amplifying section through a control terminal so as to control the output of the high frequency power amplifying apparatus. Each of the amplifying stages has a gain smaller than that of a preceding stage. Gain control signals generated from the power control signal are supplied to the respective amplifying stages. Dividing resistors are connected in series with one another between the control terminal and a reference potential so as to divide the voltage of the power control signal to thereby generate a plurality of different gain control signals. Different ones of the gain control signals are supplied to the respective amplifying stages, an absolute value of a voltage of the gain control signal applied to each stage is smaller than that applied to an earlier preceding stage.
    Type: Application
    Filed: July 22, 2002
    Publication date: December 5, 2002
    Applicant: Hitachi, Ltd.
    Inventors: Hitoshi Akamine, Nobuhiko Ishihara, Tetsuaki Adachi, Yasuhiro Nunogawa, Kogi Sugita
  • Patent number: 6473595
    Abstract: The RF active balun circuit for improving a small-signal linearity in a power amplifying circuit of a CDMA system is provided under the construction of a signal amplifier driven by exterior individual direct current gate power VGG1, VGG2, for receiving a communication input signal AC-In and performing a cascode amplification at a normal operation point where a feedback third-order distortion signal becomes large; a distortion signal generator driven by exterior direct current gate power VGG3 different from the above power, for generating the communication input signal AC-In as the third-order distortion signal by nonlinearity of an active element to cancel the third-order distortion signal amplified in the signal amplifier; and an insulator provided for an insulation from a exterior driving power VGG3 applied to the distortion signal generator, thereby maintaining the small size, lower power and high efficient terminal characteristics by using a gain based on gate voltage of FET and the nonlinearity character
    Type: Grant
    Filed: November 10, 1999
    Date of Patent: October 29, 2002
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Chung Hwan Kim, Cheon Soo Kim, Hyun Kyu Yu, Min Park, Dae Yong Kim
  • Patent number: 6463267
    Abstract: A high frequency power amplifying apparatus is provided with an amplifying section with a plurality of amplifying stages connected in cascade. A power control signal is supplied to the amplifying section through a control terminal so as to control the output of the high frequency power amplifying apparatus. Each of the amplifying stages has a gain smaller than that of a preceding stage. Gain control signals generated from the power control signal are supplied to the respective amplifying stages. Dividing resistors are connected in series with one another between the control terminal and a reference potential so as to divide the voltage of the power control signal to thereby generate a plurality of different gain control signals. Different ones of the gain control signals are supplied to the respective amplifying stages, an absolute value of a voltage of the gain control signal applied to each stage is larger than that applied to an earlier preceding stage.
    Type: Grant
    Filed: April 17, 2000
    Date of Patent: October 8, 2002
    Assignees: Hitachi, Ltd., Hitachi Tohbu Semiconductor, Ltd.
    Inventors: Hitoshi Akamine, Nobuhiko Ishihara, Tetsuaki Adachi, Yasuhiro Nunogawa, Kogi Sugita
  • Patent number: 6400933
    Abstract: An amplifier used in a tuner of video and/or audio equipment has to amplify the received input signal but should add as little as possible noise and distortion to the amplified signal. To improve the operation of the amplifier and includes tuner, the amplifier of the at least two gain stages and switches for short-circuiting a gain stage when it is not necessary for the overall gain value.
    Type: Grant
    Filed: September 20, 1999
    Date of Patent: June 4, 2002
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Clemens H. J. Mensink, Johannes P. M. Van Lammeren
  • Patent number: 6351632
    Abstract: A circuit is disclosed for a receiver front-end for a Personal Handy Phone. The circuit consists of a high frequency mixer consisting of a cascade downmixer, tapped at the center, and followed by a common source intermediate (IF) amplifier. The combination of downmixer and IF amplifier provides a high third order intermodulation suppression and a robust conversion gain. The proposed circuit can also be applied to other FET technologies and other uses.
    Type: Grant
    Filed: October 13, 1998
    Date of Patent: February 26, 2002
    Assignees: Institute of Microelectronics, Oki Techno Centre (Singapore) Pte Ltd
    Inventors: Kai Tuan Yan, Junichi Shibata
  • Publication number: 20020022464
    Abstract: Disclosed is an amplifier apparatus that corrects mismatching of the filter transmission characteristic due to a change in the temperature of the amplifier apparatus itself and thereby stably amplifies the high-frequency signal. The amplifier apparatus converts a signal to be processed into one having an intermediate frequency band to thereby execute amplification processing.
    Type: Application
    Filed: October 11, 2001
    Publication date: February 21, 2002
    Inventors: Takashi Uchida, Masaki Suto, Shoji Fujimoto, Junetsu Urata, Hidefumi Ito
  • Patent number: 6333675
    Abstract: A variable gain amplifier includes multiple unit variable gain amplifiers connected in series which amplify an input signal in accordance with their respective gains and generate a multi-stage amplified signal. A gain control circuit generates voltage control signals, one for each of the unit amplifiers, from a gain control input signal. The control signals control the respective gains of the unit amplifiers such that the gain of the first amplifier in the series is greater than the gain of the last amplifier in the series.
    Type: Grant
    Filed: April 6, 2000
    Date of Patent: December 25, 2001
    Assignee: Fujitsu Limited
    Inventor: Shinji Saito
  • Publication number: 20010034217
    Abstract: A wireless communications device includes an amplifier module configured to amplify a signal. The amplifier module includes a serial arrangement of amplifiers. Each of the amplifiers are designed to operate with increased efficiency for different power level ranges. The amplifiers are connectable via controllable switches. A controller, in communication with the controllable switches, selectively connects the amplifiers to increase the efficiency of the amplifier module.
    Type: Application
    Filed: December 29, 1998
    Publication date: October 25, 2001
    Applicant: MOHY, ABDELGANY F.
    Inventors: ARAVIND LOKE, MOHY F. ABDELGANY, JAMES F. KAMKE
  • Patent number: 6281757
    Abstract: An amplifier for amplifying a high frequency signal includes comprises cascade-connected an input npn transistor and an output npn transistor and a bias circuit to control a base current Ib of the input transistor in order to make a DC component of a collector current Ic of the cascade-connected npn transistors constant. A shunt transistor is further connected between a base electrode of the input npn transistor and one terminal of a power source and is connected so that the base current of the input npn transistor flows through a resistor connected between a base electrode and an emitter electrode of the shunt transistor. By lowering a base voltage of the output npn transistor in response to a gain control signal, the collector current Ic is reduced, and a gain of the amplifier is reduced, and simultaneously the shunt transistor is made in shunting operation.
    Type: Grant
    Filed: May 3, 2000
    Date of Patent: August 28, 2001
    Assignee: Sony Corporation
    Inventor: Hitoshi Tomiyama
  • Patent number: 6275686
    Abstract: An amplifier system for electrical or physical quantities such as voltage or sound converts the quantity in a transducer to a differential phase shift of a high carrier frequency which is an analog equivalent of the quantity and multiplies the differential phase shift by conversion to a low frequency and frequency doubling back to the carrier frequency in successive stages by means of digital logic circuits.
    Type: Grant
    Filed: January 11, 1999
    Date of Patent: August 14, 2001
    Assignee: Imogene Healy
    Inventor: William Hotine
  • Patent number: 6212369
    Abstract: The present invention teaches parallel coupling what are herein termed a “switching stage” and a “steering stage,” thereby arranging the mixer and variable gain amplifier circuitry as a single merged circuit. The merged variable gain mixers of the present invention provide mixing and gain functionality utilizing only that power needed for a basic mixer function and only the transconductance of the basic mixer function (thereby eliminating non-linearities introduced by additional transconductance stages of prior art circuitry). Further, in the merged variable gain mixers described herein, no additional headroom is needed other than what is required by the basic mixer function. The present invention contemplates a variety of merged variable gain mixers including AC and DC coupled merged variable gain mixer of both single and double balanced configuration.
    Type: Grant
    Filed: June 5, 1998
    Date of Patent: April 3, 2001
    Assignee: Maxim Integrated Products, Inc.
    Inventor: Madhu Avasarala
  • Patent number: 6184751
    Abstract: An amplifier circuit (20) uses a series transistor (38) to couple the output of an amplifier (26) to a tuned circuit load (40) and to act as a variable resistance. In one embodiment for a multi-band receiver, multiple series transistors (38, 42) are switched for connecting different tuned circuits (40, 44) to the amplifier's output, and an activated one of the series transistors receives a gate voltage that varies its resistance so as to achieve gain control. An activated series transistors can also provide a resistance that stabilizes the amplifier (26).
    Type: Grant
    Filed: August 17, 1998
    Date of Patent: February 6, 2001
    Assignee: Motorola, Inc.
    Inventors: John Robert Siomkos, Edgar Herbert Callaway, Jr.
  • Patent number: 6181201
    Abstract: The present invention is a novel and improved AGC circuit which is generically configurable to accommodate a variety of AGC amplifier configurations to enhance IP3 performance and reduce required amplifier current, while providing a received power estimate which remains valid regardless of how the gain or attenuation is distributed among the various amplifiers. A generic control circuit maintains this power estimate in a single overall gain amplification value by distributing gain to at least two amplifier stages in response to that value. By programming or hard coding a few key parameters, a generic control circuit can control a wide variety of amplifier configurations. Among the configurations supported are switched LNA, switched variable gain LNA, variable gain, and a decoupled IF and UHF variable gain LNA configuration. The invention is extendable to include multi-stage amplifier configurations.
    Type: Grant
    Filed: October 11, 1999
    Date of Patent: January 30, 2001
    Assignee: Qualcomm Incorporated
    Inventor: Peter J. Black