Abstract: Disclosed is a receiver (200) comprising a signal receiving module (201) configured to receive a first test signal and receive a second test signal after a predefined time period following the completion of the reception of the first test signal, and a calculating module (202) configured to calculate a calibration parameter for calibrating a received RF communication signal, based on the received first test signal and the received second test signal. Correspondingly, a transmitter, a signal transceiver, a signal receiving method, and a signal transmitting method are disclosed.

Abstract: One embodiment is directed to a system comprising a first unit communicatively coupled to a second unit via a communication link. The second unit comprises a reconfigurable circuit, the reconfigurable circuit configured with the first or second circuit configuration image. The second unit further comprises an interface device configured to communicatively couple the second unit to the communication link, the second unit configured so that the interface device is configured with the first or second interface configuration image based on the configuration of the reconfigurable circuit configuration.

Abstract: A wireless receiving device is provided. The wireless receiving device includes a first passive mixer and a common gate amplifier. The first passive mixer receives an oscillation signal. The common gate amplifier is coupled to the first passive mixer, and automatically adjusts the input impedance of the common gate amplifier according to the oscillation frequency of the oscillation signal.

Abstract: A power amplifier circuit includes a transistor having a first terminal that is configured to receive an input signal, a second terminal electrically coupled to ground, and a third terminal configured to transmit a combined amplified signal. The power amplifier circuit further includes a combining signal input path electrically coupled to the second terminal and configured to receive a combining signal and provide the combining signal to the second terminal of the transistor to generate, at least in part, the combined amplified signal.

Abstract: A radio-frequency module comprises a low-noise amplifier including a common source transistor having a gate node that receives a radio-frequency input signal and a drain node that transmits a combined radio-frequency output signal, and a correction signal input path configured to receive a correction signal and provide the correction signal to a source node of the common source transistor to generate, at least in part, the combined radio-frequency output signal.

Abstract: A front-end module (FEM) is disclosed that includes an integrous signal combiner. The integrous signal combiner can process received signals and use a set of resonant circuits to filter signal noise prior to recombination of a plurality of signal bands that form an aggregate carrier signal. These resonant circuits may be placed after a set of low noise amplifiers and can be used to more efficiently reduce noise and parasitic loading within each of a set of signal paths. Each resonant circuit may be configured to filter noise relating to a bandwidth for a signal that is to be combined with the signal of the signal path that includes the resonant circuit. The signals may be combined using a dynamic impedance matching circuit. In some implementations, the integrous signal combiner can be a tunable integrous signal combiner with resonant circuits that may be reconfigurable or dynamically configurable.

Abstract: A network device comprising, a first radio module configured to transmit and receive first radio signals in a first frequency band, a first antenna array configured to transmit and receive the first radio signals for the first radio module in the first frequency band, a second radio module configured to transmit and receive second radio signals in the first frequency band, a second antenna array configured to transmit and receive the second radio signals for the second radio module in the first frequency band, wherein, in operation, the first radio module and the second radio modules function concurrently using the first frequency band while at least 40 dB of antenna isolation is maintained between the first antenna array and the second antenna array.

Abstract: The method determines an input phase differential (??) between two input signals. A phase detector is provided that has pairs of transistors and a first impedance (R1) connected to a first branch carrying a first signal (Iout_left) and a second impedance (R2) connected to a second branch carrying a second signal (Iout_right). The first signal (Iout_left) in the first branch is set as a first sum of a common mode output signal (Icm) and a differential mode output signal (Idm). The second signal (Iout_right) in the second branch is set as a second sum of the common mode output signal (Icm) minus the differential mode output signal (Idm). A relationship between the first impedance (R1) and the second impedance (R2) is adjusted until a differential mode output voltage (Vdm) of the phase detector is zero. The input phase differential (??) is determined when the differential mode output voltage (Vdm) is zero.

Abstract: A cascode amplifier circuit comprises a first spiral inductor coupled to a source of a first transistor; a second spiral inductor coupled to a drain of a second transistor; a third inductor connecting the first transistor to the second transistor; a first capacitor coupled in parallel to the third inductor forming a bandpass filter; and a second capacitor coupled in parallel to the second spiral inductor forming a resonant circuit, wherein the resonant circuit oscillates at a center frequency.

Abstract: A wireless Local Area Network (WLAN) device includes a first transceiver and a second transceiver. The first transceiver is configured to communicate on a first frequency band, and includes a first Multi-Chip Module (MCM). The first MCM includes a first Radio-Frequency Integrated Circuit (RFIC) for transmitting and receiving on the first frequency band and a first BaseBand Integrated Circuit (BBIC). The second transceiver is configured to communicate on a second frequency band, and includes a second MCM. The second MCM includes a second RFIC for transmitting and receiving on the second frequency band and a second BBIC that is identical to the first BBIC.

Abstract: A wireless communication unit includes at least one antenna port; a transmitter and a receiver operably coupled to the at least one antenna port via a duplexer; wherein the duplexer includes a dynamically reconfigurable phase shift network that includes: at least one tunable radio frequency (RF) component; and at least one switch operably coupled to the tunable RF component and controllable to reconfigure the dynamically reconfigurable phase shift network to selectively support both normal and reverse duplexer modes of operation for RF signals passing there through.

Abstract: In an example, apparatus comprises: a low noise amplifier (LNA) including a first transconductor having an input to receive a differential input radio frequency (RF) signal and an output to output a differential amplified RF signal to a RF signal path; and a second transconductor having an input coupled to a first common mode node and a second common mode node to receive a test tone signal and an output to output an amplified test tone signal to the RF signal path.

Abstract: A calibration circuit for calibrating harmonics in a mixer. The calibration circuit includes an RF signal path configured to receive an RF signal corresponding to an output of the mixer, selectively receive a test signal injected into the RF signal path, and provide feedback to the mixer according to the RF signal and/or the test signal. The test signal corresponds to a selected harmonic of the harmonics in the mixer. A measurement circuit is configured to detect, in the output of the mixer, the test signal injected into the RF signal path. A calibration module is configured to receive a feedback signal indicative of the test signal detected in the output of the mixer and, based on the feedback signal indicative of the test signal detected in the output of the mixer, adjust a duty cycle associated with the mixer to calibrate the selected harmonic.

Abstract: A method of configuring at least one frequency dependent (FD), in-phase/quadrature (I/Q), imbalance compensation filter within a radio frequency (RF) module is described. The method includes applying an input signal to an input of the RF module, receiving a filtered I-path signal for the RF module and deriving at least one I-path filtering estimate value therefrom, receiving a filtered Q-path signal for the RF module and deriving at least one Q-path filtering estimate value therefrom, and configuring the at least one FD I/Q imbalance compensation filter based at least partly on at least one ratio between the derived I-path and Q-path filtering estimate values.

Abstract: There is described a time-to-digital conversion scheme using an arrangement of delay elements based Time-to-Digital Converter, TDC (20), wherein dithering is built in the digital domain and introduced in the analog domain as a modulation of a supply voltage (TDC-supply) supplying delay elements of the TDC, each having a propagation delay which exhibits a dependency to their supply voltage.

Abstract: A circuit for down-converting an RF signal to a baseband signal includes a trans-admittance amplifier adapted to receive the RF signal and generate in response a pair of differential current signals. The circuit further includes a trans-impedance amplifier having at least four mixers and at least four linear amplifiers. The four mixers frequency down-convert the pair of differential current signals to generate four pairs of differential baseband current signals, wherein each pair of the differential baseband current signals has a different phase and is associated with each of the linear amplifiers. Additionally, the circuit includes a summing block that generates an in-phase signal using a first weighted sum of the four different baseband current signals and a quadrature signal using a second weighted sum of the four different baseband current signals. The circuit further includes an analog-to-digital converter for converting the in-phase and quadrature signals to respective digital representations.

Abstract: The present disclosure includes apparatus, systems, and techniques relating to receiver image cancellation. A described technique includes receiving a downconverted signal in a digital domain, the downconverted signal including an in-phase signal and a quadrature signal; generating a first signal of a signal channel based on the downconverted signal; generating a second signal of an image channel based on the downconverted signal; filtering the second signal using first weights to produce a pilot training signal; filtering the second signal using second weights to produce an image cancellation signal; generating an output signal by subtracting the image cancellation signal from the first signal to resolve the desired signal; updating the first weights based on the first weights, the second signal, the pilot training signal, and a pilot signal; and updating the second weights based on the second weights, the output signal, and the pilot training signal.

Abstract: Embodiments for processing signals are disclosed. In one embodiment, a method includes receiving signals from at least two non-contiguous channels, where the at least two non-contiguous channels are within a predetermined bandwidth, and where each of the at least two non-contiguous channels has a center frequency. The method also includes utilizing an average of the center frequencies of the at least two non-contiguous channels to down convert the at least two non-contiguous channels to a combined intermediate frequency (IF) channel that has a center frequency that is an average of a difference between the center frequencies of the at least two non-contiguous channels. The method also includes down converting the combined IF channel to a combined channel at a baseband frequency. The method also includes recovering the at least two non-contiguous channels from the combined channel at a baseband frequency utilizing an upper sideband and lower sideband recovery mechanism.

Abstract: A digital signal processing circuit includes a combining stage and an output stage. The combining stage is arranged to receive a plurality of non-overlapping clock signals having a same frequency but different phases, receive a plurality of first input bit streams, and generate a first output bit stream by combining the first input bit streams according to the non-overlapping clock signals. The output stage is arranged to generate an output according to the first output bit stream. A digital signal processing method includes: receiving a plurality of non-overlapping clock signals having a same frequency but different phases; receiving a plurality of first input bit streams; generating a first output bit stream by combining the first input bit streams according to the non-overlapping clock signals; and generating an output according to the first output bit stream.

Abstract: Certain aspects of a method and system for mitigating effects of pulling in multiple phase locked loops in multi-standard systems may include selecting an input frequency range of operation at a voltage controlled oscillator based on a particular wireless band of operation in a system that handles a first wireless communication protocol and a second wireless communication protocol. An image rejection mixer may be enabled to generate an output signal for the particular wireless band of operation based on mixing a plurality of received signals within a selected frequency range. An in-phase (I) component and a quadrature (Q) component of the generated output signal may be generated by utilizing a RC-CR quadrature network.

Abstract: An electronic device comprising a passive harmonic-rejection mixer (400) and a calibration circuitry (425). The passive harmonic rejection mixer has an input (102) connected to several sub-mixer stages (402), and the sub-mixer stages are connected to a summing module (406, 408) for generating the output (104). Each sub-mixing stage comprises a gating module (414), an amplifier (416), and a weighting module (418), the gating module selectively passing the input signal or the input signal with inverted polarity under the control of control signals. The calibration circuitry (425) is adapted to input a reference signal (430) to the input of the mixer, receive an output signal (104) from the output of the mixer, and set the weights (K1, K2, K3, K4) of the weighting modules to make the output signal match an expected output signal.

Abstract: A receiving apparatus includes: a local oscillator to output first- and second-local-oscillator signals whose phases are orthogonal to each other; a mixer to output first- and second-intermediate-frequency signals; a first filter to allow a component from a desired signal to pass therethrough, and eliminate a component from an image signal having a frequency symmetrical with that of the desired signal, in the first- and second-intermediate-frequency signals; a second filter to allow a component from the image signal to pass therethrough, and eliminate a component from the desired signal, in the first- and second-intermediate-frequency signals; a comparator to compare levels between output signals of the first and second filters; and a control unit to switch a frequency of the first- and second-local-oscillator signals to a difference frequency between a frequency of the desired signal and the intermediate frequency or a sum frequency thereof, according to a comparison result of the comparator.

Abstract: A polyphase harmonic rejection mixer, comprising a plurality of stages following each other; wherein a first stage is arranged to perform at least frequency conversion; and a second stage is arranged to perform at least selective weighting and combining; wherein at least two of the plurality of stages are arranged to perform at least combining. In an embodiment, the first stage (28) comprises three single-ended gain blocks (10, 12, 14), arranged to perform selective weighting, frequency conversion and combining; and a second stage (30) following the first stage (28) and arranged to perform selective weighting and combining. The second stage (30) may reduce the number of phases output by the first stage (28) and may output (32) a complex differential down converted signal. The mixer may be directly interfaced to an antenna of an LNA-less receiver without weighting in the first stage. The mixer may be included in a software-defined radio.

Abstract: Digital-to-analog conversion in a communication device typically results in superimposed spectral images in the frequency spectrum of the analog waveform. These superimposed spectral images can distort the analog waveform and potentially violate the spectral mask and the constraints on out-of-band emissions set by the FCC. The communication device can be configured to implement a spectral image cancellation unit with feed-forward architecture to minimize the spectral images in the frequency spectrum of the analog waveform. The spectral image cancellation unit can generate a spectral image error signal comprising the spectral images at one or more spectral image frequencies. The spectral image cancellation unit can then subtract the spectral image error signal from the analog waveform to reduce spectral image components of the analog waveform and to yield an output signal for transmission.

Abstract: A transistor-based switch is coupled to a replica circuit that includes transistor circuitry similar to that of the switch. The replica circuit biases a switched transistor to promote linear operation of the switch.

Abstract: An arrangement for processing a non-symmetrical signal includes an apparatus configured to balance and filter an image frequency of a nominal frequency of the non-symmetrical receiving signal. The apparatus includes a modified Boucherot bridge having a series or parallel oscillating circuit that replaces inductive or capacitive components of a conventional Boucherot bridge, such that the modified Boucherot bridge is in the harmonized state with the image frequency to be faded out and has a predetermined impedance with the nominal frequency on its symmetrical output terminals. The nominal frequency has a predetermined impedance on its symmetrical output terminals. The nominal frequency is transmitted as a signal balanced to ground to the symmetrical output terminals of the modified Boucherot bridge.

Abstract: Disclosed is a harmonic rejection mixer that makes it possible to suppress high-frequency response, while keeping the number of gm elements from increasing. In a harmonic rejection mixer that regulates the waveform of an output signal by mixing outputs of multiple mixers that are connected in parallel with the latter stage of multiple gm elements, some of the gm elements are shared by I phase and Q phase by using a control signal with a duty ratio of less than 50% to drive at least some of the mixers, and then using the period in which the I-phase mixers are inactive to activate the Q-phase mixers.

Abstract: Systems and methods for implementing a down-conversion mixer with signal processing are disclosed.

Abstract: Methods and systems for a transmitter LOFT cancellation scheme that maintains IQ balance are disclosed. Aspects of one method may include providing current compensation to both differential inputs of a mixer for each of I and Q channels. An initial current compensation of X units may be provided, followed by subsequent compensation as needed. The initial compensation may be provided to each differential input of the mixers used for I and Q channels. The subsequent current compensation for the I channel may be independent of the subsequent current compensation for the Q channel. Subsequent current compensation to a first differential input for a mixer may be increased by Y units while decreasing current compensation to the second differential input of the mixer by Y units. In this manner, the DC common mode level for the mixer may remain the same at the initial DC compensation current of X units for both mixers.

Abstract: Image rejection calibration includes initializing the calibration mode by applying to quadrature mixers, in place of the wanted RF input, an RF source in the frequency range of the wanted RF input, sensing the power output from the poly-phase filter, developing gain adjust and phase adjust correction values in response to the power output and adjusting in accordance with the correction values the gain of the quadrature signals from the quadrature mixers to the poly-phase filter and the phase of local oscillator quadrature signals from the local oscillator to the quadrature mixers to reduce the power output.

Abstract: Demodulator includes reception quality evaluation circuit for evaluating the quality of a received signal by comparison with a first reference value, and outputting an evaluation signal; and driving circuit receiving the evaluation signal. If reception quality evaluation circuit evaluates that the quality of the received signal is acceptable, power supply from driving circuit to DC offset control loop is stopped. This offers a high-frequency receiver that reduces power consumption.

Abstract: Provided is a wideband receiver that has a smaller area and consumes less power and can prevent harmonic mixing occurring due to an increase in the number of communications systems using wideband. A wideband receiver according to an aspect of the invention may include: an front-end unit receiving and performing low-pass filtering on a wideband input signal in a continuous-time domain; and a down-conversion unit sampling and holding an output signal of the front-end unit according to a local oscillator signal and performing low-pass filtering on the output signal in a discrete tie domain.

Abstract: A harmonic rejection mixer unit is provided which comprises an input (RF), at least one harmonic rejection unit (HRU) with at least two transistor units (T3a, T3b; T4a, T4b) for multiplying an input signal from the input (RF) with a multiplication signal (ELO). The harmonic rejection mixer unit furthermore comprises a transistor control signal generating unit (GGU) for generating transistor control signals (GS1-GS4) for the at least two transistor units (T3a, T3b; T4a, T4b) of the at least one harmonic rejection unit (HRU) by deriving the transistor control signals (GS1-GS4) from a local oscillator signal (LO). The transistor control signals (GS3, GS4) for the at least two transistor units (T3a, T3b; T4a, T4b) are generated with a duty cycle of <50% and are generated such that the shape of the multiplication signal ELO) is achieved by a constructive summation of the output signals from the transistor units (T3a, T3b; T4a, T4b).

Abstract: An incompressible receiver for minimizing undesired higher-order nonlinear distortion products includes a first receiver path configured to receive an input signal having at least one non-baseband frequency. A second receiver path is also configured to receive the input signal. The second receiver path includes at least one odd-order nonlinear distortion reference component and at least one even-order nonlinear distortion reference component. The distortion reference components are configured to be in an “on” state or in an “off” state. A combining element is configured to combine input signals from the first and second receiver paths such that the higher-order nonlinear distortion signals are substantially attenuated at an output of the combining element. An incompressible receiver that has an odd-order nonlinear distortion reference generator including a cubic term and at least one additional term of order greater than 3 and an incompressible receiver front end amplifier (IRFEA) are also described.

Abstract: A demodulator for demodulating a digital broadcast signal and a demodulation method thereof. A QPSK demodulator of a digital broadcast reception system includes an in-phase/quadrature (I/Q) detector. The I/Q detector generates a baseband I signal and a baseband Q signal by multiplying a modulated QPSK signal by an I/Q carrier signal. A bandwidth adjustable first filter receives the baseband I signal and the baseband Q signal generated by the I/Q detector and rejects imaginary noise included in the received signals. A data restoration unit restores original data before the signals output from the first filter are QPSK modulated.

Abstract: Disclosed herein is a radio receiver including: an oscillator circuit including a phase-locked circuit and a voltage-controlled oscillator circuit; a first frequency divider circuit; a frequency converter circuit; a signal adding circuit; a test signal generating circuit including at least one second frequency divider circuit; and a controlling section configured to set frequency dividing factors.

Abstract: A notched SAW image frequency rejection filter system includes a SAW filter having an input, an output and a ground output and an impedance matching network including a first matching inductance connected to the SAW filter output and a second matching inductance connected to the ground output of the SAW filter; the SAW filter having an inherent internal capacitance that produces a predetermined capacitive leakage current at the image frequency; an inherent internal inductance that produces an inductance leakage current at the image frequency; and a boosted inherent parasitic ground inductance at the ground output of the SAW filter for generating a voltage across the second matching inductance to produce a compensation current which is substantially opposite in phase and substantially matched in magnitude with the capacitive leakage current for reducing the capacitive leakage current and increasing the image frequency rejection.

Abstract: A radio frequency (RF) receiver includes a local oscillator (LO) module that receives a control signal and that generates a LO signal at a LO frequency that is based on the control signal, a LO mixer module that generates an intermediate frequency (IF) signal based on a radio frequency (RF) signal and the LO signals, a complex intermediate frequency (IF) mixer module that generates a baseband signal based on the IF signal and an IF oscillator signal, and a channel monitoring module that generates the control signal based on the baseband signal.

Abstract: In one aspect this invention provides a radio frequency receiver for coupling to an antenna. The receiver includes a downconversion mixer, an amplifier having an input coupled to the antenna and an output coupled to a first input of the mixer for providing a received frequency signal to the mixer and a voltage controlled oscillator having an output coupled to a second input of the mixer for providing a mixing frequency signal to the mixer. In the preferred embodiments the components of the amplifier and the voltage controlled oscillator are arranged to exhibit a substantially identical resonant circuit topology and are implemented in the same integrated circuit. In the preferred embodiments the amplifier and the voltage controlled oscillator each include calibration circuitry coupled to a calibration signal for compensating for integrated circuit component value variations, and where a calibration signal used for the voltage controlled oscillator is used as well for the amplifier.

Abstract: A method of increasing linearity of an RF signal receive path includes measuring a signal amplified by the receive path. The receive path has a local oscillator operating at an LO frequency and a ground. An error signal is determined from the amplified signal, the error signal being representative of the nonlinearity. An anti-spur tone is injected into the ground. The anti-spur tone has a frequency about equal to the LO frequency and an amplitude and phase that are determined to increase the linearity of the receive path.

Abstract: Systems and methods for demodulating a plurality of contiguous channels contained within a bandlimited portion of a radio-frequency (RF) input signal are provided. In an embodiment, the bandlimited portion of the RF input signal is down-converted to baseband. After down-conversion, the bandlimited portion overlaps at baseband with a mirror image of the bandlimited portion. The plurality of contiguous channels within the down-converted signal similarly overlap at baseband and subsequently occupy a bandwidth substantially equal to half that required before down-converting. Image rejection is performed in the digital domain to recover each of the plurality of overlapping channels.

Abstract: A method and system for calibrating a plurality of modules in a communication system is provided. The method may include selecting a plurality of modules with at least one output signal and calibrating an amplitude of each selected module to be within a specified range if the amplitude is out of the specified range via a gain control processing circuit of the selected module, wherein the plurality of modules may be calibrated in an order starting with a first module located at an input of a signal path and ending with a module located at an output of the signal path. The DC component and amplitude of the envelope of the output signal may be detected by circuitry within the selected module. Muxes may be utilized to route the DC component and amplitude of the envelope to a feedback control processing circuit.

Abstract: The present invention relates to image rejection calibration in a radio frequency (RF) receiver. In one embodiment, the receiver includes a receiver front-end and an image rejection calibration system. The image rejection calibration system provides a first test signal to an RF input of the receiver front-end, and obtains first measurements of a quadrature output signal output from the receiver front-end while the first test signal is applied to the RF input. The image rejection calibration system then applies a second test signal to the RF input of the receiver front-end that is approximately 90 degrees out-of-phase with the first test signal, and obtains second measurements of the quadrature output signal while the second test signal is applied to the RF input. Based on the first and second measurements, the image rejection calibration system determines an amplitude error and a phase error of the receiver front-end.

Abstract: A band pass filter includes a first micro-strip port for receiving a radio-frequency signal, a second micro-strip port for outputting a filtered radio-frequency signal and comprising at least one resonating cavity formed for enhancing rejecting effect of image frequency corresponding to the filtered radio-frequency signal, and a plurality of resonators arranged between the first micro-strip port and the second micro-strip port for performing band pass filtering on the radio-frequency signal to generate the filtered radio-frequency signal.

Abstract: Systems and techniques relating to image cancellation in received communications signals are described. A described technique includes receiving a communications signal including a desired signal and an image signal; generating a leakage tracing signal at a frequency band of the image signal, the leakage tracing signal including a noise signal, a frequency of the leakage tracing signal being within the frequency band of the image signal; and removing the image signal from a signal that is based on the communications signal and the leakage tracing signal to resolve the desired signal, where the removing is based on an addition of the leakage tracing signal to the communications signal. Removing the image signal can include using one or more weights to control one or more filters to resolve the desired signal. The one or more weights can be determined based on the noise signal.

Abstract: The employment of cascading in connection with improving mixer isolation in a Gilbert mixer circuit. In this vein, there is broadly contemplated herein, inter alia, the provision of a mixer suitable for use in a direct-conversion radio receiver operating in the 57-64 GHz industrial, scientific, and medical (ISM) band. Such a receiver may be integrated along with a transmitter entirely on a silicon integrated circuit and can be used to receive and transmit data signals in such applications as wireless personal-area networks (WPANs). Numerous other applications, of course, are available for a mixer with improved LO-to-RF isolation, particularly at millimeter-wave frequencies where high LO-to-RF isolation is difficult to achieve.

Abstract: A wireless communication system receiver compensates a received signal containing an IQ gain imbalance prior to performing frequency correction. The IQ gain imbalance in the signal is estimated after frequency correction, providing an IQ gain imbalance estimate for subsequent IQ gain imbalance compensation. The IQ gain imbalance estimation includes formulating a plurality of hypotheses of phase error between I and Q signal components, and taking as the actual phase error the hypothesis that yields the maximum power ratio between I and Q signal components. The maximum power ratio is differentiated with respect to the IQ imbalance estimate. The IQ gain imbalance estimate is updated as a function of its prior value(s), the maximum power ratio, and the derivative of the maximum power ratio.

Abstract: Methods, and other embodiments associated with signal filtering are described. According to one embodiment, an apparatus includes an analog-to-digital converter that generates a first digital component and a second digital component from an analog signal. A filter filters the first digital component and the second digital component to substantially align the phase of the first digital component and the phase of the second digital component.

Abstract: A method of processing an in-phase signal component and a quadrature signal component of a low intermediate frequency (LIF) signal includes estimating and correcting an amplitude imbalance between a digitized in-phase signal component and a digitized quadrature signal component at a first point in time, and estimating and correcting a phase imbalance between the digitized in-phase signal component and the digitized quadrature signal component at a second point in time in response to the correcting process. The digitized in-phase signal component corresponds to the in-phase signal component at the first point in time and the digitized quadrature signal component corresponds to the quadrature signal component at the first point in time. The second point in the time is subsequent to the first point in time.

Abstract: A system for controlling carrier leakage in a communications device includes a first mixer unit operable to receive and convert a first signal into a second signal having a higher frequency than the first signal, and to transmit the second signal, a second mixer unit operable to receive, convert the second signal into an in-phase signal and a quadrature signal each having lower frequency than the second signal, and transmit them, a processor coupled to the first mixer and the second mixer to perform a leakage reduction procedure by receiving and sampling the in-phase signal and the quadrature signal, determining that a result from the sampling is not equal to a predetermined value, initiating a transmission of a direct current offset signal to the first mixer unit, and adjusting a voltage of the direct current offset signal until a next result of the sampling approximately equals the predetermined value.