With Material Removal By Etching, Laser Ablation, Or Mechanical Abrasion Patents (Class 505/410)
  • Patent number: 6097417
    Abstract: A vacuum system can remove ablated particles from an internal drum platesetter which has a drum for supporting a photosensitive medium, a carriage moveable in a direction parallel to a longitudinal axis of the drum, and a laser mounted onto the moveable carriage for generating a beam to create an image on the medium during movement of the carriage, the beam ablating particles of the medium during creation of the image. The vacuum system includes: a vacuum head fixedly attached to the moveable carriage, and having at least one chamber for receiving the ablated particles through a slot located proximate to a periphery of the vacuum head; and an exhaust system connected to the vacuum head and including ductwork, at least one fan and at least one filter, for extracting the ablated particles from the at least one chamber of the vacuum head.
    Type: Grant
    Filed: September 21, 1998
    Date of Patent: August 1, 2000
    Assignee: Agfa Corporation
    Inventors: Donald B. Richardson, Jr., Robert D. Olenio, Jeffrey Knox, Nicholas Stefanidakis, Behrouz Abedian
  • Patent number: 6060433
    Abstract: The invention provides a structure comprising a high temperature superconducting layer deposited on a ceramic polycrystalline ferrite plate suitable for making commercial microwave devices. In one embodiment, the high temperature superconductor is yttrium barium copper oxide (YBCO), the ferrite is yttrium iron garnet (YIG), and the microwave device is a phase shifter. The method of making this embodiment comprises, polishing the YIG plate, depositing biaxially oriented yttria-stabilized zirconia (YSZ) to form a crystalline template using an ion-beam-assisted-deposition technique, depositing a CeO.sub.2 lattice matching buffer layer using pulsed laser deposition, depositing YBCO using pulsed laser deposition, and annealing the YBCO in oxygen. Etching the YBCO to form a meanderline patterned waveguide results in a high figure-of-merit microwave phase shifter when the device is cooled with liquid nitrogen and an external magnetic field is applied.
    Type: Grant
    Filed: January 26, 1999
    Date of Patent: May 9, 2000
    Assignee: NZ Applied Technologies Corporation
    Inventors: Yi-Qun Li, Hua Jiang
  • Patent number: 5981443
    Abstract: A bicrystal substrate is formed by joining end faces of a first single crystal substrate and a second single crystal substrate, the end faces having different crystal orientations. A high critical temperature superconducting thin film is then epitaxially formed on the bicrystal substrate. The superconducting thin film is etched so as to form a first superconducting electrode on the first single crystal substrate, a second superconducting electrode on the second single crystal substrate, and a superconducting bridge across a joint between the first and second single crystal substrates and connecting the first electrode and the second electrode. A conductive film is formed on the superconducting bridge by vapor deposition, and is then etched so as to form a weak link on a part of the superconducting bridge over the joint.
    Type: Grant
    Filed: August 26, 1998
    Date of Patent: November 9, 1999
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Zhongmin Wen
  • Patent number: 5952269
    Abstract: A method for forming a superconducting device using a selective etching technique on superconducting thin films. The method utilizes rapid etching which combines ion implantation with chemical etching. The portions of the superconducting film to be retained are masked from the ion implantation process. The chemical etching process then removes the implanted portions of the superconducting film at a much faster rate than the portions not implanted so that only the un-implanted portions remain. The resulting superconducting devices can be used, e.g., as nanostructures and nano tips, bolometers, multilayer RF coils, microwave waveguides and filters.
    Type: Grant
    Filed: January 23, 1998
    Date of Patent: September 14, 1999
    Assignee: The Trustees of Columbia University in the City of New York
    Inventors: Qiyuan Ma, Mingling Chen
  • Patent number: 5916848
    Abstract: An edge junction 10 with reduced parasitic inductance. The edge junction 10 has a laminar structure 22 including: a substrate 14; a first superconductive layer 12 deposited on a substrate 14; a first dielectric layer 16 deposited on the first superconductive layer 12; a second superconductive layer 18 deposited on the first dielectric layer 16; and a second dielectric layer 20 deposited on the second superconductive layer 18. The first and second superconductive layers 12 and 18 and the first and second dielectric layers 16 and 20 form a first laminar structure 22 having a planar segment 24 and a self-aligned ramp segment 26, the ramp segment 26 having a constantly-decreasing thickness and being connected to the planar segment 24 at an angle .theta. thereto.
    Type: Grant
    Filed: October 8, 1997
    Date of Patent: June 29, 1999
    Assignee: TRW Inc.
    Inventor: Dale J. Durand
  • Patent number: 5840204
    Abstract: A method for patterning an oxide superconductor thin film, comprising a step of forming a SiO.sub.2 layer on the oxide superconductor thin film, patterning the SiO.sub.2 layer so as to form the same pattern as that of the oxide superconductor thin film which will be patterned, etching the oxide superconductor thin film by using the patterned SiO.sub.2 layer as a mask, and removing the SiO.sub.2 layer by using a weak HF solution, a buffer solution including HF or a mixture including HF.
    Type: Grant
    Filed: April 5, 1995
    Date of Patent: November 24, 1998
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Hiroshi Inada, So Tanaka, Michitomo Iiyama
  • Patent number: 5789346
    Abstract: Method for manufacturing a superconducting device including forming on a surface of a substrate a non-superconducting oxide layer, a first oxide superconductor thin film, etching the first oxide superconductor thin film so as to form a concave portion, implanting ions to the first oxide superconductor thin film at the bottom of the concave portion so as to form an insulating region such that the first oxide superconductor thin film is divided into two superconducting regions by the insulating region, and forming a second oxide superconductor thin film on the insulating region and the two superconducting regions, which is continuous to the two superconducting regions.
    Type: Grant
    Filed: May 20, 1996
    Date of Patent: August 4, 1998
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Takao Nakamura, Hiroshi Inada, Michitomo Iiyama
  • Patent number: 5750474
    Abstract: A superconductor-insulator-superconductor Josephson tunnel junction, comprising: a single crystalline substrate having a perovskite crystal structure; a template layer formed of a b-axis oriented PBCO thin film on the substrate; and a trilayer structure consisting of a lower electrode, a barrier layer and an upper electrode, which serve as a superconductor, an insulator and a superconductor, respectively, the lower electrode and the upper electrode each being formed of an a-axis oriented YBCO superconducting thin film and having an oblique junction edge at an angle of 30.degree. to 70.degree., the barrier layer being formed of an insulating thin film between the two superconducting electrodes, can be operated at a low power with an exceptional speed in calculation and data processing.
    Type: Grant
    Filed: September 5, 1996
    Date of Patent: May 12, 1998
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Gun-Yong Sung, Jeong-Dae Suh
  • Patent number: 5739084
    Abstract: A method for fabricating a superconducting device with a substrate, a first oxide superconductor thin film, a barrier layer, a diffusion layer, and a second oxide superconductor thin film. The first oxide superconductor thin film with a very thin thickness is formed on the principal surface of the substrate. The barrier layer and the diffusion source layer are formed on a portion of the first oxide superconductor thin film. The second oxide superconductor thin film is grown on an exposed surface of the first oxide superconductor thin film until the barrier and diffusion source layers are embedded in the second oxide superconductor thin film, so that a material of the diffusion source layer is diffused into the second oxide superconductor thin film.
    Type: Grant
    Filed: January 2, 1997
    Date of Patent: April 14, 1998
    Assignee: Sumitomo Electric Industries Ltd.
    Inventors: Takao Nakamura, Hiroshi Inada, Michitomo Iiyama
  • Patent number: 5702565
    Abstract: An improved dielectric layer of an electroluminescent laminate, and method of preparation are provided. The dielectric layer is formed as a thick layer from a ceramic material to provide:a dielectric strength greater than about 1.0.times.10.sup.6 V/m;a dielectric constant such that the ratio of the dielectric constant of the dielectric material to that of the phosphor layer is greater than about 50:1;a thickness such that the ratio of the thickness of the dielectric layer to that of the phosphor layer is in the range of about 20:1 to 500:1; anda surface adjacent the phosphor layer which is compatible with the phosphor layer and sufficiently smooth that the phosphor layer illuminates generally uniformly at a given excitation voltage.The invention also provides for electrical connection of an electroluminescent laminate to voltage driving circuity with through hole technology. The invention also extends to laser scribing the transparent conductor lines of an electroluminescent laminate.
    Type: Grant
    Filed: May 23, 1995
    Date of Patent: December 30, 1997
    Assignee: Westaim Technologies, Inc.
    Inventors: Xingwei Wu, James Alexander Robert Stiles, Ken Kok Foo, Phillip Bailey
  • Patent number: 5672569
    Abstract: A superconducting circuit having patterned superconducting wiring lines. Each wiring line consists of at least one portion (2') of the thin film (2) of an oxide superconductor deposited on a substrate (1). The portion (2') has a predetermined crystal orientation and the remaining portions (2") have a different crystal orientation or changed to non-superconductor. The superconducting circuit has a planar surface.In variations, two different wiring lines (21, 22) each having a different crystal orientation are produced at different portions of a thin film of oxide superconductor, so that superconducting current flow separately through two different portions in a common thin film.
    Type: Grant
    Filed: March 8, 1995
    Date of Patent: September 30, 1997
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Takao Nakamura, Hiroshi Inada, Michitomo Iiyama
  • Patent number: 5650377
    Abstract: Fine epitaxial patterns of yttrium barium copper oxide on a strontium titanate substrate are provided by using a silicon nitride mask to define the pattern to be formed. A thin film of yttrium barium copper oxide is placed on the silicon nitride mask and exposed portions of strontium titanate substrate. Where the yttrium barium copper oxide is in contact with the silicon nitride mask, it is nonepitaxial in crystal structure. Where the yttrium barium copper oxide contacts the strontium titanate substrate in the openings, it is epitaxial in structure forming fine patterns that become superconducting below the critical transition temperature. A channel can be formed in the strontium titanate substrate. The epitaxial yttrium barium copper oxide pattern is formed in this channel to minimize possible exposure to the silicon nitride mask.
    Type: Grant
    Filed: October 5, 1993
    Date of Patent: July 22, 1997
    Assignee: International Business Machines Corporation
    Inventors: Dieter Paul Kern, Robert Benjamin Laibowitz, Kim Yang Lee, Mark I. Lutwyche
  • Patent number: 5646096
    Abstract: Patterned superconducting wiring lines each consisting of a portion of a thin film of an oxide superconductor deposited on a flat substrate, the portion having a predetermined crystal orientation (a-axis or c-axis orientation) with respect to a flat surface of the substrate, remaining portions of the thin film of the oxide superconductor having a different crystal orientation (c-axis or a-axis orientation) from the portion and/or consisting of an insulation zones. Both of the portion and the remaining portions have a substantially identical thickness so that the thin film has a substantially flat planar surface.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: July 8, 1997
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Hiroshi Inada, Takao Nakamura, Mitchimoto Iiyama
  • Patent number: 5646095
    Abstract: A method for selectively etching insulative material composed of SrTiO3 or MgO in the presence of a copper oxide perovskite superconductive material includes treating the insulative material with a liquid selective etchant solution containing hydrogen fluoride in water for a period of time, the insulative material being etched at a substantially faster rate than the superconductive material etch rate, then treating the superconductive material exposed to the insulative selective with another etchant to remove a surface layer.
    Type: Grant
    Filed: October 5, 1994
    Date of Patent: July 8, 1997
    Assignee: International Business Machines Corporation
    Inventors: Walter Eidelloth, William Joseph Gallagher
  • Patent number: 5599465
    Abstract: A method is provided for producing superconducting Josephson devices using a chemical etching solution which comprises forming a mask on a predetermined portion of a MgO substrate, and immersing the MgO substrate having the mask in an aqueous acid solution in which the volume ratio of phosphoric acid to sulfuric acid is approximately 10:1 or more, so as to form a step at the boundary between the masked region and the unmasked region.
    Type: Grant
    Filed: November 28, 1994
    Date of Patent: February 4, 1997
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Chan H. Park, Jin P. Hong
  • Patent number: 5578226
    Abstract: A multi-layer superconductive interconnect structure includes a first multi-layer substrate with a first superconducting layer (SL) deposited on a first epitaxial substrate and a first glue dielectric layer (GDL) on the first SL. A second multi-layer substrate includes a second SL deposited on a second epitaxial substrate and a second GDL on said second SL. The first GDL and the second GDL are clamped and cured together to form a composite substrate.
    Type: Grant
    Filed: July 18, 1995
    Date of Patent: November 26, 1996
    Assignee: TRW Inc.
    Inventors: Hugo W. Chan, Arnold H. Silver
  • Patent number: 5571778
    Abstract: A superconductor junction material is disclosed which comprises a substrate of a single crystal, and at least flux flow element, and optionally at least one Josephson junction element, provided on the surface, each of the flux flow and Josephson junction elements being formed of a superconducting oxide layer having a weak link. The flux flow and Josephson junction elements are prepared by vacuum deposition at different oxygen partial pressures.
    Type: Grant
    Filed: March 30, 1995
    Date of Patent: November 5, 1996
    Assignees: Superconductivity Research Laboratory of International Superconductivity Technology Center, Sharp Corporation
    Inventors: Manabu Fujimoto, Katsumi Suzuki, Youichi Enomoto, Shoji Tanaka
  • Patent number: 5560836
    Abstract: The present invention relates to a method or forming a step on a deposition surface of a substrate for depositing it thin film on it. The method comprises steps of etching a portion of the deposition surface of the substrate and conducting heat treatment of the substrate so as to recover crystallinity of the etched surface. The method can comprise steps of etching a portion of the deposition surface of the substrate and further etching the etched portion of the deposition surface of the substrate slightly so as to remove a degraded surface.
    Type: Grant
    Filed: November 9, 1994
    Date of Patent: October 1, 1996
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventor: Tatsuoki Nagaishi
  • Patent number: 5552375
    Abstract: Disclosed are methods of forming superconducting devices including a type having a structure of a superconductor--a normal-conductor (or a semiconductor)--a superconductor, and a type having a superconducting weak-link portion between superconductors.The superconductors constituting the superconducting device are made of an oxide of either of perovskite type and K.sub.2 NiF.sub.4 type crystalline structures, containing at least one element selected from the group consisting of Ba, Sr, Ca, Mg, and Ra; at least one element selected from the group consisting of La, Y, Ce, Sc, Sm, Eu, Er, Gd, Ho, Yb, Nd, Pr, Lu, and Tb; Cu; and O. In addition, the c-axis of the crystal of the superconductor is substantially perpendicular to the direction of current flowing through this superconductor.
    Type: Grant
    Filed: February 7, 1994
    Date of Patent: September 3, 1996
    Assignee: Hitachi, Ltd.
    Inventors: Toshikazu Nishino, Ushio Kawabe, Yoshinobu Tarutani, Shinya Kominami, Toshiyuki Aida, Tokuumi Fukazawa, Mutsuko Hatano
  • Patent number: 5547923
    Abstract: For manufacturing a superconducting device, a first oxide superconductor thin film having a very thin thickness is formed on a principal surface of a substrate, and a stacked structure of a gate insulator and a gate electrode is formed on a portion of the first oxide superconductor thin film. A second oxide superconductor thin film is grown on an exposed surface of the first oxide superconductor thin film, using the gate electrode as a mask, so that first and second superconducting regions having a relatively thick thickness are formed at opposite sides of the gate electrode, electrically isolated from the gate electrode. A source electrode and a drain electrode is formed on the first and second oxide superconducting regions. The superconducting device thus formed can functions as a super-FET.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: August 20, 1996
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Takao Nakamura, Hiroshi Inada, Michitomo Iiyama
  • Patent number: 5527766
    Abstract: Novel structures and methods utilize layered copper oxide release materials to separate oxide films from growth substrates. Generally, the method comprises the steps of: first, forming a layered copper oxide sacrificial release material on a growth substrate, in the preferred embodiment being the high temperature superconductor YBCO grown on a compatible substrate such as LaAlO3, second, forming an oxide film on the layered copper oxide release material, in the preferred embodiment, a ferroelectric, an optical material or a oxide film compatible with further high temperature superconductor growth, such as SrTiO3 or CeO2, and third, etching the layered copper oxide release material so as to separate the oxide film from the growth substrate. Optionally, additional layers may be grown on the oxide film prior to etching.
    Type: Grant
    Filed: December 13, 1993
    Date of Patent: June 18, 1996
    Assignee: Superconductor Technologies, Inc.
    Inventor: Michael M. Eddy
  • Patent number: 5510324
    Abstract: The invention relates to a method of manufacturing a superconducting device, which comprises the steps of forming on a principal surface of a substrate a non-superconducting oxide layer having a similar crystal structure to that of a c-axis oriented oxide superconductor thin film and a flat-top projection at its center portion, forming a c-axis oriented oxide superconductor thin film having an extremely thin thickness on the non-superconducting oxide layer so as to form a superconducting channel on the projecting portion of the non-superconducting oxide layer, forming an insulating layer on the c-axis oriented oxide superconductor thin film so as to form a gate insulating layer on the superconducting channel, and forming an a-axis oriented oxide superconductor thin film so as to form a superconducting source region and a superconducting drain region of which upper surfaces have the same level as that of the superconducting channel.
    Type: Grant
    Filed: December 2, 1994
    Date of Patent: April 23, 1996
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Takao Nakamura, Michitomo Iiyama, Hiroshi Inada
  • Patent number: 5494891
    Abstract: A superconducting device comprises a substrate, a non-superconducting layer formed in a principal surface of said substrate, an extremely thin superconducting channel formed of an oxide superconductor thin film on the non-superconducting layer. A superconducting source region and a superconducting drain region of a relatively thick thickness are formed of the oxide superconductor at the both sides of the superconducting channel separated from each other but electrically connected through the superconducting channel, so that a superconducting current can flow through the superconducting channel between the superconducting source region and the superconducting drain region.
    Type: Grant
    Filed: December 6, 1994
    Date of Patent: February 27, 1996
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Takao Nakamura, Michitomo Iiyama
  • Patent number: 5466664
    Abstract: A method of manufacturing a superconducting device involves forming a thin film on the surface of a substrate, forming a superconducting gate electrode on a portion of the thin film, etching the portions of the thin film using the gate electrode as a mask thereby providing a superconducting channel under the gate, forming a step portion on the superconducting channel and under the gate, converting the oxide portion of the step portion into a gate insulation portion by heating the substrate in a vacuum, forming a second oxide superconducting film on the exposed surface of the channel so that superconducting source and drain electrodes are formed on each side of the gate such that the drain and source have a thickness greater than that of the channel and are electrically isolated from the gate electrode.
    Type: Grant
    Filed: July 26, 1994
    Date of Patent: November 14, 1995
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Hiroshi Inada, Takao Nakamura, Michitomo Iiyama
  • Patent number: 5462919
    Abstract: For manufacturing a superconducting thin film having at least one non-superconducting region at and near its surface portion, an oxide superconductor thin film is formed on a surface of the substrate. The oxide superconductor thin film is heated in high vacuum environment so that oxygen of the oxide superconductor crystals escapes from the surface of the oxide superconductor thin film and a surface portion of the oxide superconductor thin film having a substantial thickness changes into non-superconducting layer of a compound oxide which is composed of the same constituent elements as those of the oxide superconductor but includes the oxygen amount less than that of the oxide superconductor and a thin superconducting channel is formed under the non-superconducting layer.
    Type: Grant
    Filed: February 18, 1994
    Date of Patent: October 31, 1995
    Assignee: Sumitomo Electric Industries,Ltd.
    Inventors: So Tanaka, Michitomo Iiyama
  • Patent number: 5446016
    Abstract: A method for forming a patterned oxide superconductor thin film on a substrate comprises steps of forming a metal or semi-metal layer on a portion of the substrate, on which the oxide superconductor thin film will be formed, forming a layer of a material including silicon on a portion of the substrate, on which an insulating layer will be formed, removing the metal or semi-metal layer and depositing an oxide superconductor thin film over the substrate.
    Type: Grant
    Filed: February 15, 1994
    Date of Patent: August 29, 1995
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: So Tanaka, Takao Nakamura, Michitomo Iiyama
  • Patent number: 5439875
    Abstract: A Josephson junction device comprises a single crystalline substrate including a principal surface having a first and a second regions of which at least lattice distance of exposed lattices are slightly different from each other and an oxide superconductor thin film formed on the principal surface of the substrate. The oxide superconductor thin film includes a first and a second portions respectively positioned on the first and the second regions of the substrate, which are constituted of single crystals of the oxide superconductor, lattices of the one shifts at angle of 45.degree. to that of the other, and a grain boundary between said two portions, which constitutes a weak link of the Josephson junction.
    Type: Grant
    Filed: November 7, 1994
    Date of Patent: August 8, 1995
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: So Tanaka, Hiroshi Inada, Michitomo Iiyama
  • Patent number: 5434127
    Abstract: For manufacturing a superconducting device, a first c-axis orientated oxide superconductor thin film having a very thin thickness is formed on a principal surface of a substrate, and a stacked structure of a gate insulator and a gate electrode is formed on a portion of the first oxide superconductor thin film. An a-axis orientated oxide superconductor thin film is grown, using the gate electrode as a mask, so that second and third superconducting regions having a relatively thick thickness are formed at both sides of the gate electrode, electrically isolated from the gate electrode. The superconducting device thus formed can functions as a super-FET.
    Type: Grant
    Filed: July 25, 1994
    Date of Patent: July 18, 1995
    Assignee: Sumitomo Electric Industries, ltd.
    Inventors: Takao Nakamura, Hiroshi Inada, Michitomo Iiyama
  • Patent number: 5418213
    Abstract: A method for forming an oxide superconductor thin film having different thickness portions, in a process for manufacturing a superconductor device, includes the step of forming an oxide superconductor thin film having a uniform thickness on a substrates. A portion of the oxide superconductor thin film is etch-removed so that the oxide superconductor thin film has a thin thickness portion. Preferably, before the etching, the oxide superconductor thin film is coated with a metal layer, and the oxide superconductor thin film and the metal layer are etched together by means of a physical dry etching process.
    Type: Grant
    Filed: May 18, 1993
    Date of Patent: May 23, 1995
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Saburo Tanaka, Hideo Itozaki, Shuji Yazu
  • Patent number: 5411937
    Abstract: A novel method for fabricating nanometer geometry electronic devices is described. Such Josephson junctions can be accurately and reproducibly manufactured employing photolithographic and direct write electron beam lithography techniques in combination with aqueous etchants. In particular, a method is described for manufacturing planar Josephson junctions from high temperature superconducting material.
    Type: Grant
    Filed: May 17, 1993
    Date of Patent: May 2, 1995
    Assignee: Sandia Corporation
    Inventors: Joel R. Wendt, Thomas A. Plut, Jon S. Martens
  • Patent number: 5366953
    Abstract: A novel method of producing weak-link grain boundary Josephson junctions in high temperature superconducting thin films is disclosed. These junctions are reliably and reproducibly formed on uniform planar substrates (10) by the action of a seed layer (40) placed intermediate the substrate (10) and the superconductor film (20). The superconductor film (22) grown atop the seed (42) is misoriented from the rest of the film (24) by an angle between 5.degree. and 90.degree.. The grain boundary (30) so formed acts as a high quality weak-link junction for superconductor devices. The performance of these junctions can be improved by the addition of buffer layers (50, 60) between the substrate (10) and the superconductor film (20).
    Type: Grant
    Filed: December 22, 1993
    Date of Patent: November 22, 1994
    Assignee: Conductus, Inc.
    Inventors: Kookrin Char, Stephen M. Garrison, Nathan Newman, Gregory G. Zaharchuk
  • Patent number: 5362712
    Abstract: In the process for producing molded bodies from precursors of oxidic high-temperature superconductors a copper mold of the desired shape which encloses a solidified bismuth strontium calcium cuprate melt is treated with a solution of a soluble compound containing sulfate anions, an aqueous mineral acid and an oxidizing agent until the copper mold is dissolved. A protective layer of at least one of strontium sulfate or calcium sulfate is formed on the solidified melt.
    Type: Grant
    Filed: June 23, 1993
    Date of Patent: November 8, 1994
    Assignee: Hoechst Aktiengesellschaft
    Inventors: Eberhard Preisler, Joachim Bock
  • Patent number: 5356870
    Abstract: An ion beam is irradiated to an oxide superconducting thin film formed on a substrate to disturb the crystal structure of the superconducting thin film and thus forming a damaged layer. The damaged layer has higher solubility in a halogen solution has a faster etching rate than other portions. Then, the superconducting thin film is etched by using a halogen solution to remove the damaged layer and form a groove at that portion. As a result, a groove of a desired form can be provided efficiently.
    Type: Grant
    Filed: March 19, 1993
    Date of Patent: October 18, 1994
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Shuji Fujiwara, Ryokan Yuasa, Hiroaki Furukawa, Masaaki Nemoto, Masao Nakao
  • Patent number: 5356474
    Abstract: This invention relates to strontium titanate, hereinafter referred to as SrTiO.sub.3, films of the type produced by chemical vapor deposition (CVD) that are oriented so that the film's (100) face is parallel to the surface plane of the substrate. Such structures of this type, generally allow the SrTiO.sub.3 film to be deposited such that a high density capacitor or a buffer layer for a superconductor can be created.
    Type: Grant
    Filed: November 27, 1992
    Date of Patent: October 18, 1994
    Assignee: General Electric Company
    Inventor: Sudhir D. Savkar
  • Patent number: 5332723
    Abstract: A method of producing a new high Tc superconducting material using fullerene molecules as artificial pinning sites for any magnetic flux that may enter the material.
    Type: Grant
    Filed: July 28, 1993
    Date of Patent: July 26, 1994
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Walter Eidelloth, deceased, James T. Busch, heir, Richard J. Gambino, Rodney Ruoff, Claudia D. Tesche
  • Patent number: 5328890
    Abstract: To produce more complex molded bodies from precursors of high-temperature superconductors based on the oxides of bismuth, strontium, calcium and copper, the homogeneous melt of these oxides is cast in molds at temperatures of 870.degree. to 1000.degree. C. In this process, the geometrically appropriately shaped molds are composed of a material having a melting point of at least 1000.degree. C. Finally, the molds containing solidified melt of the oxides of bismuth, strontium, calcium and copper are treated with dilute hydrofluoric acid at temperatures of 20.degree. to 90.degree. C. until the molds are dissolved.
    Type: Grant
    Filed: December 18, 1992
    Date of Patent: July 12, 1994
    Assignee: Hoechst Aktiengesellschaft
    Inventors: Eberhard Preisler, Joachim Bock
  • Patent number: 5304535
    Abstract: A process for etching with a scanning tunneling microscope on both a single crystal and a thin film of high temperature superconductor is disclosed.
    Type: Grant
    Filed: October 29, 1990
    Date of Patent: April 19, 1994
    Assignee: E. I. du Pont de Nemours and Company
    Inventors: Mark A. Harmer, Bruce A. Parkinson