Making Josephson Junction Device Patents (Class 505/922)
  • Patent number: 6605225
    Abstract: A three-dimensional element is fabricated from a high-temperature superconductor. The method and apparatus can fabricate, for example, a single-electron tunnel device or an intrinsic Josephson device which utilize the layer structure peculiar to the high-temperature superconductor, with machining from the side surface of a monocrystal or thin film. In the focused-ion beam etching, a substrate holder which is rotatable about 360°, is rotated, at the minimum, through an angle of about 90°, and the thin film or monocrystal on the substrate is etched from the side surface thereof so as to fabricate the element. After the thin film or monocrystal is machined from above by means of an focused-ion beam to thereby form a bridge having a junction length, the sample is rotated by about 90° (270°). Subsequently, a multi-layer current path layer is formed through side-surface machining. The junction length is accurately controlled through measurement of the current path length from an image display.
    Type: Grant
    Filed: September 21, 2000
    Date of Patent: August 12, 2003
    Assignee: Japan Science and Technology Corporation
    Inventors: Tsutomu Yamashita, Sang-Jae Kim
  • Patent number: 5770470
    Abstract: The invention relates to a high temperature superconducting electric field effect device which creates a dual grain boundary on a superconducting thin film and employs it as a channel. The device comprises a substrate, a bottom layer formed on a predetermined region of the bottom layer, a dual grain boundary channel region formed on the bottom layer, a high temperature source and a drain formed at both end portions of the channel region on the substrate, a high temperature superconducting thin film channel layer formed a predetermined region on the source, the drain and the substrate, dual grain boundaries formed on the high temperature superconducting thin film channel layer, and a gate insulating layer formed on the dual grain boundary channel region.
    Type: Grant
    Filed: August 8, 1996
    Date of Patent: June 23, 1998
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Gun-Yong Sung, Jeong-Dae Suh
  • Patent number: 5439875
    Abstract: A Josephson junction device comprises a single crystalline substrate including a principal surface having a first and a second regions of which at least lattice distance of exposed lattices are slightly different from each other and an oxide superconductor thin film formed on the principal surface of the substrate. The oxide superconductor thin film includes a first and a second portions respectively positioned on the first and the second regions of the substrate, which are constituted of single crystals of the oxide superconductor, lattices of the one shifts at angle of 45.degree. to that of the other, and a grain boundary between said two portions, which constitutes a weak link of the Josephson junction.
    Type: Grant
    Filed: November 7, 1994
    Date of Patent: August 8, 1995
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: So Tanaka, Hiroshi Inada, Michitomo Iiyama
  • Patent number: 5438036
    Abstract: A SQUID comprises a substrate, a washer of an oxide superconductor thin film formed on a principal surface of the substrate, a hole shaped a similar figure to the washer at the center of the washer, a slit formed between one side of the washer and the hole, and a Josephson junction which connects portions of the washer at the both sides of the slit across the slit. In the SQUID, the ratio of similarity of the washer to the hole ranges 100 to 2500.
    Type: Grant
    Filed: April 19, 1993
    Date of Patent: August 1, 1995
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Takashi Matsuura, Hideo Itozaki
  • Patent number: 5347143
    Abstract: A superconducting tunnel element, having a plurality of super conductors separated by barriers, the superconductors each comprising two physically separate but electrically connected superconducting layers and one insulated control layer. As a result, summation of the detection capacity or of the transmitting intensity becomes possible. Also, the simultaneous detection or transmission is permitted on arbitrary different frequencies or a summation of the signal intensity is possible in the case of SQUID-systems.
    Type: Grant
    Filed: August 9, 1993
    Date of Patent: September 13, 1994
    Assignee: Dornier Luftfahrt GmbH
    Inventor: Hehrwart Schroder
  • Patent number: 5321276
    Abstract: A superconducting tunnel junction radiation sensing device includes first and second superconductor electrodes and a tunnel barrier layer interposed therebetween. The tunnel barrier layer is made up of a thin-wall portion and a thick-wall portion each formed of a semiconductor or an insulator, and each having opposite surfaces respectively contacting the first and second superconductor electrodes, and each extending adjacent each other in a same horizontal plane between the first and second electrodes. The thick-wall portion has a vertical thickness which is at least twice that of the thin-wall portion. Furthermore, the thickness of the thin-wall portion is such that a tunnel effect is enabled therethrough form the first electrode to the second electrode, and the thickness of the thick-wall portion is such that a tunnel effect is substantially prohibited therethrough from the first electrode to the second electrode.
    Type: Grant
    Filed: October 1, 1991
    Date of Patent: June 14, 1994
    Assignee: Nippon Steel Corporation
    Inventors: Masahiko Kurakado, Atsuki Matsumura, Takeshi Kaminaga, Tooru Takahashi
  • Patent number: 4958200
    Abstract: A semiconductor device in which at least a part of each of the current flow paths extending from the electrode pads of the semiconductor chip to the outer terminals of the semiconductor package is made of superconducting material. During operation, when an overcurrent applied to a lead pin exceeds the critical current of the superconducting material, the resistance is increased from zero, and the semiconductor chip is thereby protected from damage. The superconducting material may also be configured between the outer terminals of the semiconductor package so that a potential difference can be measured. Also, a magnetic field may be applied to the superconducting material so that the critical current value can be set.
    Type: Grant
    Filed: July 20, 1988
    Date of Patent: September 18, 1990
    Assignee: Sumotomo Electric Industries, Ltd.
    Inventor: Takeshi Sekiguchi
  • Patent number: 4837609
    Abstract: A semiconductor device which includes either a single semiconductor chip bearing an integrated circuit (IC) or two or more electrically interconnected semiconductor chips, is disclosed. This device includes interconnects between device components (on the same chip and/or on different chips), at least one of which includes a region of superconducting material, e.g., a region of copper oxide superconductor having a T.sub.c greater than about 77K. Significantly, to avoid undesirable interactions, at high processing temperatures, between the superconducting material and underlying, silicon-containing material (which, among other things, results in the superconducting material reverting to its non-superconducting state), the interconnect also includes a combination of material regions which prevents such interactions.
    Type: Grant
    Filed: September 9, 1987
    Date of Patent: June 6, 1989
    Assignee: American Telephone and Telegraph Company, AT&T Bell Laboratories
    Inventors: Michael Gurvitch, Roland A. Levy