Abstract: A monitoring device of a main spindle rotation speed in a machine tool displays a variation state of the rotation speed by a rotation speed variation unit using a display unit in the machine tool. The monitoring device includes a variation value setting unit, a drawing unit, a first display unit, and a settable range calculating unit. The settable range calculating unit is configured to calculate a settable range of a variation amplitude and a variation cycle based on a calculation formula. The calculation formula includes the variation cycle, a difference between a first rotation speed and a second rotation speed at mutually different timings among the rotation speeds varied relative to a reference rotation speed, an inertia of a rotating body, a rated output of a motor that drives a main spindle, and a usage proportion to the rated output of the motor.

Abstract: Sampled analog data are transferred between sampled analog circuits operating on respective local phase clocks which are triggered by a master clock. In response to a first (DATA READY) signal from an upstream sampled analog circuit, the sampled analog data are transferred from an upstream sampled analog circuit to a data transfer circuit. In response to a second (READY FOR DATA) signal from a downstream sampled analog circuit, the sampled data are transferred from the data transfer circuit to the downstream sampled analog circuit. The sampled data are delayed in the data transfer circuit for at least one master clock cycle when the second signal from the downstream sampled analog circuit is received before the first signal is received from the upstream sampled analog circuit.

Abstract: Channel select filter circuits are described. One circuit implements a multiplying element and digital-to-analog converter as a differential current mode device. Another circuit implementing a multiplying element and digital-to-analog converter with weighted addition, deferred after multiplication of the digital-to-analog converter and multiplier combination. In one such circuit, substantially equal current source magnitudes are in different columns of the circuit. Another such circuit, with substantially equal current source magnitudes, uses non-radix2. Another such circuit, with substantially equal current source magnitudes, has partial segmentation. Another circuit implements a multiplying element and digital-to-analog converter, with partial segmentation, scrambling bit allocation for elements. One such circuit scrambles bit allocation on equally weighted segments, as described herein.

Abstract: A biological signal measuring apparatus is provided. The biological signal measuring apparatus includes a first unit measurer configured to measure a first biological signal of a subject based on an electrical characteristic difference between first electrodes contacting the skin of the subject, and a second unit measurer configured to measure a second biological signal of the subject based on an electrical characteristic difference between second electrodes contacting the skin of the subject at positions different from positions of the first electrodes. A plurality of unit measurers including at least the first unit measurer and the second unit measurer are arranged based on characteristics of contact parts of the first and second electrodes.

Abstract: A storage system maintains a journal of journal entries and at least one snapshot of one or more data volumes. By assigning a unique sequence number to journal and snapshot, it is easy to find a journal which can be applied to the snapshot. A technique is described for detecting an overflow condition of running out of journal space and recovering the journal space.

Abstract: An interpolation circuit includes: a first circuit that generates first interpolation data from a plurality of pieces of data among data inputted in time series; a second circuit that generates second interpolation data from the plurality of pieces of data in timing when a part of the data inputted in time series in the first circuit lacks; and a third circuit that adds the second interpolation data to a location in the first interpolation data where the part of the data inputted in time series has lacked.

Abstract: The programmable CMOS-based nonlinear function synthesizer is a circuit that assumes that the required nonlinear function can be approximated by the summation of hyperbolic tangent (tan h) functions with different arguments. Each term of the tan h function expansion is realized using a current-controlled current-conveyor (CCCCII), or an operational transconductance amplifier (OTA)) with a different bias current. The output weighted currents of these CCCCIIs or OTAs are algebraically added to produce the output current. The present circuit can be easily integrated, extended to include higher order terms of the tan h-function expansion and programmed to generate arbitrary hard nonlinear functions. By controlling the bias current and without changing the aspect ratios of the transistors, various tan h functions with different arguments from the same topology can be obtained.

Abstract: A signal waveform generating circuit includes a first part storing waveform data of a signal to be generated, a second part storing additional data for adjusting the waveform data, and a third part adjusting the waveform data read from the first part by the additional data read from the second part.

Abstract: A switched current resistor (SCR) PGA for constant-bandwidth gain control includes an inverting amplifier, a feedback resistor forming a feedback loop between an output side and an input side of the inverting amplifier, and a switched current resistor (SCR) array connected in parallel to the feedback resistor, and configured to tune a gain range between a maximum and a minimum. The SCR array includes a plurality of switched resistors, each comprising a switch in series with a resistor. When the plurality of switched resistors are switched by a gain-control logic, a plurality of switched current sources and a plurality of grounded resistors are switched correspondingly to deliver a transient current, an equivalent of which flows through the plurality of grounded resistors out from the input side of the inverting amplifier, leading to a feedback factor of the PGA being constant.

Abstract: Address generation by an integrated circuit is described. An aspect relates generally to an address generator which has first and second processing units. The second processing unit is coupled to receive a stage output from the first processing unit and configured to provide an address output. The stage output is in a first range, and the address output is in a second range. The first range is from ?K to ?1 for K a block size, and the second range is from 0 to K?1.

Abstract: The universal CMOS current-mode analog function synthesizer is based on approximating the required function using its sixth-order Taylor series expansion. These approximations can be implemented by adding the weighted output currents of a number of basic building blocks built around a basic current squarer, and a constant current. The circuit can simultaneously realize thirty-two different mathematical functions and can be easily expanded to accommodate many others.

Abstract: An authentication system and a method for signing data are disclosed. The system uses a hardware software partitioned approach. In its implementation the system of the invention compares favourably with performance and other parameters with a complete hardware or full software implementation. Particularly, advantageously there is a reduced gate count. Also as disclosed in the invention the system makes it difficult for hackers to attack the system using simple power analysis.

Abstract: A method of programmatically generating code from the elements of a system simulation is disclosed. The programmatic code generation includes the ability to generate code for foreign code associated with a co-simulation element. The programmatic code generation may incorporate the foreign code by means of a function or procedure call or alternatively by integrating or in-lining the foreign code directly within the body of the generated code. Depending upon whether or not the foreign code is in a different language than the code being programmatically generated, a native language wrapper may be required to be inserted around the foreign code.

Abstract: Various technologies and techniques are disclosed for transacting accesses via unmanaged pointers in a transactional memory system. A transactional memory system is provided. Source code is analyzed to identify operations that create unmanaged pointers. Information is tracked about the targets of unmanaged pointer values in pointer variables. The target information is used to determine how accesses through an unmanaged pointer argument are to be transacted. When an unmanaged pointer is created, a descriptor of the target with the resulting pointer value is associated with the location. Within the method that creates the unmanaged pointer, the target can be identified using the descriptor, thereby enabling accesses to be transacted. When an unmanaged pointer is being passed as an argument, a descriptor is also passed as an argument to allow the unmanaged pointer target to be identified.

Abstract: System, methods, and apparatuses produce simulated human physiological waveforms such as electrocardiograph (ECG) and blood pressure signals where the microcontroller and/or digital-to-analog converters may be switched to a lower power-consuming state by programmable instructions and switched on in response to a programmable sleep timer.

Abstract: In a method for determining a minimum value of an optimization function under constraints given by equations, a set of points which satisfy the constraints is regarded as a Riemannian manifold within a finite-dimensional real-vector space, the Riemannian manifold is approached from an initial position within the real-vector space. An exponential map regarding a geodesic line equation with respect to a tangent vector on the Riemannian manifold ends at a finite order, an approximate geodesic line is generated as a one-dimensional orbit. An approximate parallel-translation is performed on the tangent vector on the Riemannian manifold and on the orbit generated in the orbit generating step by finite-order approximation of the exponential map regarding the parallel translation of the tangent vector.

Abstract: A method and apparatus for reducing unwanted harmonics in direct digital synthesizer (DDS) output. The method comprises the steps of providing a set of k phase-shifted clock signals, examining, in succession, each DDS accumulator state, and determining whether the DDS accumulator state has a defined transition-state. For each DDS accumulator state having a defined transition-state, an interpolation is performed based upon the value of the preceding DDS accumulator state, an element of the set of phase-shifted clock signals is selected based upon the interpolation, and the most significant bit (MSB) is repositioned using the selected element of the phase-shifted clock signals. The apparatus comprises means for providing a set of k phase-shifted clock signals, means for examining, in succession, each DDS accumulator state, and means for determining whether the DDS accumulator state has a defined transition-state.

Abstract: A process is scheduled based on one or more tasks identified as control tasks from a set of tasks comprising part of a job. A desired work-in-progress load time level is set for each of the identified control tasks, and a time load on each of the identified control tasks is determined for each new job, each new job comprising one or more tasks. New jobs are released based on the desired work-in-progress load time level for one or more control tasks to approximately maintain the set desired work-in-progress load time level.

Abstract: A circuit 17 for interfacing with a sensor 18 having a sensor input current and a modulated sensor current signal corresponding to a sensed condition. A control module 20 is coupled to the sensor 18 and receives the sensor current signal. The control module 20 converts the sensor current signal to a modulated signal having a pulse width with a duration corresponding to the sensed condition. The control module 20 counts a time corresponding to the pulse width. The time corresponds to the sensed condition.

Abstract: A system and circuit is provided for digitally synthesizing the impedance of a transfer function. The impedance of the transfer function is digitally synthesized by generating a current that, when combined with an input voltage, results in the impedance of the transfer function. This is accomplished by sensing the input signal and processing it with a generator or multiplier such that a voltage is produced. The produced voltage controls a current source and creates a current having a value equal to the inverse of the transfer function impedance. The sensed or input voltage divided by the generated current is equal to the impedance of the transfer function. In this manner, many different transfer functions can be digitally synthesized without having to design an alternate circuit.