Piece-wise Linear Synthesis Patents (Class 708/9)
  • Patent number: 8537171
    Abstract: Nonlinear compression of high precision image data (e.g., 12-bits per subpixel) conventionally calls for a large sized lookup table (LUT). A smaller sized and tunable circuit that performs compression with piecewise linear compressing segments is disclosed. The piecewise linear data compressing process is organized so that lumping together of plural ‘used’ high precision value points into one corresponding low precision data value point is avoided or at least minimized. In one embodiment, the compressed data is image defining data being processed for display on a nonconventional display screen where the piecewise linearly compressed data can be stored adjacent to other image data in a frame buffer where a composite image is assembled.
    Type: Grant
    Filed: May 13, 2011
    Date of Patent: September 17, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Michael Francis Higgins, Candice Hellen Brown Elliot
  • Patent number: 7769173
    Abstract: Various method and system embodiments of the present invention are directed to executing bit-commitment protocols. In one embodiment of the present invention, a method for executing a bit-commitment protocol for transmitting a bit from a first party to a second party comprises preparing a three qubits are entangled in a W-state, and storing a first of the three qubits in a first storage device controlled by the first party, a second of the three qubits is stored in a second storage device controlled by the second party, and a third of the three qubits is stored in a third storage device controlled by a third party. The bit is revealed to the second party by transmitting the first and third qubits to the second party and measuring the states of the three qubits to which of the entangled W-states the three qubits are in.
    Type: Grant
    Filed: October 30, 2006
    Date of Patent: August 3, 2010
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: William John Munro, Timothy Paul Spiller, Raymond Beausoleil, Keith Harrison, Marco Fiorentino
  • Patent number: 7224485
    Abstract: The present invention provides a mapping method and apparatus of look-up table in an imaging system. The mapping method implemented by the apparatus comprises receiving a digital signal having a high-bit portion and a low-bit portion. The high-bit portion of the digital signal is subjected to a curve table for look-up mapping to get a high-bit signal. The partial high-bit portion is subjected to a slope table for getting a factor. The low-bit portion of the digital signal is calculated with the factor to get a low-bit signal. The high-bit signal is combined with the low-bit signal to get an output signal. The curve table and slope curve can reduce the memory usage of the imaging system.
    Type: Grant
    Filed: May 11, 2006
    Date of Patent: May 29, 2007
    Inventor: Chui-Kuei Chiu
  • Patent number: 6035314
    Abstract: The reliability of solutions of simultaneous algebraic equations with integral coefficients is improved and high-speed information processing is realized. A method processes information wherein, in a model in which restrictions among parameters are given by simultaneous algebraic equations with integral coefficients, when the simultaneous equations have only a finite number of solutions, zero points of a polynomial set F with integral coefficients, which represents the simultaneous equations and is described in a memory, are represented by rational expressions based on zero points of a one-variable polynomial regarding one variable so that the information is represented using the representation of rational expression. The method processes information by choosing a term order, calculates a Grobner basis, calculates a minimum polynomial f1, and controls a digital processor to find solutions represented by rational expressions.
    Type: Grant
    Filed: December 23, 1996
    Date of Patent: March 7, 2000
    Assignee: Fujitsu Limited
    Inventor: Masayuki Noro