Configuration Initialization Patents (Class 710/10)
  • Patent number: 10798468
    Abstract: The present application is a method and system for presenting game-related information. A system for presenting game-related information may include an initiator device, the initiator device including a computing device which includes an application executed by a processor of the computing devices to generate game-related information, a display device operably connected to the initiator device to display game-related information from the initiator device, and a cloud-based server device operably connected to the initiator device for receipt of the game-related information. The system for presenting game related information may include a receiver device, the receiver device including a computing device which includes an application executed by a processor of the computing device to receive the game-related information from the cloud-based server device.
    Type: Grant
    Filed: March 21, 2016
    Date of Patent: October 6, 2020
    Assignee: Scorevision, LLC
    Inventors: Chad Bokowski, David Sutter, Corey Spitzer, Gordon Whitten
  • Patent number: 10785110
    Abstract: An automated method for facilitating management of a data processing environment is disclosed. In various embodiments, the method may include facilitating creation of a first memorialization, in digital form, of first one or more changes made to a first data processing device of the data processing environment. In various embodiments, the method may further include facilitating creation of a second and a third memorialization, both in digital form, of second and third one or more changes made to a second and a third data processing device of the data processing environment, respectively. In various embodiments, the method may still further include facilitating automated approval of the second and third changes made to the second and third data processing devices, using the first, second and third memorializations. Other embodiments of the present invention may include, but are not limited to, apparatus adapted to facilitate practice of the above-described method.
    Type: Grant
    Filed: June 12, 2017
    Date of Patent: September 22, 2020
    Assignee: Tripwire, Inc.
    Inventors: Gregor Torrence, Troy D. Thompson
  • Patent number: 10785121
    Abstract: A method for discovery of devices is described herein. The method includes connecting, via a processor, to a discovery node service. The method also includes sending, via the processor, a node name to the discovery node service. The method further includes sending, via the processor, data and content to be sent to a discovery node associated with the node name. The method also further includes receiving data and content from the discovery node, the data to include a list of devices subscribed to the discovery node.
    Type: Grant
    Filed: November 27, 2018
    Date of Patent: September 22, 2020
    Assignee: Intel Corporation
    Inventors: Mats Agerstam, Robert A. Colby, Jaideep Moses, Patrick C. Lankswert
  • Patent number: 10754742
    Abstract: Systems, methods, apparatuses, and software for computing systems are provided herein. In one example, a computing system includes a first processor configured to establish a network connection with a target system, and transfer to a second processor information describing the network connection comprising a network address and a network port. The computing system includes the second processor configured to identify when the first processor has failed, and responsively inherit the network connection with the target system based at least on the information describing the network connection and packet sequence information received from the target system to resume packet acknowledge or sequence counts established between the first processor and the target system.
    Type: Grant
    Filed: January 14, 2019
    Date of Patent: August 25, 2020
    Assignee: Liqid Inc.
    Inventors: James Scott Cannata, Jason Breakstone, Christopher R. Long
  • Patent number: 10732868
    Abstract: Implementing a base set of data storage features for containers across multiple cloud computing environments. A container specification analyzer receives a container specification that identifies a container to be initiated, a volume to be mounted, and a native device driver to communicate with to facilitate mounting the volume. The container specification analyzer changes the container specification to generate an updated container specification that identifies a pass-through device driver to communicate with in lieu of the native device driver and identifies pass-through device driver data that identifies a data storage feature to be performed on data destined for the native device driver. The container specification analyzer returns the updated container specification for processing by a container initiator.
    Type: Grant
    Filed: August 2, 2018
    Date of Patent: August 4, 2020
    Assignee: Red Hat, Inc.
    Inventors: Huamin Chen, Bradley D. Childs
  • Patent number: 10721134
    Abstract: Described embodiments provide systems and methods for inferring a network type and network conditions. The system includes a packet capturing engine configured to capture a plurality of network packets from a plurality of TCP network connections. The system includes a packet analyzer configured to analyze the plurality of network packets to generate a plurality of metrics. The system includes a network classifier configured to infer network types of the plurality of TCP connections based on the plurality of metrics and at least one classification model. The system also includes a conditions ranking engine configured to estimate a level of network congestion for each TCP connection based on the plurality of metrics and the network types.
    Type: Grant
    Filed: March 28, 2018
    Date of Patent: July 21, 2020
    Assignee: Citrix Systems, Inc.
    Inventors: Georgios Papaloukopoulos, Georgios Tsolis, Athanasios Kordelas, Aikaterini Kalou, Nicholas Stavrakos
  • Patent number: 10691465
    Abstract: A method for synchronization of system management data includes steps of generating a request for system management data in response to execution of a system booting program, transmitting the request to a baseboard management controller so as to enable the baseboard management controller to transmit the system management data stored in a second storage unit to a processor; receiving the system management data from the baseboard management controller, and determining whether the system management data is complete; and when it is determined that the system management data is complete, storing at least one of the sequential packets of the system management data in a first storage unit, and proceeding with execution of the system booting program.
    Type: Grant
    Filed: November 15, 2018
    Date of Patent: June 23, 2020
    Assignee: Mitac Computing Technology Corporation
    Inventors: Po-Wen Huang, Le Xing, Bichao Wang, Cheng-Chieh Yeh, Jie Zhang, Chen-Nan Hsiao
  • Patent number: 10691561
    Abstract: Failover of a virtual function exposed by an SR-IOV adapter of a computing system, including: instantiating, by a hypervisor, a standby virtual function in the computing system; detecting a loss of communication between a logical partition and an active virtual function mapped to the logical partition; placing the active virtual function and the standby virtual function in an error state; remapping the logical partition to the standby virtual function; and placing the standby virtual function in an error recovery state.
    Type: Grant
    Filed: June 11, 2018
    Date of Patent: June 23, 2020
    Assignee: International Business Machines Corporation
    Inventors: Jesse P. Arroyo, Charles S. Graham, Prathima Kommineni, Timothy J. Schimke
  • Patent number: 10686655
    Abstract: Methods and systems for configuring computing devices using mobile workspace contexts based on proximity to locations are described herein. A mobile computing device determines that the device is proximate to a location, another device, or an individual associated with an enterprise system. The mobile computing device may then receive a mobile workspace context associated with the location, device, or individual, such as one or more specific wireless networks, enterprise applications, and/or documents, and may configure the device based on the received mobile workspace context. Additional methods and systems are described herein for transmitting and receiving sets of device capabilities between multiple devices, establishing communication sessions, and sharing various capabilities between devices. Still additional methods and systems are described for determining and accessing the capabilities of enterprise system resources using mobile computing devices in an enterprise system.
    Type: Grant
    Filed: February 7, 2019
    Date of Patent: June 16, 2020
    Assignee: Citrix Systems, Inc.
    Inventors: Joe Abou Rjeili, Joseph L. Freedman, Georgy Momchilov
  • Patent number: 10671732
    Abstract: An electronic apparatus and a secure boot method thereof are provided. The electronic apparatus includes at least two connecting devices and a storage device. In the method, a current configuration of the connecting devices is detected, in which the current configuration includes one or a combination of a number, types, specifications and identifications of external devices connected with the connecting devices. Then, multiple preset configurations recorded in the storage device are retrieved and compared with the detected current configuration. If the current configuration matches one of the preset configurations, an apparatus function corresponding to the matched preset configuration is executed.
    Type: Grant
    Filed: April 13, 2017
    Date of Patent: June 2, 2020
    Assignee: Wistron Corporation
    Inventor: Chien-Yu Huang
  • Patent number: 10671419
    Abstract: A system and method of emulated input-output memory management units includes a management software associating a first device with a first input-output memory management unit having a first security designation, and associating a second device with a second input-output memory management unit having a second security designation different from the first security designation. A hypervisor constructs a table that describes associations between the plurality of devices and the plurality of input-output memory management units. The hypervisor provides the table to a guest virtual machine having a plurality of guest addresses including a first guest address and a second guest address. The first device accesses the first guest address through the first input-output memory management unit and the second device accesses the second guest address through the second input-output memory management unit.
    Type: Grant
    Filed: February 29, 2016
    Date of Patent: June 2, 2020
    Assignee: Red Hat Israel, Ltd.
    Inventors: Marcel Apfelbaum, Gal Hammer
  • Patent number: 10656855
    Abstract: A memory manager on a programmable device manages memory allocated to accelerators on the programmable device and allocated to processes that access the programmable device. The memory manager can manage both memory on the programmable device as well as external memory coupled to the programmable device. The memory manager protects the memory from unauthorized access by enforcing protection for the memory, using keys, encryption or the like. The memory manger can allocate a partition of memory to an accelerator when an accelerator is deployed to a programmable device, then allocate subpartitions within the allocated partition for each process that accesses the accelerator. When an accelerator is cast out of the programmable device, the memory partition is scrubbed so it can be reclaimed and allocated to another accelerator. When a process terminates, the subpartitions corresponding to the process are scrubbed so they may be reclaimed and allocated to another process.
    Type: Grant
    Filed: July 31, 2018
    Date of Patent: May 19, 2020
    Assignee: International Business Machines Corporation
    Inventors: Paul E. Schardt, Jim C. Chen, Lance G. Thompson, James E. Carey
  • Patent number: 10649891
    Abstract: A storage device includes a nonvolatile memory, and a controller configured to perform, in response to commands from the host device, a read operation and a write operation on the nonvolatile memory. The controller divides a logical address space of the storage device into a plurality of subspaces and manages a priority value for each of the subspaces, the priority values of the subspaces determining an order for setting up the subspaces upon start-up of the storage device.
    Type: Grant
    Filed: August 24, 2017
    Date of Patent: May 12, 2020
    Assignee: Toshiba Memory Corporation
    Inventors: Satoshi Arai, Shunitsu Kohara, Kazuya Kitsunai, Yoshihisa Kojima, Hiroyuki Nemoto
  • Patent number: 10635609
    Abstract: A Peripheral Component Interconnect Express (PCIe) switch with Erasure Coding logic is disclosed. The PCIe switch may include an external connector to enable the PCIe switch to communicate with a processor and at least one connector to enable the PCIe switch to communicate with at least one storage device. The PCIe switch may include a Power Processing Unit (PPU) to handle configuration of the PCIe switch. The Erasure Coding logic may include an Erasure Coding Controller with circuitry to apply an Erasure Coding scheme to data stored on the storage device, and a snooping logic including circuitry to intercept a data transmission received at the PCIe switch and modify the data transmission responsive to the Erasure Coding scheme.
    Type: Grant
    Filed: November 30, 2018
    Date of Patent: April 28, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sompong Paul Olarig, Fred Worley, Oscar P. Pinto
  • Patent number: 10635816
    Abstract: Reprogramming of a redirected USB device can be restricted to prevent the redirected USB device's firmware from being modified maliciously. A virtual bus driver can be configured to monitor USB request blocks (URBs) to identify whether an URB pertains to an attempt to alter the firmware of a redirected USB device. When an URB is identified as pertaining to an attempt to alter the firmware, the virtual bus driver can block the URB unless the URB is associated with an authorized user or application. In this way, only an authorized user or application will be allowed to modify the firmware of a redirected USB device thereby ensuring that a malicious user or application cannot modify the firmware in an improper manner.
    Type: Grant
    Filed: April 4, 2016
    Date of Patent: April 28, 2020
    Assignee: Wyse Technology L.L.C.
    Inventor: Gokul Thiruchengode Vajravel
  • Patent number: 10627890
    Abstract: A bridge module is provided. The bridge module comprise a first transmission unit electrically connected to a host to receive a power status signal from the host; a second transmission unit electrically connected to a data transceiver device to have data transmission with the data transceiver device at a download data transmission speed; and a processing device electrically connected to the first transmission unit and the second transmission unit, and configured to adjust the download data transmission speed and a processor clock of the processing device according to the power status signal. An operation method is also provided.
    Type: Grant
    Filed: October 26, 2017
    Date of Patent: April 21, 2020
    Assignee: ASMEDIA TECHNOLOGY INC.
    Inventors: Tien-Hsiang Tseng, Ming-Wei Hsu
  • Patent number: 10621126
    Abstract: A delay control device, a delay control method and an electronic apparatus are provided. The delay control device includes: a trigger port, configured to receive a trigger signal; a first interface; a second interface; a control module, configured to disconnect connection between the first interface and the second interface in response to a case that the trigger port receives the trigger signal; and a timing module, configured to carry out timing for a duration; the control module is further configured to connect the first interface and the second interface in response to a case that the timing module completes timing of the duration. The delay control device can achieve a delay control function, prevent program confusion, improve efficiency and save cost.
    Type: Grant
    Filed: October 19, 2016
    Date of Patent: April 14, 2020
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE DISPLAY TECHNOLOGY CO., LTD.
    Inventors: Chunxi Hai, Runcong Ge, Xiaoting Wang
  • Patent number: 10616220
    Abstract: A method, executable by a switch to automatically onboard end devices connected thereto, comprises detecting that an end device has connected to the switch, and determining a device identity of the connected end device. The determined device identity is used to obtain a configuration template profile associated with the connected end device. The switch is configured using the obtained configuration template profile.
    Type: Grant
    Filed: March 20, 2018
    Date of Patent: April 7, 2020
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Praveen Kumar Arora, Sivasankaran Nagarajan, Nitin Singla, Yashavantha Nagaraju, Praveen Ganjam Ramesh, Kunal Deshpande
  • Patent number: 10599605
    Abstract: A simplified host accesses SATA and SAS storage media devices by abstracting the SATA and SAS protocols with one full duplex protocol that supports full command queuing to each storage media device, whether SATA or SAS, where the abstraction protocol is performance-centric and supports common high-level read and write access to a pool of storage media devices, each of which may have a SATA or SAS interface. The abstraction protocol is link-agnostic and may be carried via a multiplicity of direct attach or networked interfaces, including but not limited to PCIe, Ethernet (e.g., 1 GbE, 10 GbE, 40 GbE, or 100 GbE), Infiniband, ThunderBolt, Firewire, USB, and/or custom interfaces.
    Type: Grant
    Filed: August 31, 2018
    Date of Patent: March 24, 2020
    Assignee: CONCURRENT VENTURES, LLC
    Inventors: Jesse D. Beeson, Jesse B. Yates
  • Patent number: 10592448
    Abstract: A master-slave system, a command execution method, and a data access method are provided. The master-slave system includes a master device and a slave device. The master device provides a first command and a clock signal to the slave device. The slave device executes a first operation corresponding to the first command according to the first command and the clock signal. When the first operation corresponding to the first command is completed, the slave device generates a response signal according to the clock signal to notify the master device an execution result of the first operation corresponding to the first command.
    Type: Grant
    Filed: January 21, 2019
    Date of Patent: March 17, 2020
    Assignee: Guangzhou Tyrafos Semiconductor Technologies Co., LTD
    Inventor: Keng-Li Chang
  • Patent number: 10579365
    Abstract: An apparatus and method of automatically installing an application in different terminals by storing terminal information of a user and allowing the user to install an application when the user installs an application in at least two terminals, and in which an installation process may be automatically conducted is provided. Information related to an application installed in a first terminal is received from the first terminal; and a second terminal is requested to install another application corresponding to the application, in the second terminal, by using the received information related to the application.
    Type: Grant
    Filed: May 24, 2019
    Date of Patent: March 3, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Youl-woong Sung, Jong-baek Kim, Il-joo Kim, Young-chul Sohn, Soo-min Shin, Ho Jin
  • Patent number: 10545771
    Abstract: Concurrent maintenance of an input/output (I/O) adapter backing a virtual network interface connection (VNIC) including receiving, by a hardware management console (HMC), a request to disconnect the I/O adapter from a computing system, wherein the computing system comprises a logical partition and virtual I/O server; instructing, by the HMC over a communications link, the virtual I/O server to deconfigure and remove the server VNIC driver; determining, by the HMC, that a replacement I/O adapter is installed on the computing system; and in response to determining that the replacement I/O adapter is installed on the computing system, instructing, by the HMC over the communications link, the virtual I/O server to add and configure a replacement server VNIC driver.
    Type: Grant
    Filed: June 26, 2017
    Date of Patent: January 28, 2020
    Assignee: International Business Machines Corporation
    Inventors: Curtis S. Eide, Dwayne G. McConnell, Xiaohan Qin
  • Patent number: 10536298
    Abstract: There is provided a communication apparatus having a first communication unit configured to hold a first communication parameter and share the held first communication parameter with an external apparatus, and a second communication unit configured to perform communication with the external apparatus by using the first communication parameter that the first communication unit shares with the external apparatus. A control unit performs control so that communication by the second communication unit is started in response to sharing of the first communication parameter by the first communication unit. When communication by the second communication unit is to be performed in response to sharing of the first communication parameter by the first communication unit, the control unit puts the first communication parameter, which has been shared with the external apparatus, in a state in which it cannot be shared via the first communication unit.
    Type: Grant
    Filed: June 26, 2015
    Date of Patent: January 14, 2020
    Assignee: Canon Kabushiki Kaisha
    Inventor: Kenichirou Hayashi
  • Patent number: 10536329
    Abstract: A configuration assistance module (CAM) includes a configuration monitor (CM), a configuration analyzer (CA), and a configuration database of one or more supported platform configurations. The CM may and collect hardware and software inventory, e.g., PCIe matrix information, DIMM matrix information, blade configuration information and configuration information for various resources. The CAM may compare the current configuration to the supported configurations, report discrepancies through alerts, and create assist reports. An assist report may be stored to a remote share or master partition and displayed to a GUI, console interface, or the like. The CA module may take an assist report as input and create an analytics report, which may proactively provide inputs for future configurations.
    Type: Grant
    Filed: June 1, 2017
    Date of Patent: January 14, 2020
    Assignee: Dell Products L.P.
    Inventors: Lucky Pratap Khemani, Pavan Kumar, Suren Kumar, M V R Krishna Reddy Karri
  • Patent number: 10528222
    Abstract: Disclosed is a method for executing at least one application by a display device having a touch screen. An application execution method according to the present invention may include the steps of: displaying a window for executing an application in each of a plurality of areas arranged on a touch screen; displaying a button on at least one boundary line dividing the plurality of areas; receiving an input for selecting the button; and displaying, in a predetermined area, on the basis of the received input, a list of at least one application executed in the predetermined area among the plurality of areas.
    Type: Grant
    Filed: August 14, 2014
    Date of Patent: January 7, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dae-wook Park, Young-jin Kim, Jae-yeol Lee, Tae-soo Kim, Jung-hwan Choi, Kang-tae Kim
  • Patent number: 10523585
    Abstract: Embodiments can provide additional computing resources at minimal and incremental cost by providing instances of one or more server compute subsystems on a system-on-chip. The system-on-chip can include multiple compute subsystems where each compute subsystem can include dedicated processing and memory resources. The system-on-chip can also include a management compute subsystem that can manage the processing and memory resources for each subsystem.
    Type: Grant
    Filed: December 19, 2014
    Date of Patent: December 31, 2019
    Assignee: Amazon Technologies, Inc.
    Inventors: Mark Bradley Davis, David James Borland
  • Patent number: 10503673
    Abstract: Each of one or more storage device units has a switch device for relaying communication in accordance with a communication interface in which the number of master devices that can exist in the same domain is defined and having a plurality of switch ports. A controller unit has a storage controller having a plurality of initiator ports. A storage controller acquires, via each of the plurality of initiator ports, the ID of a storage device unit connected to the initiator port. The storage controller determines a system configuration on the basis of a port ID relationship between the plurality of initiator ports and the plurality of acquired IDs. The storage controller performs switch setting, for each of the one or more switch devices, that corresponds to the determined system configuration, via at least one initiator port connected to the switch device.
    Type: Grant
    Filed: September 13, 2016
    Date of Patent: December 10, 2019
    Assignee: Hitachi, Ltd.
    Inventors: Hidechika Nakanishi, Tetsuya Inoue
  • Patent number: 10506139
    Abstract: A reconfigurable pin-to-pin interface includes lane circuits and a reconfiguration circuit. A first lane circuit of the lane circuits obtains a first received signal by receiving a first input signal transmitted via a first lane. A second lane circuit of the lane circuits obtains a second received signal by receiving a second input signal transmitted via a second lane. When the second lane is used as one data lane and the first lane is used as one clock lane, the reconfiguration circuit redirects the first received signal to the second lane circuit for acting as an clock input of the second lane circuit. When the first lane is used as one data lane, the reconfiguration circuit blocks the first received signal from being redirected to the second lane circuit for acting as the clock input of the second lane circuit.
    Type: Grant
    Filed: July 3, 2018
    Date of Patent: December 10, 2019
    Assignee: MEDIATEK INC.
    Inventors: Li-Hung Chiueh, Man-Ju Lee, Chen-Yu Hsiao, Ching-Hsiang Chang
  • Patent number: 10469403
    Abstract: Embodiments can provide additional computing resources at minimal and incremental cost by providing instances of one or more server compute subsystems on a system-on-chip. The system-on-chip can include multiple compute subsystems where each compute subsystem can include dedicated processing and memory resources. The system-on-chip can also include a management compute subsystem that can manage the processing and memory resources for each subsystem.
    Type: Grant
    Filed: December 19, 2014
    Date of Patent: November 5, 2019
    Assignee: Amazon Technologies, Inc.
    Inventors: Mark Bradley Davis, David James Borland
  • Patent number: 10452595
    Abstract: Provided is an information processing apparatus including a processor and a PCI node connected to the processor via a first PCI bus, the processor obtaining a class code and a subclass code from the PCI node connected to the first PCI bus, determining whether or not the PCI node is a bridge based on the obtained class code and subclass code, searching for a PCI node connected to the PCI node via a second PCI bus based on having determined that the PCI node is a bridge, and searching for another PCI node connected to the first PCI bus based on having determined that the PCI node is not a bridge.
    Type: Grant
    Filed: October 20, 2015
    Date of Patent: October 22, 2019
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Takaaki Miyata
  • Patent number: 10425359
    Abstract: A packet data network traffic management device comprises a plurality of ports comprising at least a first port, a second port, and a third port; and a plurality of deterministic multi-threaded deterministic micro-controllers, each of the micro-controllers associated with a corresponding one of the ports to control packet data through the corresponding port; and the plurality of multi-threaded deterministic micro-controllers cooperatively operate to selectively communicate data packets between the plurality of ports.
    Type: Grant
    Filed: September 28, 2017
    Date of Patent: September 24, 2019
    Assignee: INNOVASIC, INC.
    Inventors: Andrew David Alsup, Taylor M. Wray, Kurt H. Coonrod
  • Patent number: 10394990
    Abstract: Devices and methods for initializing one or more registers of a programmable integrated circuit (IC) to store an initial condition value are provided. A first bitstream that programs the region of the IC to supply the initial condition value to the one or more registers is first programmed on the IC. Then, once the registers are initialized with the initial condition value, a second bitstream is subsequently programmed to the region of the IC to supply values associated with a function of the design to the one or more registers.
    Type: Grant
    Filed: September 27, 2016
    Date of Patent: August 27, 2019
    Assignee: Altera Corporation
    Inventors: Kalen Brunham, Kevin Nealis, Yi Peng, Scott Weber
  • Patent number: 10394570
    Abstract: A method of generating a boot image for fast booting an image forming apparatus. In the method, a boot image is generated to contain information regarding a system state after processes that are not used to execute an operating system and at least one application are terminated. Then, the image forming apparatus is fast booted using the boot image.
    Type: Grant
    Filed: October 12, 2012
    Date of Patent: August 27, 2019
    Assignee: HP PRINTING KOREA CO., LTD.
    Inventors: Kun-hoon Baik, Ji-sub Park, Joung-hoon Choo, Hyun-suk Lee
  • Patent number: 10366029
    Abstract: An electronic device includes a connector, a first communication circuit connected with the connector, a second communication circuit connected with the connector, and a processor. The processor is configured to verify identification information corresponding to an external electronic device connected with the electronic device through the connector, to receive or transmit, if the external electronic device is an electronic device of a first type, data from or to the external electronic device through the first communication circuit and the second communication circuit based on the identification information, and to receive or transmit, if the external electronic device is the electronic device of a second type, data from or to the external electronic device through the first communication circuit based on the identification information.
    Type: Grant
    Filed: January 20, 2017
    Date of Patent: July 30, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Woo Kwang Lee, Hyuk Kang, Kyoung Hoon Kim, Min Jung Kim
  • Patent number: 10360168
    Abstract: A computing system comprises one or more cores. Each core comprises a processor. In some implementations, each processor is coupled to a communication network among the cores. In some implementations, a switch in each core includes switching circuitry to forward data received over data paths from other cores to the processor and to switches of other cores, and to forward data received from the processor to switches of other cores.
    Type: Grant
    Filed: April 11, 2017
    Date of Patent: July 23, 2019
    Assignee: Mellanox Technologies, Ltd.
    Inventors: Patrick Robert Griffin, Carl G. Ramey
  • Patent number: 10345850
    Abstract: An apparatus is provided comprising a memory and a processor configured to: execute a device driver for operating a device; detect a data throughput associated with the device driver; identify a configuration setting based on the data throughput; and re-configure the apparatus based on the configuration setting.
    Type: Grant
    Filed: August 6, 2015
    Date of Patent: July 9, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyoungdon Jang, Dohyoung Kim, Joohwan Kim, Hyunjin Park
  • Patent number: 10346345
    Abstract: The disclosed technology is generally directed to peripheral access. In one example of the technology, stored configuration information is read. The stored configuration information is associated with mapping a plurality of independent execution environments to a plurality of peripherals such that the peripherals of the plurality of peripherals have corresponding independent execution environments of the plurality of independent execution environments. A configurable interrupt routing table is programmed based on the configuration information. An interrupt is received from a peripheral. The interrupt is routed to the corresponding independent execution environment based on the configurable interrupt routing table.
    Type: Grant
    Filed: May 26, 2017
    Date of Patent: July 9, 2019
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: George Thomas Letey, Douglas L. Stiles, Edmund B. Nightingale
  • Patent number: 10331605
    Abstract: A computer-implemented method determines that a link operation associated with a first link, among the set of interface links in a computing system, has resulted in a first set of signal lanes, included in the first link, becoming unused. The method further includes determining a link configuration and selecting, based on the link configuration, a second link from among the interface links, and determining a second set of signal lanes, from among the unused signal lanes included in the first link, to include in the second link. The signal lanes to include in the second link are based on an attribute associated with the second link. The method further includes dynamically reconfiguring the signal lanes included in the second to set to be included in the lanes in the second link. Some computing systems include a lane routing device connected to signal lanes of links among the interface links.
    Type: Grant
    Filed: August 30, 2016
    Date of Patent: June 25, 2019
    Assignee: International Business Machines Corporation
    Inventors: Victor A. Garibay, Daniel E. Hurlimann, Chetan Mehta, Fernando Pizzano, Thomas R. Sand
  • Patent number: 10331557
    Abstract: A firmware attempts to allocate memory address resources, such as memory addresses in a PCI I/O and a PCI memory address space, to bus devices in a multi-processor computing system. If an out-of-resource (OOR) condition occurs during allocation of the memory address resources, memory address resources can be re-allocated from stacks that were successfully allocated requested resources to stacks that were not successfully allocated requested resources. Memory address resources can also, or alternately, be re-allocated from sockets that were successfully allocated requested resources to sockets that were not successfully allocated requested resources. If stack-level or socket-level readjustment of the memory address resource allocation fails, a base memory address of a configuration memory address space can be lowered, and the allocation can be retried.
    Type: Grant
    Filed: December 29, 2017
    Date of Patent: June 25, 2019
    Assignee: American Megatrends International, LLC
    Inventors: Manickavasakam Karpagavinayagam, Harikrishna Doppalapudi, Altaf Hussain, Purandhar Nallagatla
  • Patent number: 10320191
    Abstract: A communication system comprising a central bus module for providing AC supply voltage, a bus line system connected thereto, and a number of subscriber devices connected to the bus line system, wherein power supply of the electronic part of the subscriber devices is achieved by means of an AC/DC rectifier circuit.
    Type: Grant
    Filed: October 24, 2013
    Date of Patent: June 11, 2019
    Assignee: Phoenix Contact GmbH & Co. KG
    Inventors: Johannes Kalhoff, Peter Scholz, Lars-Peter Wimmer
  • Patent number: 10310740
    Abstract: Aligning memory access operations to a geometry of a storage device, including: receiving, by a storage array controller, information describing the layout of memory in the storage device; determining, by the storage array controller, a write size in dependence upon the layout of memory in the storage device; and sending, by the storage array controller, a write request addressed to a location within the memory unit in dependence upon the layout of memory in the storage device.
    Type: Grant
    Filed: June 23, 2015
    Date of Patent: June 4, 2019
    Assignee: Pure Storage, Inc.
    Inventors: John Colgrove, Peter E. Kirkpatrick
  • Patent number: 10313139
    Abstract: In one embodiment, a master device has a first port and a second port and initially applies a DC voltage only to the first port. A plurality of slave devices, each have a third port and a fourth port, are serially connected to the master device in a ring, via conductors, starting at the first port and ending at the second port. The conductors simultaneously carry the DC voltage and differential data. Each slave device, after performing a detection routine, then sequentially applies the DC voltage to the adjacent downstream slave device in a first direction around the ring. If the master does not detect the presence of the DC voltage at its second port, the master device applies the DC voltage to both the first port and the second port to sequentially power up the slave devices in both directions around the ring of slave devices.
    Type: Grant
    Filed: April 4, 2017
    Date of Patent: June 4, 2019
    Assignee: Linear Technology Corporation
    Inventors: David M. Dwelley, Andrew J. Gardner
  • Patent number: 10275259
    Abstract: Methods and systems are disclosed for booting an integrated circuit (IC). In an example implementation, boot read only memory (ROM) code is loaded for execution by a processor circuit of the IC. Via execution of the boot ROM code on the processor circuit, a first boot image is retrieved. A memory address is communicated from a host device to the processor circuit of the IC via an external data bus coupled to a bus interface circuit in the IC. The bus interface circuit is configured by execution of the first boot image to map a first block of addresses on the internal data bus to a second block of addresses on the host device starting at the memory address. When bus mastering is enabled, the processor retrieves a second boot image from the host device by issuing read requests to the first block of addresses.
    Type: Grant
    Filed: January 27, 2016
    Date of Patent: April 30, 2019
    Assignee: XILINX, INC.
    Inventor: Sunita Jain
  • Patent number: 10263790
    Abstract: A secure programming system can receive a job control package having a security kernel and a target payload of content for programming into a pre-defined set of trusted devices. A device programmer can install a security kernel on the trusted devices and reboot the trusted devices using the security kernel to validate the proper operation of the security kernel. The target payload can then be securely installed on the trusted devices and validated.
    Type: Grant
    Filed: September 4, 2018
    Date of Patent: April 16, 2019
    Assignee: Data I/O Corporation
    Inventors: Rajeev Gulati, David R. Christie, Edwin R. Musch, Benjamin M. Deagen
  • Patent number: 10254679
    Abstract: A memory control device includes a memory control part that controls memory through an interface part in accordance with a predetermined communication regulation, an illegal access detection part that detects an illegal access to the memory according to an access state from the memory control part to the memory and a signal state of the interface part, and a signal control part that switches the signal state of the interface part from a write-allowed state, in which the interface part is able to be written, to a write-inhibited state, in which the interface part is protected from being rewritten, when the illegal access is detected by the illegal access detection part.
    Type: Grant
    Filed: June 20, 2017
    Date of Patent: April 9, 2019
    Assignee: Oki Data Corporation
    Inventors: Kazuya Yamamoto, Keisuke Iwahashi, Keisuke Watanabe, Takashi Kobayashi, Keitaro Ishida, Yasushi Yamawaki
  • Patent number: 10248431
    Abstract: The present disclosure relates to a system and method for enabling implementation of a secondary function of a universal serial bus (USB) device on a computer that the USB device is communicating with, wherein an operating system of the computer does not have a required driver which needs to be mapped to the USB device to enable implementation of the secondary function. The system involves a USB device which has the required driver for implementing the secondary function stored therein. The required driver can be supplied to the computer from the USB device using a control which selects the secondary function of the USB device.
    Type: Grant
    Filed: January 5, 2016
    Date of Patent: April 2, 2019
    Assignee: VERTIV IT SYSTEMS, INC.
    Inventors: James R. Mataya, Christopher R. Hinshaw, Karl S. Mills
  • Patent number: 10235156
    Abstract: In some examples, version data in an extension point of a graphical user interface of a version of a software application may be identified. In some examples, based on the identified version data, a version of a user interface module available to integrate with the user interface of the version of the software application may be determined.
    Type: Grant
    Filed: December 1, 2016
    Date of Patent: March 19, 2019
    Assignee: ENTIT SOFTWARE LLC
    Inventors: Christopher Johnson, Peter Choi, Jason Miller
  • Patent number: 10223315
    Abstract: Systems, methods, apparatuses, and software for data storage systems are provided herein. In one example, a data storage system is provided that includes storage drives each comprising a PCIe interface, and configured to store data and retrieve the data stored on associated storage media responsive to data transactions received over a switched PCIe fabric. The data storage system includes processors configured to each manage only an associated subset of the storage drives over the switched PCIe fabric. A first processor is configured to identify first data packets received over a network interface associated with the first processor within a network buffer of the first processor as comprising a storage operation associated with at least one of the plurality of storage drives managed by a second processor, and responsively transfer the first data packets into a network buffer of the second processor.
    Type: Grant
    Filed: September 19, 2017
    Date of Patent: March 5, 2019
    Assignee: Liqid Inc.
    Inventors: Jason Breakstone, Christopher R. Long, James Scott Cannata
  • Patent number: 10210126
    Abstract: A device includes a first interface to receive a signal from a first communication link, wherein the receive signal includes out-of-band (OOB) information. A detector coupled to the first interface detects the OOB information. An encoder coupled to the detector encodes the OOB information into one or more symbols (e.g., control characters). A second interface is coupled to the encoder and a second communication link (e.g., a serial transport path). The second interface transmits the symbols on the second communication link. The device also includes mechanisms for preventing false presence detection of terminating devices.
    Type: Grant
    Filed: October 16, 2017
    Date of Patent: February 19, 2019
    Assignee: RAMBUS INC.
    Inventor: Michael J. Sobelman
  • Patent number: RE47290
    Abstract: According to one embodiment, a semiconductor device includes a device. The device includes a decoder, a generation circuit, a register, and a modifier. The decoder analyzes a command of a received packet. The generation circuit generates a unique device number in accordance with information in the packet. The register holds the generated unique device number. The modifier updates and outputs the packet. When a packet issued by a host is a command packet, among broadcast packets which return to the host through one or more devices, for determining the unique device number, the command packet includes parameters of an initial value and final value of device number.
    Type: Grant
    Filed: March 22, 2017
    Date of Patent: March 12, 2019
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventor: Akihisa Fujimoto