Abstract: A data acquisition system includes a receptacle and a data acquisition device. The receptacle has a housing, sensor inputs to receive data signals from sensors coupled to an object, and a rib to block insertion of a standard Universal Serial Bus (USB) plug and facilitate insertion of a modified USB plug having a slot that mates with the rib. The data acquisition device includes circuitry to receive, store and process data, a USB plug having pins operatively coupled to the circuitry, a first subset of pins configured to receive data signals from the receptacle and a second subset of pins configured to support standard USB communication with USB-compliant devices, and a slot formed in the USB plug such that the slot facilitates interconnection of the USB plug both with standard USB-compliant devices and with the receptacle, the slot mating with the rib to facilitate interconnection.

Abstract: An operating method of a semiconductor device includes selecting a block requiring storage space recycling from a memory device, checking costs required for performing the respective recycling techniques, selecting one of the recycling techniques based on the costs, and recycling a storage space by applying the selected recycling technique to the selected block.

Abstract: The present disclosure includes methods and devices for a memory controller. In one or more embodiments, a memory controller includes a plurality of back end channels, and a command queue communicatively coupled to the plurality of back end channels. The command queue is configured to hold host commands received from a host. Circuitry is configured to generate a number of back end commands at least in response to a number of the host commands in the command queue, and distribute the number of back end commands to a number of the plurality of back end channels.

Abstract: In an embodiment, a computing device may include a control unit. The control unit may acquire a request from a central processing unit (CPU), contained in the computing device, that may be executing a basic input/output system (BIOS) associated with the computing device. The request may include a request for a value that may represent a maximum authorized storage size for a storage contained in the computing device. The control unit may generate the value and send the value to the CPU. The CPU may generate a system address map based on the value. The CPU may send the system address map to the control unit which may acquire the system address map and configure an address decoder, contained in the computing device, based on the acquired system address map.

Abstract: A circular queue implementing a scheme for prioritized reads is disclosed. In one embodiment, a circular queue (or buffer) includes a number of storage locations each configured to store a data value. A multiplexer tree is coupled between the storage locations and a read port. A priority circuit is configured to generate and provide selection signals to each multiplexer of the multiplexer tree, based on a priority scheme. Based on the states of the selection signals, one of the storage locations is coupled to the read port via the multiplexers of the multiplexer tree.

Abstract: A BIOS storage unit of an electronic device is connected to a USB 3.0 extension unit of a USB 3.0 host connector. A microcomputer of a USB compatible device is connected to a USB 3.0 extension unit of a USB 3.0 device connector. The microcomputer of the USB compatible device can write and read the BIOS data to/from the BIOS storage unit of the electronic device through the USB 3.0 extension units. Moreover, the microcomputer of the USB compatible device compares the BIOS data read from the BIOS storage unit of the electronic device with the BIOS data stored in its own storage unit, and notifies a result of the comparison.

Abstract: An information processing apparatus capable of easily registering and deleting configuration information and providing excellent user-friendliness. An integrated application that operates on the information processing apparatus capable of communicating with an image processing apparatus through a network sets configuration information for use by the image processing apparatus for data transmission, and instructs the image processing apparatus to display an icon corresponding to the configuration information on a touch panel of the image processing apparatus. When one of icons displayed on the touch panel is touched, data is transmitted from the image processing apparatus to a transmission destination represented by the confirmation information corresponding to the icon. If the data is successfully received by the transmission destination, the integrated application instructs the image processing apparatus to delete the configuration information corresponding to the touched icon.

Abstract: A shared device unit, which comprises a storage device, is coupled to a plurality of storage systems. The shared device unit provides a plurality of storage areas, which are based on the storage device, to the plurality of storage systems. Each storage system stores allocation management information which comprises an ID of a storage area provided to thereof among the plurality of storage areas, and provides the storage area corresponded to the ID included in the allocation management information to the host computer coupled thereto among the plurality of host computers.

Abstract: A system for achieving a uniform device abstraction layer is described. The system includes a device class determiner coupled with a local server, the device class determiner configured for establishing a device class for at least one device residing in a domain at a premises, wherein the domain is coupled with a remote server, and a device of the at least one device includes a communication port that supports a first protocol corresponding to a second protocol, wherein the second protocol is supported by a device driver coupled with the domain, wherein based on the establishing the device class, an action is enabled to be mapped to the device, thereby enabling an application to run on and utilize a capability of the device.

Abstract: A modular mass storage system and method that enables cableless mounting of ATA and/or similar high speed interface-based mass storage devices in a computer system. The system includes a printed circuit board, a system expansion slot interface on the printed circuit board and comprising power and data pins, a host bus controller on the printed circuit board and electrically connected to the system expansion slot interface, docking connectors connected with the host bus controller to receive power and exchange data therewith and adapted to electrically couple with industry-standard non-volatile memory devices without cabling therebetween, and features on the printed circuit board for securing the memory devices thereto once coupled to the docking connectors.

Abstract: Method and system for testing any type of video display, video monitor or other device that produces a video signal, and that is capable of providing information about the video and optionally audio specifications and/or capabilities of the output signal to an external device when coupled thereto. The external device obtains the information about the specifications and/or capabilities and based thereon, assembles one or more pre-defined tests from a test database/repository containing tests to enable testing of compliance of the video signal producing device to those specifications and/or capabilities. This compliance testing may entail generating video or audio content at a source generator, providing it to the video signal producing device, and determining the accuracy of the output of the video signal producing device to the input content. A determination of the results of this test may be provided to an operator of the testing apparatus.

Abstract: A fieldbus gateway using a virtual serial fieldbus port and a data transmission method thereof are provided. By receiving a fieldbus frame containing target data through a virtual serial fieldbus port connected to a source device or a target device via a fieldbus gateway and sending another fieldbus frame containing the target data via other fieldbus port to target devices or source devices, the system and the method can provide two or more remote devices to control one controlled device at the same time. The invention also achieves the effect of using one virtual serial fieldbus port to transmit data between multiple source devices and target devices concurrently.

Abstract: A data transfer method of a storage device which includes a host bus adaptor to communicate with an external host via a first interface and to communicate internally via a second interface is provided. The data transfer method may include issuing a write command and a read command to the host bus adaptor; performing a read direct memory access operation using the first interface in response to the write command and simultaneously performing a write direct memory access operation using the second interface in response to the read command; and generating frame information structure (FIS) sequences according to the second interface in response to the issued write command and the issued read command. The first interface may perform a full duplex data transfer and the second interface may perform a half-duplex data transfer.

Abstract: A hybrid drive includes multiple parts: a performance part (e.g., a flash memory device) and a base part (e.g., a magnetic or other rotational disk drive). A drive access system, which is typically part of an operating system of a computing device, issues input/output (I/O) commands to the hybrid drive to store data to and retrieve data from the hybrid drive. The drive access system assigns, based on various available information, a priority level to groups of data identified by logical block addresses (LBAs). With each I/O command, the drive access system includes an indication of the priority level of the LBA(s) associated with the I/O command. The hybrid drive determines, based on the priority level indications received from the drive access system, which LBAs are stored on which part or parts of the hybrid drive.

Abstract: In one embodiment, a computer system comprises one or more processors, a circuit board assembly having at least one SATA port, a general purpose input/output port proximate the SATA port, signal generating logic to generate a signal when the general purpose input/output port is coupled to a connector, and a memory module communicatively connected to the one or more processors and comprising logic instructions stored in a computer readable medium which, when executed on the one or more processors, configure the one or more processors to configure the SATA port according to the signal generated by the signal generating circuitry.

Abstract: A connection switching device for an aircraft network includes a switching network and a second identification device. The switching network connects input/output devices, such that applications may be interconnected or such that an application may be connected to a peripheral device. The second identification device detects an input/output device that is connected to the connection switching device.

Abstract: A method for communicating data between peripheral devices and an embedded processor that includes receiving, at a data buffer unit of the embedded processor, the data from a peripheral device. The method also includes copying data from the data buffer unit into the bridge buffer of the embedded processor as a bridge buffer message. Additionally, the method includes creating, after storing the data as a bridge buffer message, a peripheral device message comprising the bridge buffer message, and sending the peripheral device message to a thread message queue of a subscriber.

Abstract: Mechanisms are provided for providing an early warning of an error state of a remote direct memory access (RDMA) resource to a userspace application. The mechanisms detect, using kernelspace logic, an error event having occurred, and perform a write operation to write an error state value to a userspace shared memory state data structure indicating the RDMA resource to be in an error state. The mechanisms detect, using userspace logic, the RDMA resource being in an error state by reading the error state value from the userspace shared memory state data structure in response to a userspace application attempting to perform a RDMA operation using the RDMA resource. In addition, the mechanisms initiate, by the userspace application, an operation to tear down the RDMA resource in response to detecting the RDMA resource being in the error state.

Abstract: A method and system for communicating data between two devices are described herein. The method detects an electrical signal of a first protocol from a first device in a repeater, wherein the first protocol comprises single-ended signaling. The method also determines the speed of the electrical signal. Additionally, the method converts the electrical signal of the first protocol into an electrical signal of a second protocol based on the speed of the electrical signal. The second protocol comprises differential signaling. Furthermore, the method sends the electrical signal of the second protocol to a second device. In addition, the method stops the electrical signal of the second protocol to the second device when the electrical signal of the second protocol indicates an end of data flow.

Abstract: A data storage device and a FLASH memory control method with a cache space. The FLASH memory control method includes the following steps: using a plurality of channels to access a FLASH memory, wherein the FLASH memory has a plurality of blocks each with a plurality of pages, and the blocks are grouped to be accessed by the different channels; allocating a random access memory to provide a cache space, the cache space having a plurality of cache areas caching write data for the different channels, respectively; distributing the data issued from a host to correspond to the different channels; and reusing a latest-updated cache area of the cache space to cache write data when a logical address requested to be written with data is identical to a logical address that the latest-updated cache area corresponds to.

Abstract: A computer program product includes a tangible storage storing instructions for performing a method. The method includes: receiving a request at a channel subsystem in a host computer system to provide a channel path description for a channel path, the channel subsystem including a channel configured to be coupled to a control unit via the channel path, the channel configured to control information transfer over the channel path; and outputting a channel path description block from the channel subsystem to the operating system in response to the request, the channel path description block including channel path identification and description information, the channel path description block specifying whether the channel path supports a Fiber Channel protocol for commanding an I/O operation, the channel path description block specifying whether the channel path supports an extension to the Fiber Channel protocol based on the channel path supporting the Fiber Channel protocol.

Abstract: An electronic device is connectable to an external device. An interface substrate is detachably connected to a main substrate. A first interface is installed on the interface substrate, and the first interface is connectable to the external device. A second interface is installed on the main substrate, and the second interface is connectable to the external device. A selection unit selects one interface of the first interface on the interface substrate and the second interface on the main substrate. A communication unit communicates information with the external device through the interface selected by the selection unit. At least one of the first interface and the second interface is configured to detect a connection state to the external device. The selection unit selects an interface which is designated or preferentially selects an interface which detects a connection to the external device.

Abstract: The defined architecture allows for format-efficient data storage on bit-patterned media, while allowing for typical variations in the drive, such as reader to writer gap variations. The defined BPM architecture relaxes some timing requirements on real-time signaling from the formatter to the channel, while enabling bit-accurate alignment between data accesses and the media.

Abstract: A method of performing discovery in a data storage fabric is disclosed. Performing discovery includes performing a first stage of discovery on expanders in the data storage fabric prior to broadcasting a discovery command to initiators on the data storage fabric. After the first stage has completed, providing the discovery command to the initiators to perform a second stage of discovery.

Abstract: A method, executed by a computer, for controlling storages includes obtaining time elapsed since data to be moved in a source storage in three or more storages whose performance for response to an access request is different is accessed in accordance with the access request, identifying, from the storages, a destination storage that meets condition under which the data to be moved in the source storage is moved, based on the obtained elapsed time by referring to a storage unit that stores the condition under which data is moved to each of the storages, and moving the data to be moved in the source storage to the identified destination storage.

Abstract: Described is a technology by which the operation of an auxiliary computing device, comprising a display and/or actuator set, may be automatically modified based on detected state data. For example, user input may be routed from the actuator set to the host computer system when the host computer system is in an online state, or to the auxiliary computing device when the host computer system is offline. State may be determined based on one or more various criteria, such as online or offline, laptop lid position, display orientation, current communication and/or other criteria. The auxiliary display and/or actuator set may be embedded in the host computer system, or each may be separable from it or standalone, such as a remote control or cellular phone.

Abstract: Method for detecting presses on buttons of an electronic device with a reduced number of General Purpose In/Out (GPI/O) ports includes a number of the GPI/O ports The number of the buttons is greater than the number of the GPI/O ports. A proportion of the buttons are each coupled between one of the I/O ports and ground, and the remaining proportion of the buttons are each coupled between any two of the I/O ports. The GPI/O ports are set to work in a first working state or in a second state to provide a first signal or second signal respectively. When a signal provided by a GPI/O port working at the first working mode changes, the method determines which one of the buttons has been pressed.

Abstract: An electronic device including a semiconductor memory is provided. The semiconductor memory includes an interlayer dielectric layer disposed over a substrate, and having a recess which exposes a portion of the substrate; a bottom contact partially filling the recess; and a resistance variable element including a bottom layer which fills at least a remaining space of the recess over the bottom contact, and a remaining layer which is disposed over the bottom layer and protrudes out of the interlayer dielectric layer.

Abstract: A communications cable including a first communications interface configured to be connected to a storage device, a second communications interface configured to receive data and power, a wireless access module configured to be powered by the power received by the second communications interface and to enable wireless access of the storage device, and a cable unit including one or more cables and configured to connect the wireless access module to the first communications interface and the second communications interface, and the first communications interface to the second communications interface.

Abstract: Various techniques relating to drive train control are disclosed. In an embodiment, in a first mode of operation communication between a controller and a submodule of the drive train takes place via a first communication channel and optionally additionally via a second communication channel. In a second mode of operation, upon failure of the first communication channel, communication with the submodule of the drive train takes place via the second communication channel.

Abstract: A device comprises circuitry configured for being communicatively coupled to a transceiver. In operation, the device is configured to receive a first message from another device to support at least one aspect of attachment of the device and the another device and to send, to the another device, a second message after the first message and prior to attachment. In operation, the device is further configured to receive, from the another device, a third message that is sent after the second message and prior to attachment and send, directly to the another device, data utilizing at least one channel for data transfer utilizing a second one of the addresses for identification in association with the device on the shared wireless communication medium, for data transfer after attachment in connection with a group that is controlled by the another device.

Abstract: Various structures and methods are disclosed related to configurable scrambling circuitry. Embodiments can be configured to support one of a plurality of protocols. Some embodiments relate to a configurable multilane scrambler that can be adapted either to combine scrambling circuits across a plurality of lanes or to provide independent lane-based scramblers. Some embodiments are configurable to select a scrambler type. Some embodiments are configurable to adapt to one of a plurality of protocol-specific scrambling polynomials. Some embodiments relate to selecting between least significant bit (“LSB”) and most significant bit (“MSB”) ordering of data. In some embodiments, scrambler circuits in each lane are adapted to handle data that is more than one bit wide.

Abstract: An intelligent serial interface circuit in accordance with one embodiment of the invention can include a first communication interface circuit for enabling a first communication protocol. The intelligent serial interface circuit can also include a second communication interface circuit for enabling a second communication protocol. Furthermore, the intelligent serial interface circuit can include a detector circuit coupled to the first communication interface circuit and the second communication interface circuit. The detector circuit can be for automatically detecting a factor that indicates automatically enabling the first communication interface circuit and automatically disabling the second communication interface circuit. The detector circuit can be for detecting a coupling of a pin of the first communication interface circuit that is not used by the second communication interface circuit.

Abstract: Disclosed is a storage device interface. The storage device interface includes a plurality of PCIe device request engines. These PCIe device request engines receive I/O commands formatted for a respective one of a plurality of PCIe storage device communication standards. The storage device interface also includes a plurality of PCIe device completion engines. These PCIe device completion engines receive notifications of command completions from a plurality of PCIe storage devices that communicate using the aforementioned plurality of PCIe storage device communication standards. These notifications are validated. If an error is detected, processing of notifications of command completions associated with that device are blocked until the error is resolved. The plurality of PCIe device request engines and the PCIe device completion engines operate concurrently to process received I/O commands and received command completions.

Abstract: A host device can enable operation with a client device based on stored or cached enumeration information. The enumeration information can be initially received from the client device during a first configuration process, and stored or cached in volatile and/or non-volatile storage accessible by the host device. During subsequent configuration processes, operation with the client device can be enabled based on the stored or cached enumeration information. Operation between the host device and the client device can be facilitated through a communication protocol, such as the universal serial bus (USB) protocol. A host device and client device can be connected via a traditional USB or USB High Speed Inter-Chip (HSIC) connection.

Abstract: A semiconductor device includes a controller chip, a plurality of semiconductor chips operatively connected to the controller chip, wherein at least one of the plurality of semiconductor chips is operatively supplied with a pulse signal from the controller chip, and operatively supplied identification information, wherein each of the plurality of semiconductor chips is configured to store the identification information in response to the pulse signal received from the controller chip, and wherein each of the plurality of semiconductor chips is configured to block transmission of the pulse signal to a following semiconductor chip in a signal path among the plurality of semiconductor chips until identification information is stored therein.

Abstract: Disclosed herein is a system having a multi-processor configuration for electronics devices and systems, such as, computing and communication devices like laptop, notebook, tablets, smartphones, etc. In accordance with one embodiment of the subject matter the system comprises a plurality of processors and a multi protocol multi-root input output virtualization (MPMRIOV) switch communicatively coupled to at least one of the plurality of processors. The system further includes a peripheral and interface virtualization unit (PIVU) coupled to the MPMRIOV switch. In said embodiment, the PIVU is configured to communicatively couple at least one of the plurality of processors with at least one of a Peripheral Component Interconnect (PCI) compliant peripheral, a Peripheral Component Interconnect express (PCIe) compliant peripheral, a non PCI compliant peripheral, and a non PCIe compliant peripheral.

Abstract: A first storage system is configured as a proxy for a logical volume stored on a second storage system. The first computer system receives an I/O request from a host computer for the logical volume, the host computer, and identifies a port on the second storage system for the I/O request. In some embodiments, the second storage system has multiple SCSI ports, and the identified port comprises a least busy SCSI port. A probe request verifying availability of the logical volume is conveyed to the identified port, and upon receiving a response from the second storage system verifying the availability of the logical volume for the I/O request, the I/O request is conveyed to the identified port, a result of the I/O request is received from the identified port, the result is conveyed to the host computer.

Abstract: A control method for a USB 3.0 (USB: Universal Serial Bus) device includes controlling the USB 3.0 device that has entered an SS.Disabled state to transition to an Rx.Detect state when a USB 2.0 connection is not established with a USB host even after a predetermined time, the USB 2.0 connection including any one of an HS (High Speed) connection, an FS (Full Speed) connection, and an LS (Low Speed) connection.

Abstract: Detection of remote computing devices triggers a wakeup signal that subsequently activates a remote computing environment. The remote computing environment can be utilized at substantially the same time as a local computing environment or at a different time. A list of available remote peripheral devices can be gathered automatically and/or based on a user request. One or more of the peripheral devices can be chosen by the user and/or chosen automatically based on various criteria. After selection of one or more devices, a wakeup trigger is sent to activate a remote computing environment that includes the one or more devices. The remote computing environment can be monitored and if the devices are no longer available, deactivation of the remote computing environment is performed automatically.

Abstract: A device for transmitting multiple control formats from an audio/video source to an audio/video monitor receiver. The device includes a high definition multimedia interface cable that has a plurality of communication channels, including a consumer electronic control channel. Furthermore, a pair of plugs are coupled to the respective ends of the high definition multimedia interface cable and can be coupled to audio/video sources and receivers. A pair of interface ports are further coupled to the high definition multimedia interface cable and communicatively coupled to the consumer electronic control channel. The device transmits a first control format on the consumer electronic control channel when the input port is not coupled to a switching device and transmits a second control format on the consumer electronic control channel when the input port is coupled to a switching device.

Abstract: An apparatus and method for a Universal Serial Bus (USB) isolating device. An USB isolating device includes a downstream facing circuit and a upstream facing circuit. The downstream facing circuit is coupled to a peripheral device via a first pair of signals and is configured for detecting a speed at which the peripheral device is operating based on a first voltage configuration on the first pair of signals. The upstream facing circuit is coupled to the downstream facing circuit and a host/hub via a second pair of signals and is configured for communicating with the downstream facing circuit on the speed of the peripheral device and adaptively creating a second voltage configuration on the second pair of signals to facilitate the host/hub to adapt to the speed of the peripheral device.

Abstract: According to one embodiment, a receiving device configured to receive a stream transmitted from a transmitting device connected by an MHL cable in compliance with an MHL standard, including, two or more HDMI terminals, to which the MHL cable is connected, two or more MHL processors, each configured to process signals of the stream input to the HDMI terminals in compliance with an MHL standard, and a switch configured to switch connection between the terminals and one of the MHL processors based on whether the MHL cable is connected thereto.

Abstract: A source of video data may be coupled to a plurality of sinks using a wireless branch device with more than one connector. Numbers may be assigned to the connectors in a sequence depending on the wireless technology used by each connector. Examples of wireless technologies include DisplayPort, HDMI, and Wireless Gigabit Alliance. Sinks coupled to the branch device are interrogated to determine the number of connectors and each connector's wireless technology.

Abstract: A computer program product is provided for performing an input/output (I/O) operation initiated by an I/O operation instruction at a host computer system configured for communication with a control unit. The computer program product includes a tangible storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing: receiving, by the control unit, a transport mode command message from a channel subsystem of the host computer system, the command message include a command for data to be transferred between the host computer system and an I/O device controlled by the control unit; and sending a command retry message to the channel subsystem, the command retry message including a request that the command message be re-sent to the control unit and a reason code indicating a reason for the request.

Abstract: A computer implemented method, a computer program product, and a computer negotiate pin assignment for a cabling interface. A cabling interface discovers an attached device through an interrogation from a connected port. The cabling interface performs a handshake with the attached device. The handshake shares information on the protocols, bandwidth needs, streams and pins supported by the attached device. The cabling interface declares a set of supported streams needed for communication by the cabling interface. The cabling interface negotiates pin layout for each streams that will be used for communication between the cabling interface and the attached device. The cabling interface assigns pins based on needs of the attached device and needs of the cabling interface.

Abstract: A peripheral component interconnect (PCI) express switch apparatus and a method of controlling a connection thereof are provided. In this apparatus, a first virtual bridge is connected to a computer system through a first PCI express port to perform data transmission and reception according to a PCI method with an external device, and a second virtual bridge is connected to an external device through the first virtual bridge and a second PCI express port and enables the external device to perform data transmission and reception with the computer system and according to the PCI method by cooperating with the first virtual bridge. A first cable matching device is connected to the first virtual bridge. Further, a second cable matching device is connected to the second virtual bridge and is connected to the first cable matching device through a PCI cable.

Abstract: In a Universal Serial Bus (USB) enumeration procedure, a USB Host questions a USB Device for its capabilities and chooses a set of capabilities that best fit. When the USB Device is enumerated, the USB Host may perform several time-consuming and power-consuming operations. However, when the USB Device is tightly or permanently coupled to the USB Host, part of the enumeration procedure may be redundant and can be eliminated. Accordingly, a method, an apparatus, and a computer program product for shortening enumeration of the USB Device tightly coupled to the USB Host are provided. The USB Host sends a request for a Device descriptor to the USB Device, receives a plurality of descriptors in a single transfer from the USB Device, and sets a configuration of the USB Device based on the received plurality of descriptors.

Abstract: Embodiments of the invention are directed to input devices configured for use with computing devices. The present invention relates to methods and devices for establishing, maintaining and managing, wireless connections with between an input device and one or more host devices that the input device is paired with. The input device may include sensory feedback indicating the host device actively paired with the input device, and may enable switching between host devices.

Abstract: Described embodiments provide a method and user equipment for controlling a plurality of coupled external devices. The method may include determining whether one of applications installed in user equipment is activated upon receipt of a user input when the user equipment is coupled to a plurality of external devices, selecting one of the coupled external devices as a target external device to be mapped, when the application is determined as being activated, and mapping the selected coupled external device with the activated application and establishing a signal route between the user equipment and the selected coupled external device in association with the activated application.