Abstract: A controller for an autonomous network includes a processor configured to execute composable and replaceable modules in an interconnected manner to configure controller components. The controller components comprise a sensing component configured to collect sensor data about at least one controlled element under control of the controller, an analyzing component configured to process the collected sensor data to derive a current state of the at least one controlled element, a deciding component configured to, based on the derived current state, decide an action to be made with respect to the at least one controlled element, and an acting component configured to carry out the decided action with respect to the at least one controlled element, by causing a change in at least one of an operation of the at least one controlled element, or a configuration of the at least one controlled element.

Abstract: Certain aspects of the present disclosure generally relate to jamming detection for radio frequency (RF) front-end circuitry. For example, certain aspects provide an apparatus having a first counter configured to count a number of times that a power of a reception signal exceeds a first threshold. The apparatus also includes a second counter configured to count a number of measurements of the power of the reception signal. The apparatus further includes control logic having a first input coupled to an output of the first counter and having a second input coupled to an output of the second counter. The control logic is configured to determine an amount of jamming over a measurement window based on the number of times that the power of the reception signal exceeds the first threshold and on the number of measurements.

Abstract: Methods for USB signal communication over an optical link are described. One aspect includes detecting connection of a device circuit to a USB device. The detecting may further include transmitting an electrical pulse through a reactive network, and detecting a change in a delay associated with the electrical pulse responsive to connecting the device circuit to the USB device. An optical signal associated with the detected connection may be transmitted to a host circuit via an optical communication channel.

Abstract: A method of a pointing device which is used to be coupled to a host system through a universal serial bus (USB) communication interface includes: providing a USB driver device to communicate with the host system via the USB communication interface; monitoring a specific voltage change or a specific data transmission state of the USB communication interface to generate a monitoring result; and correcting a USB state of the USB driver device when the monitoring result indicates that a undefined or abnormal behavior of the host system occurs.

Abstract: A host electronic device that supports both Universal Serial Bus (USB) and Controller Area Network (CAN) connections is provided. The host electronic device drives at least one USB signal line and measures the voltage thereof. When the measured voltage indicates a USB connection from a peripheral device, the host electronic device determines that the peripheral device is a USB device. Otherwise, the host electronic device determines that the peripheral device is a CAN device.

Abstract: The disclosure provides a communication and interaction method and a communication and interaction system using the communication interaction method. The communication and interaction method for communicating and interacting between an electric unit and a power supply unit, including: providing a communication module between the power supply unit and the electric unit; the power supply unit sends a first identification information to the electric unit through the communication module; the electric unit parses the first identification information through the communication module; and the communication module, on the basis of its own communication structure, matches a communication mode and a communication protocol which are applicable to the power supply unit and the electric unit at the same time, such that the communication between the electric unit and the power supply unit is established.

Abstract: A USB active optical cable and a plug capable of managing power consumption and state. The USB active optical cable and plug respectively comprises a first plug, a second plug, and an optical transmission medium used to connect the first plug and the second plug; the first plug and the second plug are configured to operate different operating states, including an initialization mode, a transmission mode, and a power saving mode, and they can switch between the different operating states. The USB active optical cable and plug are both based on the separate control of the transmitting unit and the receiving unit to distinguish different operating modes, provide necessary operating requirements and mode switching conditions for each mode, and also enable the checking and transmission of the plugging state in the power saving mode, thus facilitate the power consumption management of the active optical cable.

Abstract: Disclosed are a method for waking up an audio device, and a display apparatus. The method includes: while the display apparatus is in a standby state, in response to a power command input from a user, controlling the display apparatus to enter a power-on state from a standby state, and in response to determining that there is an audio device among a plurality of external devices connected with the display apparatus via HDMI interfaces, controlling the audio device to enter a power-on state first, and then controlling other external devices among the plurality of external devices except for the audio device to enter a power-on state.

Abstract: A display device includes a display panel, a backlight, at least one first circuit substrate having at least one first connector, a second circuit substrate having at least one second connector, and at least one flexible flat cable (FFC). By bending at a plurality of bending positions, one of a front face and a back face at a first end of the at least one FFC faces the backlight side and another of the front face and the back face at a second end of the at least one FFC faces the backlight side. The first end is connected to the at least one first connector, and the second end is connected to the at least one second connector.

Abstract: Methods, systems, and devices for power control for boot-up of memory systems are described. A memory system may be configured to boot-up using two different power modes: a lower-power mode, and a higher-power mode. The memory system may perform a series of evaluations to determine whether the memory system is to switch to the lower-power mode during boot-up operations, or stay in the higher-power mode. For example, the memory system may check one or more of: a history of previous boot-up failures, a voltage of an associated power management integrated circuit, a history of asynchronous power loss at the device, a power-mode configuration of the host device, or a history of host-initiated power-down commands. In some examples, by switching to the lower-power mode, the memory system may avoid repeatedly failing multiple boot-up cycles and may instead successfully boot-up the memory system.

Abstract: A host electronic device that supports both Universal Serial Bus (USB) and Controller Area Network (CAN) connections is provided. When the host electronic device detects connection from a peripheral electronic device that uses the CAN protocol, the host electronic device switches to USB-C alternate mode and routes CAN signals over sideband use signals.

Abstract: A method for communicating data by an electronic device is provided. The method includes transmitting a signal including audio/video (A/V) data to a first external electronic device through a first communication module, while connected with the first external electronic device, generating data or a signal unrelated to the A/V data or receiving the data or signal unrelated to the A/V data from an external electronic device other than the first external electronic device, and providing an audio or a video through a display or an embedded sound device based on at least a portion of the data or the signal unrelated to the A/V data or transmitting the at least a portion of the data or the signal unrelated to the A/V data to a second external electronic device through a second communication module.

Abstract: A chip includes a peripheral component interconnect express (PCIe) switch, a dual-mode device, and a signal transmission control circuit. The PCIe switch includes a first downstream port. The dual-mode device switches between a root complex (RC) mode and an endpoint (EP) mode. The signal transmission control circuit is coupled between the PCIe switch and the dual-mode device. The first downstream port communicates with the dual-mode device operating under the EP mode. The signal transmission control circuit allows an external PCIe device to communicate with the dual-mode device operating under the RC mode.

Abstract: Systems, apparatuses, and methods are described for a privacy blocking device configured to prevent receipt, by a listening device, of video and/or audio data until a trigger occurs. A blocker may be configured to prevent receipt of video and/or audio data by one or more microphones and/or one or more cameras of a listening device. The blocker may use the one or more microphones, the one or more cameras, and/or one or more second microphones and/or one or more second cameras to monitor for a trigger. The blocker may process the data. Upon detecting the trigger, the blocker may transmit data to the listening device. For example, the blocker may transmit all or a part of a spoken phrase to the listening device.

Abstract: A control circuit and method for detecting a glitch signal on a bus are provided. The control circuit includes: input ends, respectively receiving a data signal and a clock signal from the bus; a counter, for calculating a time or a number of times in a low level period of the clock signal; a comparator, receiving an output of the time counted by the counter and a threshold value, and generating a comparison result by comparing the time and the threshold value; and an error detector, coupled to the comparator to receive the comparison result, and generating an error flag. When the comparison result indicates that there is a level change during the low level period of the clock signal, the error detector generates an error flag.

Abstract: A method of a pointing device which is used to be coupled to a host system through a universal serial bus (USB) communication interface includes: providing a USB driver device to communicate with the host system via the USB communication interface; monitoring a specific voltage change or a specific data transmission state of the USB communication interface to generate a monitoring result; and correcting a USB state of the USB driver device when the monitoring result indicates that a undefined or abnormal behavior of the host system occurs.

Abstract: A system for granular reset management without reboot is disclosed. The system may include a subsystem, a processor including a reset management circuit coupled to the subsystem. The reset management circuit may include circuitry to receive a command to reset the subsystem, determine whether the subsystem can be reset without performing a system wide reboot, and based on a determination that the subsystem can be reset without performing a system wide reboot, block the use of the subsystem, drain the subsystem, and reset the subsystem. Circuity and method are also disclosed.

Abstract: A docking station and a control method thereof are provided. The docking station includes a first USB interface, a second USB interface, a video signal output terminal, a microcontroller, a first signal multiplexer, a second signal multiplexer, a video signal processor, and a video signal converter. The microcontroller determines whether the first USB interface or the second USB interface is connected to an electronic device. When the first USB interface is connected to the electronic device, the microcontroller sets the first USB interface as an uplink port. The uplink port receives a signal from the electronic device, and selects and outputs a video signal through the signal. The video signal processor is configured to receive and process the video signal. The video signal converter converts the video signal into a video output signal that is capable of being output to the video signal output terminal for playing.

Abstract: The present disclosure provides techniques for using a multiple-port buffer to improve a transaction rate of a memory module. In an example, a memory module can include a circuit board having an external interface, first memory devices mounted to the circuit board, and a first multiple-port buffer circuit mounted to the circuit board. The first multiple-port buffer circuit can include a first port coupled to data lines of the external interface, the first port configured to operate at a first transaction rate, a second port coupled to data lines of a first plurality of the first memory devices, and a third port coupled to data lines of a second plurality of the first memory devices. The second and third ports can be configured to operate at a second transaction rate, wherein the second transaction rate is slower than the first transaction rate.

Abstract: An apparatus includes a memory and one or more processors. The memory includes multiple memory blocks. The one or more processors are configured to read at least part of data stored in a group of one or more memory blocks, the data including multiple code words of an Error Correction Code (ECC) that is decodable using one or more processing elements selected from among multiple predefined processing elements. The one or more processor are further configured to decode one or more of the code words, and identify one or more of the predefined processing elements that actually participated in decoding the respective code words, and, based on cost-values associated with the identified processing elements, the cost-values are indicative of processing latencies respectively incurred by the identified processing elements, to make a decision of whether or not to refresh the one or more memory blocks in the group.

Abstract: An interface device between a plurality of memory devices and a memory controller includes processing circuitry configured to provide a plurality of controller channels for communicating with the memory controller, to provide a plurality of memory channels for communicating with the plurality of memory devices, and to connect each of the plurality of controller channels to at least one of the plurality of memory channels in a first mode and disconnect the plurality of controller channels from the plurality of memory channels in a second mode.

Abstract: Memory management circuitry and processes operate to improve reliability of a group of memory stacks, providing that if a memory stack or a portion thereof fails during the product's lifetime, the system may still recover with no errors or data loss. A front-end controller receives a block of data requested to be written to memory, divides the block into sub-blocks, and creates a new redundant reliability sub-block. The sub-blocks are then written to different memory stacks. When reading data from the memory stacks, the front-end controller detects errors indicating a failure within one of the memory stacks, and recovers corrected data using the reliability sub-block. The front-end controller may monitor errors for signs of a stack failure and disable the failed stack.

Abstract: A system includes a multiplexer, an input/output (I/O) pin, a logic circuit, and a control register. The multiplexer has multiple inputs, an output, and a selection input. The logic circuit is coupled between the multiplexer and the I/O pin. The logic circuit hays a first input. The control register includes first and second bit fields corresponding to the I/O pin. The first bit field is coupled to the selection input of the multiplexer, and the second bit field is coupled to the first input of the logic circuit.

Abstract: Apparatuses and methods for performing data migration operations are disclosed. An apparatus may include at least two interfaces, a first interface supporting data migration operations and a second interface supporting access operations associated with a host device. In some cases, the access operations may be a signal or protocol according to an industry standard or specification (e.g., a DRAM interface specification). The second interface may facilitate supporting industry standard applications, while the first interface supporting data migration operations may provide improved bandwidth for migrating data within the apparatus. The apparatus may include a buffer coupled with the interface and a bank cluster including two or more banks of memory cells. When a host device addresses a bank of the bank cluster, the apparatus may perform one or more data migration operations using the buffer and a different bank of the bank cluster.

Abstract: Systems and methods of memory operation involving dynamic adjustment of write policy based on performance needs are disclosed. In one embodiment, an exemplary method may comprise monitoring memory performance parameters related to a programming operation being scheduled, selecting a write policy based on the memory performance parameters monitored, executing a memory control process that is configured to switch between a first addressing scheme and a second addressing scheme, and programming a first superpage of the programming operation using the first addressing scheme and programing a second superpage of the programming operation using the second addressing scheme.

Abstract: Embodiments relate to including information in a data packet transmitted by a transmitting integrated circuit (e.g., SOC) to account for a time delay associated with an unsuccessful arbitration attempt to send the data packet over a multi-drop bus. The unsuccessful arbitration attempt by the integrated circuit may delay the transmission of the data packet until the multi-drop bus becomes available for the integrated circuit to send the data packet. The data packet includes a data field to include time delay information caused by the unsuccessful arbitration attempt. A receiving integrated circuit may determine the time that the data packet would have been sent out from the transmitting integrated circuit absent the unsuccessful arbitration attempt based on the delay information. Embodiments also relate to a synchronization generator circuit in an integrated circuit that generates timing signals indicating times at which periodic events occur at another integrated circuit.

Abstract: A method of operating a memory device includes receiving a training request for a data channel, detecting at least one mode parameter according to the training request, transmitting the detected mode parameter to an external device, setting at least one of an NRZ mode and a PAM4 mode to a transmission signaling mode based on mode register set setting information from the external device, and performing communications with the external device according to the set transmission signaling mode.

Abstract: A port controller device includes a pull-up resistor, a switching circuit, an enabling circuitry, and a protection circuitry. The pull-up resistor is configured to be coupled to a port, in which the port is configured to be coupled to a channel configuration pin of an electronic device. The switching circuit is configured to selectively transmit a supply voltage to the port via the pull-up resistor according to a first control signal, and turn off a signal path between the pull-up resistor and the port according to a second control signal. The enabling circuitry is configured to generate the first control signal according to an enable signal and the supply voltage. The protection circuitry is configured to generate the second control signal in response to a voltage from the port when the supply voltage is not powered, in order to limit a current from the port.

Abstract: A system and corresponding method queue work within a virtualized scheduler based on in-unit accounting (IUA) of in-unit entries (IUEs). The system comprises an IUA resource and arbiter. The IUA resource stores, in association with an IUA identifier, an IUA count and threshold. The IUA count represents a global count of work-queue entries (WQEs) that are associated with the IUA identifier and occupy respective IUEs of an IUE resource. The IUA threshold limits the global count. The arbiter retrieves the IUA count and threshold from the IUA resource based on the IUA identifier and controls, as a function of the IUA count and threshold, whether a given WQE from a given scheduling group, assigned to the IUA identifier, is moved into the IUE resource to be queued for scheduling. The IUA count and threshold prevent group(s) assigned to the IUA identifier from using more than an allocated amount of IUEs.

Abstract: A system include a main computing system, a first peripheral component, and a second peripheral component. The first peripheral component receives analog signals from a hardware elements in a first peripheral system and converts them digital signal values in a local memory. A local processor of the first peripheral component writes the signal values directly into a first memory space in the physical memory of main computing system using direct memory access. The main computing system uses the signal values to generate output signal values that it writes into a second memory space of the physical memory. A second peripheral component directly accesses the second memory space to read the output signal values, and writes the output signal values into a local memory. The second peripheral component generates output analog signals based on the output signal values and provides the analog signals to hardware elements of a second peripheral system.

Abstract: Systems and methods control presentation of audio-only content that is broadcast to a media device. An exemplary embodiment receives media content that is currently received in a channel of a broadcasted media content stream; determines whether the currently received channel is a type of channel that provides audio/visual content or a type of channel that provides audio-only content; controls presentation of the received media content using at least one audio/visual content control function in response to determining that the currently received channel is the type of channel that provides audio/visual content; controls presentation of the received media content using at least one audio-only content control function in response to determining that the currently received channel is the type of channel that provides audio-only content, wherein the at least one audio/visual content control function is different from the at least one audio-only content control function.

Abstract: Multiple authenticated identities for a single wireless association may be provided. First, an Access Point (AP) may provide an association with a client device. The AP may then establish, on the association, a first authenticated session for the client device based on a first media access control (MAC) address and a first identity. Next, the AP may establish, on same the association, a second authenticated session for the client device based on a second MAC address and a second identity.

Abstract: A storage device includes a first memory, a controller circuit configured to control an access to the first memory, a connector connectable to host apparatuses, and a connection detection circuit configured to detect disconnection of the connector from a host apparatus based on a state of a signal line of the connector.

Abstract: A memory is disclosed that includes a logic die having first and second memory interface circuits. A first memory die is stacked with the logic die, and includes first and second memory arrays. The first memory array couples to the first memory interface circuit. The second memory array couples to the second interface circuit. A second memory die is stacked with the logic die and the first memory die. The second memory die includes third and fourth memory arrays. The third memory array couples to the first memory interface circuit. The fourth memory array couples to the second memory interface circuit. Accesses to the first and third memory arrays are carried out independently from accesses to the second and fourth memory arrays.

Abstract: According to one embodiment, an electronic device includes a memory that stores a first EDID including an identification bit set to respond to a separate electronic device when the separate electronic device supports a first version of the HDMI, a transmitter that transmits the first EDID, and a receiver. When the receiver receives first control information including response information set in response to the identification bit, a compliant version of the HDMI to be operated is determined according to the response information. When the receiver does not receive the first control information, the compliant version of the HDMI to be operated is determined according to an attribute of a video and audio signal transmitted from the separate electronic device.

Abstract: Embodiments relate to an integrated circuit of an electronic device that coordinates activities with another integrated circuit of the electronic device. The integrated circuit includes an interface circuit and a processor circuit. The interface circuit communicates over a multi-drop bus connected to multiple electronic components. The processor circuit receives an authorization request from the integrated circuit via the interface circuit and the multi-drop bus. The received authorization request relates to authorization to perform an activity on the other integrated circuit. In response to receiving the authorization request, the processor circuit determines whether the other integrated circuit is authorized to execute the activity.

Abstract: Systems and method for improving performance of a radio frequency system are provided. One embodiment describes a radio frequency system, which may be modified based upon a detected housing and/or accessory of an electronic device. The modifications may counteract impacts of the housings and/or accessories on the radio frequency transmission.

Abstract: An apparatus and method are provided. The method includes reproducing, by a portable phone, multimedia content via an external output device while the portable phone is coupled with the external output device, determining whether the portable phone is decoupled from the external output device, and terminating the reproducing of the multimedia content based at least in part on a determination that the portable phone is decoupled from the external output device.

Abstract: A source device for transmitting content to a sink device is provided. The source device may include an interface configured to perform high-bandwidth digital content protection (HDCP) authentication with the sink device, and a controller configured to determine an HDCP version supported by the sink device, convert the content so as to be encrypted in the HDCP version supported by the sink device in response to a determination that another HDCP version applied to the content is not supported by the sink device, encrypt the converted content in the HDCP version supported by the sink device, and control the interface to transmit the content to the sink device.

Abstract: Systems, methods and apparatuses to accelerate accessing of borrowed memory over network connection are described. For example, a memory management unit (MMU) of a computing device can be configured to be connected both to the random access memory over a memory bus and to a computer network via a communication device. The computing device can borrow an amount of memory from a remote device over a network connection using the communication device; and applications running in the computing device can use virtual memory addresses mapped to the borrowed memory. When a virtual address mapped to the borrowed memory is used, the MMU translates the virtual address into a physical address and instruct the communication device to access the borrowed memory.

Abstract: The invention relates to a computer implemented method and system for generating a data collection process for a user device. The method comprises: receiving, at a third-party server, an instruction to begin a data collection process for a user operating a user device; receiving, at the third-party server, static data from the user device; determining, at the third-party server, a set of data to be collected from the user; generating, at the third-party server, code for a first data collection module based on the set of data to be collected from the user; providing, from the third-party server, the code for generating the first data collection module to the user device; receiving, at the third-party server, confirmation that a user of the user device has provided the information required by the first data collection module to the service-provider server; and determining if the user has provided the set of data to be collected.

Abstract: This disclosure provides a method that allows connector pins of a USB-C connector to be dynamically repurposed between low bandwidth USB2 traffic and high bandwidth USB3 traffic. USB-C devices can negotiate the use of these pins for a dynamic transition to another function or functions. The pins can be the four center connector pins of a USB-C connection, pins A6, A7, B6, B7, that are originally designated as USB 2.0 differential pairs Changing the function of the pins provides flexibility for communicating using USB-C connectors. For example, the disclosed method/device/system can be used to support high-resolution cameras and sensors in high-resolution virtual reality headsets via a single USB-C connection instead of a user having to connect multiple cables.

Abstract: A trim management method for a storage device includes activating, by a processor configured by an application program, a pattern check function of a device driver, requesting, by the processor configured by the application program, a file system to write a file of a specified pattern, converting, by the processor configured by the file system, the file to management unit data of the storage device, transmitting, by the processor configured by the file system, the management unit data to the device driver, checking, by the processor configured by the device driver, whether a data pattern of the management unit data is the same as the specified pattern, and transmitting, by the processor configured by the device driver, a trim command for trimming a storage area corresponding to the management unit data, to the storage device based on results of the checking.

Abstract: An electrical connector can have a switch module connected to a first interface, a second interface, and a third interface with a computing device connected to the first interface, a first peripheral device connected to the second interface, and a second peripheral device connected to the third interface. The first peripheral device may communicate with the computing device via a first conduit that extends through the switch module prior to the switch module activating a second conduit that extends through the switch module in response to detection of an operational condition of the computing device.

Abstract: A system-on-chip includes a processing system, a memory connected to the processing system, and a programmable logic circuit connected to the memory, where the processing system is configured to store different circuit configurations in the memory according to a predefined netlist, and the system is configured to repeatedly adapt the circuit to the circuit configurations stored in the memory.

Abstract: A charging protection device comprises a universal serial bus (USB) interface, a resistance circuit, a detection circuit and a control circuit. The universal serial bus interface includes a configuration channel. The resistance circuit includes a pull-down resistor coupled between the configuration channel and a ground GND. The detection circuit is configured to detect an abnormal charging condition. The detection circuit generates an abnormal signal when the abnormal charging condition occurs. The control circuit is coupled to the detection circuit and configured to change a voltage value on the pull-down resistor to be out of a preset voltage range according to the abnormal signal.

Abstract: An information processing system equipped with an information processing device, which includes multiple processors and a common parallel port (port), and a peripheral device, which includes a data classification means and multiple computing means. Each processor appends each processor identifier to a respective series of codes capable of expressing given data, thereby generating a writing unit capable of being written one time in the bus width of the port, and sequentially writes the writing unit to the port without performing exclusive control. A data classification means reads the writing units from the port sequentially and sequentially outputs the series of codes included in the writing unit to a computing means associated with the processor identifiers included in the writing unit. The computing means reconstructs the original data on the basis of the series of codes.

Abstract: An electrical link including a protective sheath surrounding at least two conductors each covered by an insulating jacket and an electrical protection system includes: a conductive sheath on each of the insulating jackets, a circuit breaker for each conductor; a direct current generator generating a direct current to be successively applied to each conductive sheath; and a leakage current detection circuit for each conductive sheath; a sequencer successively supplying the direct current to each conductive sheath; the detection circuit measures a current in each conductive sheath and compares a voltage proportional to the current to a first and second ranges of values, the detection circuit activating the circuit breaker if: the voltage is outside of the first range of values while the current generator generates a non-zero current; or the voltage is outside of the second range of values.

Abstract: The present invention provides an apparatus and a method for switching and converting video signals, wherein the method majorly includes the steps of: receiving N number of DisplayPort video signals and N number of USB video signals by N number of USB Type-C connection interfaces which are in compliance with a DisplayPort Alternate Mode specification, and N is a natural number greater than or equal to 2; and selecting one out of the DisplayPort video signals and one out of the USB video signals; converting the selected DisplayPort video signal and the selected USB video signal into a DisplayPort video signal or a HDMI video signal; transmitting the converted DisplayPort video signal or HDMI video signal to Q number of display devices, and Q is a natural number greater than or equal to 2.

Abstract: An information processing which reduces production costs. The information processing apparatus has a first semiconductor device, a second semiconductor device, a ROM that stores both a first boot program and a second boot program, and an interface for communicating with the ROM. In response to the first semiconductor device being reset, the first semiconductor device reads out the first boot program from the ROM via the interface. In response to the second semiconductor device being reset, the second semiconductor device reads out the second boot program from the ROM via the interface. While the first semiconductor device is reading out the first boot program from the ROM, an output from the second semiconductor device to the interface is controlled to have high impedance.