Access Locking Patents (Class 710/200)
  • Patent number: 11119831
    Abstract: Described is a two-phase spinlock that controls access to a resource from a plurality of threads. The two-phase spinlock receives requests from threads to acquire the resource, places the threads in a first queue associated with a first phase of the two-phase spinlock, determines whether at least one of a predetermined number of slots in a second phase of the two-phase spinlock is available and when the slots are unavailable, processes an interrupt served by a select one of the threads based on a number of attempts by the selected thread to enter the second phase.
    Type: Grant
    Filed: January 10, 2020
    Date of Patent: September 14, 2021
    Assignee: Wind River Systems, Inc.
    Inventors: Kenneth Jonsson, Markus Carlstedt
  • Patent number: 11100063
    Abstract: Aspects of the subject matter described herein relate to searching files. In aspects, a search engine is able to search not only the current files but also is able to search for deleted and previous versions of files that satisfy queries. The search engine may maintain an index that facilitates searches. In addition, the search engine may also determine not only that a file satisfies a query but what version(s) of the file satisfies the query.
    Type: Grant
    Filed: December 6, 2017
    Date of Patent: August 24, 2021
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Apurva Ashwin Doshi, Juan-Lee Pang, Bohdan W. Raciborski
  • Patent number: 11080374
    Abstract: A computing device and method of controlling access to a computing device. A software lock request is received via an input device of the computing device. In response to receiving the software lock request, a picklist of a plurality of applications executable on the computing device is displayed on a display of the computing device. A selection of one or more impermissible applications from the plurality of applications executable on the computing device or one or more permitted applications from the plurality of applications executable on the computing device is received receiving via the input device. A locked state is entered. In the locked state, access is not permitted to the one or more impermissible applications and access is permitted to other applications of the plurality of applications executable on the computing device.
    Type: Grant
    Filed: April 27, 2020
    Date of Patent: August 3, 2021
    Assignee: BlackBerry Limited
    Inventors: Ahmed E. Hassan, John F. Wilson, Daryl Joseph Martin
  • Patent number: 11061706
    Abstract: A method for tracking virtual machine usage includes deploying, by a client machine with a client Internet Protocol (IP) address, an instance of a virtual machine. The client machine generates an identification for the instance of the virtual machine and requests a domain name system (DNS) lookup for a domain name string from a tracker server specified by a tracker IP address, where the domain name string comprises the identification. The tracker server receives the DNS lookup from the client machine and records the identification and the client IP address.
    Type: Grant
    Filed: January 6, 2017
    Date of Patent: July 13, 2021
    Assignee: CISCO TECHNOLOGY, INC.
    Inventors: Richard Wellum, Alpesh Patel, Jose Palafox
  • Patent number: 11055266
    Abstract: In an example embodiment, a method comprises determining an ordered set of key entries; determining a first key entry for a first object in the ordered set of key entries; determining an object storage operation represented by a key of the first key entry; determining the object storage operation represented by the key of the first key entry to comprise a delete operation; and responsive to determining the object storage operation represented by the key of the first key entry to comprise the delete operation, skipping over subsequent key entries associated with the first object in the ordered set of key entries.
    Type: Grant
    Filed: June 15, 2018
    Date of Patent: July 6, 2021
    Assignee: Western Digital Technologies, Inc.
    Inventors: Carl Rene D'Halluin, Bastiaan Stougie, Koen De Keyser, Thomas Demoor
  • Patent number: 11048562
    Abstract: Techniques are disclosed relating to efficiently handling execution of multiple threads to perform various actions. In some embodiments, an application instantiates a queue and a synchronization primitive. The queue maintains a set of work items to be operated on by a thread pool maintained by a kernel. The synchronization primitive controls access to the queue by a plurality of threads including threads of the thread pool. In such an embodiment, a first thread of the application enqueues a work item in the queue and issues a system call to the kernel to request that the kernel dispatch a thread of the thread pool to operate on the first work item. In various embodiments, the dispatched thread is executable to acquire the synchronization primitive, dequeue the work item, and operate on it.
    Type: Grant
    Filed: December 8, 2017
    Date of Patent: June 29, 2021
    Assignee: Apple Inc.
    Inventors: Daniel A. Steffen, Pierre Habouzit, Daniel A. Chimene, Jeremy C. Andrus, James M. Magee, Puja Gupta
  • Patent number: 11038837
    Abstract: A method for bus addressing includes receiving handshaking information from a component of a control system of an unmanned aerial vehicle (UAV), allocating a communication address to the component through a field bus, receiving a user instruction indicative of an index number of the component through a configuration interface, and establishing a correlation between a physical address of the component, the communication address, and the index number. The index number is configured to identify the component.
    Type: Grant
    Filed: May 20, 2020
    Date of Patent: June 15, 2021
    Assignee: SZ DJI TECHNOLOGY CO., LTD.
    Inventors: Guoxiu Pan, Xiaofeng Feng, Renli Shi, Shaohe Du
  • Patent number: 11036501
    Abstract: An apparatus and method for executing an atomic test and update instruction. For example, one embodiment of a processor comprises: a decoder to decode an atomic test and update (ATU) instruction having a first operand specifying a first value in a first storage location, a second operand specifying a second value in a second storage location, a third operand specifying a third value in a third storage location, and an opcode specifying a condition to be tested relative to the first and second values; and execution circuitry to perform a load lock operation to load the first value from the first storage location, the load lock operation to prevent access by another instruction before a result of the ATU instruction is stored, the execution circuitry to test a condition related the first value and the second value, wherein if the condition is met then the execution circuitry is to add the first value and the third value to generate a sum and to store the sum to the first storage location.
    Type: Grant
    Filed: December 23, 2018
    Date of Patent: June 15, 2021
    Assignee: Intel Corporation
    Inventors: Raanan Sade, Joseph Nuzman, Hubert Nueckel
  • Patent number: 11036563
    Abstract: A system for resolving a resource deadlock between processes. The processes are configured to belong to process groups. Resources are allocated on behalf of the process groups to be assigned to respective processes within the process groups. A shared data structure is maintained that includes process records of each of the processes. A determination is made that a respective process is involved in a resource deadlock if the process group to which the process belongs to is involved in the resource deadlock.
    Type: Grant
    Filed: March 19, 2019
    Date of Patent: June 15, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Lior Aronovich
  • Patent number: 11029995
    Abstract: An HTM-assisted Combining Framework (HCF) may enable multiple (combiner and non-combiner) threads to access a shared data structure concurrently using hardware transactional memory (HTM). As long as a combiner executes in a hardware transaction and ensures that the lock associated with the data structure is available, it may execute concurrently with other threads operating on the data structure. HCF may include attempting to apply operations to a concurrent data structure utilizing HTM and if the HTM attempt fails, utilizing flat combining within HTM transactions. Publication lists may be used to announce operations to be applied to a concurrent data structure. A combiner thread may select a subset of the operations in the publication list and attempt to apply the selected operations using HTM. If the thread fails in these HTM attempts, it may acquire a lock associated with the data structure and apply the selected operations without HTM.
    Type: Grant
    Filed: May 13, 2016
    Date of Patent: June 8, 2021
    Assignee: Oracle International Corporation
    Inventors: Alex Kogan, Yosef Lev
  • Patent number: 11023302
    Abstract: Methods and systems are provided that may be implemented to detect and capture information related to host system hang events which may occur during booted and in-band operation of an information handling system, e.g., for further analysis such as debugging. The disclosed methods and systems may be employed to monitor for behavior that is indicative of the occurrence of a host processing device system hang event that occurs while a host operating system is booted and running on the host processing device. Information regarding the nature and/or cause of a detected system hang event may be captured and stored for further analysis and/or for identifying a corrective action.
    Type: Grant
    Filed: March 7, 2018
    Date of Patent: June 1, 2021
    Assignee: Dell Products L.P.
    Inventors: Bryan Thornley, Adolfo S. Montero, Ed Benyukhis, Craig Chaiken
  • Patent number: 11016796
    Abstract: A controller sandbox using an emulation framework of a hypervisor is disclosed. A hypervisor receives, from a task in a virtual machine that is controlled by the hypervisor in a computing device on which the hypervisor executes, a first implement device command request that requests that a first device command be implemented on a controllable device communicatively connected to the computing device via an interface. The hypervisor determines that the first device command is on an authorized device command list. Based on determining that the first device command is on the authorized device command list, the hypervisor communicates a signal to the controllable device to implement the first device command.
    Type: Grant
    Filed: April 10, 2019
    Date of Patent: May 25, 2021
    Assignee: Red Hat, Inc.
    Inventor: Bandan Das
  • Patent number: 10997030
    Abstract: Providing disaster recovery of a distribute file system metadata server as a service is disclosed. In various embodiments, an indication is received to provide alternative access to a file system metadata server. A copy of a self-describing backup of the file system metadata server is obtained, e.g., from cloud-based storage. The backup is used to provide access to a read only instance of the file system metadata server.
    Type: Grant
    Filed: March 31, 2015
    Date of Patent: May 4, 2021
    Assignee: EMC IP Holding Company LLC
    Inventors: Biju Shanmugham Pillai, Nathan Rosenblum, Niraj Tolia
  • Patent number: 10963250
    Abstract: The execution of time intensive instructions can lead to critical events being responded to late or not being responded to at all. An information processing apparatus comprises processing circuitry (60) for executing instructions comprising one or more time intensive instructions and exception generating circuitry (100) for generating at least one exception for the processing circuitry. The processing circuitry maintains a control value (20) for indicating whether or not the time intensive instructions can be executed. When a time intensive instruction is encountered, if the control value indicates that time intensive instructions cannot be executed then a first exception triggers the processing circuitry to suppress execution of the time intensive instruction. Alternatively, if the control value indicates that time intensive instructions can be executed, then the time intensive instruction is executed.
    Type: Grant
    Filed: July 7, 2014
    Date of Patent: March 30, 2021
    Assignee: ARM Limited
    Inventors: Simon John Craske, Antony John Penton
  • Patent number: 10956397
    Abstract: The present disclosure provides a method and an apparatus for processing concurrent transactions, and a non-transitory computer readable storage medium. The method includes: determining whether a two-dimensional digraph for a set of concurrent transactions has a cyclic structure, wherein the set of concurrent transactions comprises a transaction to be committed and at least one committed transaction, the two-dimensional digraph comprises a plurality of nodes corresponding respectively to the transactions in the set, and directed edges between the nodes of the two-dimensional digraph indicate a serializability relation among the transactions in the set; aborting the transaction to be committed if it is determined that the two-dimensional digraph has the cyclic structure; and committing the transaction to be committed if it is determined that the two-dimensional digraph does not have the cyclic structure. Embodiments of the present disclosure can improve the performance of a concurrent system.
    Type: Grant
    Filed: November 12, 2019
    Date of Patent: March 23, 2021
    Assignee: Wuxi Research Institute of Applied Technologies Tsinghua University
    Inventors: Leibo Liu, Zhaoshi Li, Shaojun Wei
  • Patent number: 10943171
    Abstract: An optimized computer architecture for training an neural network includes a system having multiple GPUs. The neural network may be divided into separate portions, and a different portion is assigned to each of the multiple GPUs. Within each GPU, its portion is further divided across multiple training worker threads in multiple processing cores, and each processing core has lock-free access to a local parameter memory. The local parameter memory of each GPU is separately, and individually, synchronized with a remote master parameter memory by lock memory access. Each GPU has a separate set of communication worker threads dedicated to data transfer between the GPU and the remote parameter memory so that the GPU's training worker threads are not involved with cross GPU communications.
    Type: Grant
    Filed: September 1, 2017
    Date of Patent: March 9, 2021
    Assignee: Facebook, Inc.
    Inventors: Qiang Wu, Ou Jin, Liang Xiong
  • Patent number: 10922252
    Abstract: Extended message signaled interrupts (MSI) data are disclosed. In one aspect, MSI bits are modified to include a system level identifier. In an exemplary aspect, an upper sixteen bits of the MSI message data are modified to be the system level identifier. By providing the system level identifier within the MSI message data, an interrupt controller can verify the interrupt source.
    Type: Grant
    Filed: June 16, 2016
    Date of Patent: February 16, 2021
    Assignee: QUALCOMM Incorporated
    Inventors: Ofer Rosenberg, Amit Gil, James Lionel Panian, Piyush Patel, Shaul Yohai Yifrach
  • Patent number: 10884882
    Abstract: A semiconductor device includes a common resource commonly used by plural processes executed on a processor, a semaphore controlling the possessory right of the common resource, and a semaphore management unit performing a process of acquiring the possessory right of the common resource to the semaphore in response to a request of a process performed on the processor. When a request to acquire the possessory right of the common resource is received from a first process in the plural processes and the possessory right cannot be obtained, the semaphore management unit switches the process executed on the processor to a second process, repeatedly performs a process of acquiring the possessory right requested by the first process to the semaphore and, when the possessory right requested by the first process is obtained, switches the process on the processor from the second process to the first process.
    Type: Grant
    Filed: September 4, 2018
    Date of Patent: January 5, 2021
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Hidekazu Bingo, Koji Adachi, Yoichi Yuyama
  • Patent number: 10884823
    Abstract: Methods and systems for allocating disk space and other limited resources (e.g., network bandwidth) for a cluster of data storage nodes using distributed semaphores with atomic updates are described. The distributed semaphores may be built on top of a distributed key-value store and used to reserve disk space, global disk streams for writing data to disks, and per node network bandwidth settings. A distributed semaphore comprising two or more semaphores that are accessed with different keys may be used to reduce contention and allow a globally accessible semaphore to scale as the number of data storage nodes within the cluster increases over time. In some cases, the number of semaphores within the distributed semaphore may be dynamically adjusted over time and may be set based on the total amount of disk space within the cluster and/or the number of contention fails that have occurred to the distributed semaphore.
    Type: Grant
    Filed: September 20, 2019
    Date of Patent: January 5, 2021
    Assignee: Rubrik, Inc.
    Inventor: Noel Moldvai
  • Patent number: 10884621
    Abstract: Block volume mount synchronization is provided. A call is received to mount a block volume upon initiation of container generation on the host computer. Metadata of the block volume is checked for host lock prior to mounting the block volume on the host computer. The mounting of the block volume is allowed only when the metadata indicates that prior host lock does not exist thereby restricting usage of the block volume to a single user preventing data corruption of the block volume.
    Type: Grant
    Filed: January 2, 2019
    Date of Patent: January 5, 2021
    Assignee: International Business Machines Corporation
    Inventors: Akash V. Gunjal, Shaikh I. Ali, Sushma Korati
  • Patent number: 10880384
    Abstract: Described herein is a system for allocating resources among multiple skills to enable multitasking. The system tracks use of resources using skill sessions. In one case, the system suspends a skill session to release a resource for allocation to another resource. In another case, the system determines if multiple skill sessions can remain active and use resources to provide output to the user at the same time.
    Type: Grant
    Filed: September 11, 2019
    Date of Patent: December 29, 2020
    Assignee: Amazon Technologies, Inc.
    Inventors: Bo Li, Vikram Kumar Gundeti, Andrew S. Huntwork, Shiladitya Roy, Rongzhou Shen, Eswara Jnana Swaroop Bhupathiraju
  • Patent number: 10866909
    Abstract: Technologies for protecting virtual machine memory of a compute device include a virtual machine (VM) instantiated on the compute device, a virtual machine monitor (VMM) established on the compute device to control operation of the VM, a secured memory, and a memory manager. The memory manager receives a memory access request that includes a virtual linear address (LA) from the VM and performs a translation of the LA to a translated host physical address (HPA) of the compute device using one or more page tables associated with the VM and VMM. The memory manager determines whether a secured translation mapping of LA-to-HPA that corresponds to the LA is locked. If the mapping is locked, the memory manager verifies the translation based on a comparison of the translated HPA to a HPA translated using the secured translation mapping and, if verified, performs the memory access request using the translated HPA.
    Type: Grant
    Filed: June 26, 2017
    Date of Patent: December 15, 2020
    Assignee: INTEL CORPORATION
    Inventors: Prashant Dewan, Uttam K. Sengupta, Siddhartha Chhabra
  • Patent number: 10846237
    Abstract: Methods and apparatus for locking at least a portion of a shared memory resource. In one embodiment, an electronic device configured to lock at least a portion of a shared memory is disclosed. The electronic device includes a host processor, at least one peripheral processor and a physical bus interface configured to couple the host processor to the peripheral processor. The electronic device further includes a software framework that is configured to: attempt to lock a portion of the shared memory; verify that the peripheral processor has not locked the shared memory; when the portion of the shared memory is successfully locked via the verification that the peripheral processor has not locked the portion of the shared memory, execute a critical section of the shared memory; and otherwise attempt to lock the at least the portion of the shared memory at a later time.
    Type: Grant
    Filed: January 28, 2019
    Date of Patent: November 24, 2020
    Assignee: Apple Inc.
    Inventors: Vladislav Petkov, Haining Zhang, Karan Sanghi, Saurabh Garg
  • Patent number: 10831662
    Abstract: The disclosed computer-implemented method for maintaining cache coherency may include (1) receiving an indication of a revocation of a grant to an owner node of a shared lock for a data object owned by the owner node, (2) invalidating, in response to the indication, a copy of the object in a local cache of the owner node, (3) releasing, in response to the indication, the grant of the shared lock, (4) receiving, after the releasing of the grant, a request from the requesting node to update the object in the cache, (5) transmitting, in response to the request to update the object, a request for a shared lock for the object, (6) receiving an indication of a grant of the shared lock, and (7) updating, in response to the grant of the shared lock, the object in the cache. Various other methods, systems, and computer-readable media are also disclosed.
    Type: Grant
    Filed: August 19, 2019
    Date of Patent: November 10, 2020
    Assignee: Veritas Technologies LLC
    Inventors: Jitendra Patidar, Anindya Banerjee, Kundan Kumar
  • Patent number: 10810168
    Abstract: Systems and methods for allocating file system metadata to storage nodes of a distributed file system. An example method may include: defining, by a processing device, a plurality of tokens, wherein each token comprises a sequence of bits; associating each token of the plurality of tokens with a metadata node of a cluster of metadata nodes; receiving a request to create a directory; selecting, among the plurality of tokens, a token associated with the directory; generating a directory identifier comprising the selected token; and creating, on a metadata node associated with the selected token, a directory record comprising the directory identifier.
    Type: Grant
    Filed: November 24, 2015
    Date of Patent: October 20, 2020
    Assignee: Red Hat, Inc.
    Inventors: Jeffrey Jon Darcy, Shyamsundar Ranganathan
  • Patent number: 10761946
    Abstract: Technologies are described for facilitating database system recovery in a distributed database environment having a master node and at least one slave node. The master node maintains an in-memory reference that includes transaction identifiers and their corresponding commit identifiers. When a slave node requests that a commit identifier be assigned to a transaction, the transaction and commit identifiers for the transaction are added to the in-memory reference. The commit identifier is sent by the master node to the slave node. The slave node writes a log entry to a commit log that includes the transaction identifier and the assigned commit identifier. If the database system is interrupted before the slave node writes the commit log entry, the slave node can request the commit identifier for the transaction from the master node, which retrieves the identifier from the in-memory reference.
    Type: Grant
    Filed: February 10, 2017
    Date of Patent: September 1, 2020
    Assignee: SAP SE
    Inventors: Christian Bensberg, Steffen Geissinger, Juchang Lee, Chang Gyoo Park, Kyu Hwan Kim, Deok Koo Kim
  • Patent number: 10755012
    Abstract: The present disclosure relates to system(s) and method(s) for generating a functional simulation's progress report simultaneously when the simulation is in progress. The system comprises a testbench and a DUV/SUV connected to the testbench. The testbench generates a set of input data/packets in order to simulate and verify the DUV/SUV. The system is configured to identify one or more components, from a set of components in the testbench. Furthermore, the system receives one or more current progress messages from the one or more components and identifies one or more component Lock-Up conditions based on the processing of the one or more current progress messages and one or more previous progress messages. Further, the system executes one or more actions to resolve the one or more component Lock-Up conditions. Furthermore, the system generates a simulation progress report, simultaneously at runtime, during the simulation.
    Type: Grant
    Filed: September 12, 2018
    Date of Patent: August 25, 2020
    Assignee: HCL Technologies Limited
    Inventors: Manickam Muthiah, Sathish Kumar Krishnamoorthy
  • Patent number: 10712947
    Abstract: A first storage device receives a first reservation preemption command from a host using a target port. The first reservation preemption command includes a port identifier of the target port, a to-be-checked reservation key, and a logical unit number (LUN). The first storage device encapsulates the to-be-checked reservation key, the LUN, the port identifier of the target port, and a port identifier of the forwarding port to obtain a second reservation preemption command. Further, the first storage device sends the second reservation preemption command to a second storage device using the forwarding port. The second storage device performs a reservation preemption operation based on the port identifier of the target port. When a split brain occurs in a host cluster, data consistency of different storage arrays can be ensured without relying on a Fiber Channel switch, thereby ensuring applicability in more scenarios.
    Type: Grant
    Filed: January 25, 2019
    Date of Patent: July 14, 2020
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventor: Haitao Zeng
  • Patent number: 10706165
    Abstract: A method of separating read operations from write operations includes obtaining and storing a client ID after establishing a slave database connection with a slave database corresponding to a client, and receiving an operation request from the client. If the operation request is a write request, the method also includes establishing a master database connection with a master database by use of a public ID and a public passcode and sending the client ID to the master database, where upon receiving, the master database updates the public ID with the received client ID, and updates access permissions associated with the public ID with access permissions associated with the client ID. The method further includes sending the write request to the master database by use of the master database connection, where a write operation corresponding to the write request and to the access permissions associated with client ID is executed.
    Type: Grant
    Filed: February 4, 2016
    Date of Patent: July 7, 2020
    Assignee: Alibaba Group Holding Limited
    Inventor: Xiaobin Lin
  • Patent number: 10685010
    Abstract: A method for data storage, in a system that includes multiple servers, multiple multi-queue storage devices and at least one storage controller that communicate over a network, includes receiving in a server, from an application running on the server, a request to access data belonging to one or more stripes. The stripes are stored on the storage devices and are shared with one or more other servers. In response to the request, the following are performed at least partially in parallel: (i) requesting one or more global locks that prevent the other servers from accessing the stripes, and (ii) reading at least part of the stripes from the storage devices speculatively, irrespective of whether the global locks are granted. Execution of the request is completed upon verifying that the speculatively-read data is valid.
    Type: Grant
    Filed: September 2, 2018
    Date of Patent: June 16, 2020
    Assignee: Amazon Technologies, Inc.
    Inventors: Alex Friedman, Sergei Dyshel, Ofir Dahan, Alex Liakhovetsky
  • Patent number: 10684880
    Abstract: The purpose of the present invention is to provide a computer which is capable of increasing the number of I/O devices which connect to a PCI fabric which has predetermined specifications.
    Type: Grant
    Filed: October 17, 2016
    Date of Patent: June 16, 2020
    Assignee: NEC CORPORATION
    Inventor: Akira Tsuji
  • Patent number: 10684920
    Abstract: In general, certain embodiments of the present disclosure provide techniques or mechanisms for creating efficient and consistent replication of file overwrites. According to various embodiments, a file map with a sequence file number is created for a data file on a source. The file map includes one or more nodes that each include a sequence node number. When an entry in the file map is changed, the sequence file number is incremented, and the corresponding node is updated by, among other things, setting the sequence node number to equal the current sequence file number. All other nodes in the file map that point to the updated node are similarly updated. When replication occurs, only the updated nodes in the file map are replicated and any unreplicated non-updated nodes are maintained.
    Type: Grant
    Filed: September 1, 2015
    Date of Patent: June 16, 2020
    Assignee: QUEST SOFTWARE INC.
    Inventors: Naresh Saladi, Murali Bashyam
  • Patent number: 10678712
    Abstract: A method is described that includes detecting that an instruction of a thread is a locked instruction. The instruction also includes determining that execution of said instruction includes imposing a bus lock. The instruction also include executing a bus lock assistance function in response to said determining, said bus lock assistance function including a function associated with said bus lock other than implementation of a bus lock protocol.
    Type: Grant
    Filed: February 11, 2019
    Date of Patent: June 9, 2020
    Assignee: Intel Corporation
    Inventors: Robert S. Chappell, John W. Faistl, Hermann W. Gartler, Michael D. Tucknott, Rajesh S. Parthasarathy, David W. Burns
  • Patent number: 10671731
    Abstract: According to one embodiment, an electronic apparatus includes a hardware processor. The hardware processor executes first authentication processing and second authentication processing when the electronic apparatus is powered on or rebooted. The hardware processor executes the first authentication processing using first data stored in the nonvolatile storage region after executing the second authentication processing in a case of executing the second authentication processing when the electronic apparatus is powered on or rebooted. The hardware processor deletes the first data from the nonvolatile storage region when setting of not executing the second authentication processing upon the electronic apparatus is powered on or rebooted is made.
    Type: Grant
    Filed: December 22, 2016
    Date of Patent: June 2, 2020
    Assignee: TOSHIBA CLIENT SOLUTIONS CO., LTD.
    Inventor: Taisuke Furuya
  • Patent number: 10649695
    Abstract: A command processing method and a storage controller are provided. The command processing method includes: receiving multiple read-modify-write (RMW) commands by a command processing pool of the storage controller, wherein each of the RMW commands includes a read command and a write command in pairs; locking a queue by the command processing pool and transmitting a pending first read command of the RMW commands in the command processing pool to the queue; when a second read command paired with a second write command of the RMW commands is pending, not locking the queue by the command processing pool and not transmitting the second write command to the queue; and when a third read command paired with a third write command of the RMW commands is not pending, locking the queue by the command processing pool and transmitting the third write command to the queue.
    Type: Grant
    Filed: January 22, 2019
    Date of Patent: May 12, 2020
    Assignee: Shenzhen EpoStar Electronics Limited CO.
    Inventor: Shih-Tien Liao
  • Patent number: 10635791
    Abstract: A device and method for placing the device in a locked state having an associated set of permitted tasks so as to permit the device owner to share the device with others but maintain security over aspects of the device. A task change request is evaluated to determine whether the requested task is permitted and, if so, the requested task is allowed; if not, then an authorization process is invoked to prompt the user to input authorization data. Upon verification of the authorization data, the device may be unlocked and the requested change implemented. The permitted tasks may designate specific applications, specific operations or functions within applications or at the operating system level, one or more currently open windows, and other levels of granularity.
    Type: Grant
    Filed: March 29, 2013
    Date of Patent: April 28, 2020
    Assignee: BlackBerry Limited
    Inventors: Ahmed E. Hassan, John F. Wilson, Daryl Joseph Martin
  • Patent number: 10630605
    Abstract: A method and system are disclosed for migrating network resources to improve network utilization, for use in a multi-node network wherein nodes of the network share network resources. The method comprises the steps of identifying a group of nodes that share one of the network resources, and identifying one of the nodes satisfying a specified condition based on at least one defined access latency metric. The shared resource is moved to the identified one of the nodes to reduce overall access latency to access the shared resource by said group of nodes. One embodiment of the invention provides a method and system to synchronize tasks in a distributed computation using network attached devices (NADs). A second embodiment of the invention provides a method and system to reduce lock latency and network traffic by migrating lock managers to coupling facility locations closest to nodes seeking resource access.
    Type: Grant
    Filed: February 15, 2019
    Date of Patent: April 21, 2020
    Assignee: International Business Machines Corporation
    Inventor: Rajaram B. Krishnamurthy
  • Patent number: 10621103
    Abstract: An apparatus and method are provided for handling write operations. The apparatus has a first processing device for executing a sequence of instructions, where the sequence comprises at least one instruction to activate a software protocol to establish an ownership right for writing data to a first memory region, and at least one write instruction executed following establishment of the ownership right, in order to perform one or more write operations to output write data for storage in at least one memory location within the first memory region. A writeback cache associated with the first processing device is used to store the write data output during the one or more write operations. Coherency circuitry is coupled to the writeback cache and to at least one further cache associated with at least one further processing device. The first processing device is responsive to a trigger event to initiate a clean operation in order to cause the write data to be written from the writeback cache to memory.
    Type: Grant
    Filed: December 5, 2017
    Date of Patent: April 14, 2020
    Assignee: Arm Limited
    Inventors: Andrew Christopher Rose, Richard Roy Grisenthwaite, Ali Ghassan Saidi
  • Patent number: 10613755
    Abstract: Example embodiments of the present invention relate to a method, a system, and a computer program product for copy data management. The method includes creating a snapshot of a volume and exposing the snapshot of the volume as a writable copy of the volume.
    Type: Grant
    Filed: June 30, 2016
    Date of Patent: April 7, 2020
    Assignee: EMC IP Holding Company LLC
    Inventors: Nir Sela, Aviram Katz, Aharon Blitzer, Tamir Segal, Ido Halevi, Yuval Harduf
  • Patent number: 10614039
    Abstract: A lock manager configured for locking files is tested. As part of the test and based on a lock assignment plan, a process acquires locks on portions of the files. Based on a lock testing plan, a second process performs a lock verification for a portion of the locked portions. A result of this lock verification is compared to its expected result. Based on an updated lock assignment plan, the process transitions from the locks to other locks on other portions of the files. Based on an updated lock testing plan, the second process performs a second lock verification for a portion of the other locked portions. A result of this second lock verification is compared to its expected result. Based at least in part on the two comparisons, the lock manager is evaluated.
    Type: Grant
    Filed: April 4, 2017
    Date of Patent: April 7, 2020
    Assignee: International Business Machines Corporation
    Inventors: Willard A. Davis, James C. Davis
  • Patent number: 10614040
    Abstract: A lock manager configured for locking files is tested. As part of the test and based on a lock assignment plan, a process acquires locks on portions of the files. Based on a lock testing plan, a second process performs a lock verification for a portion of the locked portions. A result of this lock verification is compared to its expected result. Based on an updated lock assignment plan, the process transitions from the locks to other locks on other portions of the files. Based on an updated lock testing plan, the second process performs a second lock verification for a portion of the other locked portions. A result of this second lock verification is compared to its expected result. Based at least in part on the two comparisons, the lock manager is evaluated.
    Type: Grant
    Filed: October 23, 2017
    Date of Patent: April 7, 2020
    Assignee: International Business Machines Corporation
    Inventors: Willard A. Davis, James C. Davis
  • Patent number: 10613934
    Abstract: For managing RAID parity stripe contention using a processor device in a computing environment, delaying, by a host being separate to the RAID, one of a plurality of operations overlapping a parity sector in a parity stripe with a currently running operation and serializing each one of the multiplicity of operations overlapping the parity sector. The host further serializes each one of the plurality of operations overlapping the parity sector. The delaying is performed when the host determines whether a new write written through a hardware performance path comprising the one of the plurality of operations will overlap the parity stripe of a previous write comprising the currently running operation at the RAID controller.
    Type: Grant
    Filed: November 30, 2017
    Date of Patent: April 7, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Matthew J. Kalos, Karl A. Nielsen, Richard B. Stelmach
  • Patent number: 10606666
    Abstract: Systems and methods of enhancing computing performance may provide for detecting a request to acquire a lock associated with a shared resource in a multi-threaded execution environment. A determination may be made as to whether to grant the request based on a context-based lock condition. In one example, the context-based lock condition includes a lock redundancy component and an execution context component.
    Type: Grant
    Filed: November 22, 2017
    Date of Patent: March 31, 2020
    Assignee: International Business Machines Corporation
    Inventor: Kirk J. Krauss
  • Patent number: 10602248
    Abstract: The present disclosure provides a speaker module, in which at least two leaking holes that communicate with a rear chamber of the housing, and a connecting groove that communicates any two of the at least two leaking holes with each other are arranged at the housing. With such configuration, the processing steps for forming the cone-shaped leaking hole and the air guiding groove are omitted, the processing is significantly simplified compared to the prior art, the processing is much easier and the manufacture efficiency is higher, and an excellent performance in air leakage and pure sounding is guaranteed.
    Type: Grant
    Filed: December 30, 2018
    Date of Patent: March 24, 2020
    Assignee: AAC Technologies Pte. Ltd.
    Inventor: Wei Chen
  • Patent number: 10599470
    Abstract: A system, apparatus, and method for thread synchronization is provided. In one embodiment, a network system receives a signal from a first computing machine, and determines whether one or more processes are waiting for the signal. The network system also transmits the signal to one of the one or more processes on the first computing machine or a second computing machine to execute a thread of the process.
    Type: Grant
    Filed: October 2, 2018
    Date of Patent: March 24, 2020
    Assignee: OPEN INVENTION NETWORK LLC
    Inventor: Marc Todd Yaeger
  • Patent number: 10579441
    Abstract: Creating, maintaining and using a lock dependency graph in a way that includes the following steps: (i) acquiring a first restriction on processor access in a multi-processor computer system; (ii) modeling the first restriction as first locking primitive information; and (iii) storing data corresponding to the first locking primitive information in a lock dependency graph. The first restriction on processor access is one of the following two types: (i) disabling the interrupts on a given processor; and/or (ii) sending inter-processor interrupts with synchronous waiting from one processor to another (including itself).
    Type: Grant
    Filed: December 12, 2017
    Date of Patent: March 3, 2020
    Assignee: International Business Machines Corporation
    Inventor: Srivatsa S. Bhat
  • Patent number: 10572508
    Abstract: A computer program product and system include a first database engine that maintains a first database, a second database engine that maintains a second database, a table that has a first instance in the first database and a second instance in the second database, and program instructions to execute write transactions, asynchronously pool the changes of the first instance, responsive to receiving a query against the table, determine to execute the query against the second instance, identify a first time, define a current replication batch that selectively comprises the pooled changes of the transactions before the first time, asynchronously replicate the current replication batch, store each change, assign a batch-ID to the query, send the query and the batch-ID to the second engine, respond to the current replication batch being completed, by executing the query on the second instance, and return results of the query execution on the second instance.
    Type: Grant
    Filed: November 15, 2017
    Date of Patent: February 25, 2020
    Assignee: International Business Machines Corporation
    Inventors: Andreas Brodt, Oliver Koeth, Daniel Martin, Knut Stolze
  • Patent number: 10560366
    Abstract: Aspects of the present invention disclose a method, computer program product, and system for determining recommendations for actions based on analysis of a device. The method includes retrieving information associated with a device from one or more databases. The method further includes determining information relevant to device performance as a function of an analysis of the retrieved information associated with the device, where the information relevant to device performance includes one or more factors related to an expected device performance. The method further includes determining a frequency of repair and replacement of one or more components of the device. The method further includes determining a recommendation of an action based on a comparison of an expected frequency of replacement and repair of the components of the device to the determined replacement and repair of the components of the device.
    Type: Grant
    Filed: November 29, 2017
    Date of Patent: February 11, 2020
    Assignee: International Business Machines Corporation
    Inventors: Tomasz Hanusiak, Konrad W. Komnata, Jaroslaw Osinski, Grzegorz P. Szczepanik
  • Patent number: 10554754
    Abstract: Various embodiments are generally directed to techniques for reducing the time required for a node to take over for a failed node or to boot. An apparatus includes an access component to retrieve a metadata from a storage device coupled to a first D-module of a first node during boot, the metadata generated from a first mutable metadata portion and an immutable metadata portion, and the first metadata specifying a first address of a second D-module of a second node; a replication component to contact the second data storage module at the first address; and a generation component to, in response to failure of the contact, request a second mutable metadata portion from a N-module of the first node and generate a second metadata from the second mutable metadata portion and the immutable metadata portion, the second mutable metadata portion specifying a second address of the second D-module.
    Type: Grant
    Filed: November 22, 2017
    Date of Patent: February 4, 2020
    Assignee: NetApp Inc.
    Inventors: Paul Yuedong Mu, Manoj Sundararajan, Paul Ngan
  • Patent number: 10534740
    Abstract: Provided is a multi-master collision prevention system including: a plurality of functional blocks including a plurality of external modules and a plurality of internal modules performing different functions; a plurality of interfaces respectively connected to the plurality of external modules, respectively; a plurality of dedicated registers including priority information of the plurality of functional blocks and connected to the plurality of functional blocks, respectively; a common block selectively connected to the plurality of functional blocks, and configured to function as a master for controlling the common blocks when the plurality of functional blocks are connected to the common block; and a priority determination unit configured to determine a connection between any one of the plurality of functional blocks and the common block.
    Type: Grant
    Filed: November 29, 2018
    Date of Patent: January 14, 2020
    Assignee: HYUNDAI AUTRON CO., LTD.
    Inventors: Kee Beom Kim, Young Suk Kim