Access Locking Patents (Class 710/200)
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Patent number: 9268715Abstract: A cache lock validation apparatus for a cache having sets of cache lines and coupled to a cache controller. The apparatus includes a memory coupled to a processor. The memory includes test case data related to an architecture of the cache. The processor selects a first set of the sets of cache lines and generates a corresponding first group of addresses and an overflow status address. The processor instructs the cache controller to sequentially lock the first group of addresses and the overflow status address. The processor checks a status of an overflow bit in a status register of the cache controller upon locking the overflow status address, and generates a FAIL status signal when the overflow bit is reset.Type: GrantFiled: February 24, 2014Date of Patent: February 23, 2016Assignee: FREESCALE SEMICONDUCTOR, INC.Inventors: Puneet Aggarwal, Eswaran Subramaniam
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Patent number: 9256898Abstract: Generally speaking, systems, methods and media for managing shared inventory in a virtual universe are disclosed. Embodiments of the method may include receiving notification of a user session being established between a user and a virtual universe simulator. The method may also include accessing a list of shared inventory items for the user where the list of shared inventory items includes one or more shared inventory items each having an inventory source associated with it. Embodiments may also include retrieving at least one shared inventory item from its associated inventory source and passing the retrieved shared inventory item to the virtual universe simulator. Further embodiments may include retrieving an updated listing for the shared inventory items from their associated inventory sources and passing the updated shared inventory item list to the virtual universe simulator. Further embodiments may include passing metadata for shared inventory items to the virtual universe simulator.Type: GrantFiled: February 11, 2008Date of Patent: February 9, 2016Assignee: International Business Machines CorporationInventors: Kulvir S. Bhogal, Rick Allen Hamilton, II, Clifford Alan Pickover, Anne R. Sand
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Patent number: 9256600Abstract: A method for electronic content locking including: accessing electronic content and determining if the electronic content is currently locked for a first user. The method further determines meta-data relating to the electronic content and allows a second user to override the lock such that the electronic content is unlocked if the meta-data meet predetermined criteria. A system for electronic content locking having: an electronic content repository; and a locking controller adapted to change the status of electronic content in the electronic content repository between locked and unlocked. The system further includes a data collection module designed to retrieve meta-data relating to electronic content; and an override controller designed to override the locking controller and change the status of the locked electronic content from a first user to a second user.Type: GrantFiled: April 13, 2012Date of Patent: February 9, 2016Assignee: D2L CORPORATIONInventors: Jeremy Auger, Brian Cepuran
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Patent number: 9258530Abstract: A processing method and an associated device for accessing a spatio-temporal part of a compressed video sequence. The method includes the following steps: obtaining a request for access to the part by identifying a temporal section defined between initial and final times of the initial and final spatial regions—different from the initial region of the sequence at the initial and final times; decomposing the access request into a plurality of elementary requests for access to a video fragment, each elementary request identifying a fixed spatial region to extract in a temporal sub-interval of the temporal section; and exploiting at least one elementary request to access video fragments constituting the part to access.Type: GrantFiled: April 8, 2011Date of Patent: February 9, 2016Assignee: CANON KABUSHIKI KAISHAInventors: Franck Denoual, Youenn Fablet
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Patent number: 9258430Abstract: A communication server enabling the provision of services offered by a second private communication network to terminals connected to a first communication network. The terminals are capable of simultaneously exchanging signaling data on a first transmission channel and voice data on a second transmission channel, in accordance with a selected protocol. The server is capable of transmitting configuration data to a terminal connected to the first network over the first channel and in accordance with a selected criterion. The configuration data is designed to enable a connection with the server to be set up on the first channel by the terminal, during a voice link on the second channel, so as to provide the terminal, during the voice link, with services offered by the second network.Type: GrantFiled: June 13, 2003Date of Patent: February 9, 2016Assignee: Alcatel LucentInventors: Francis Pinault, Jean-Louis Boulet
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Patent number: 9244868Abstract: A method and system for IO processing in a storage system is disclosed. In accordance with the present disclosure, a controller may take long term “lease” of a portion (e.g., an LBA range) of a virtual disk of a RAID system and then utilize local locks for IOs directed to the leased portion. The method and system in accordance with the present disclosure eliminates inter-controller communication for the majority of IOs and improves the overall performance for a High Availability Active-Active DAS RAID system.Type: GrantFiled: September 21, 2012Date of Patent: January 26, 2016Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.Inventors: Sumanesh Samanta, Sujan Biswas, Horia Simionescu
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Patent number: 9229884Abstract: A method and circuit for a data processing system provide virtualized instructions for accessing a partitioned device (e.g., 14, 61) by executing a control instruction (47, 48) to encode and store an access command (CMD) in a data payload with a hardware-inserted partition attribute (LPID) for storage to a command register (25) at a physical address (PA) retrieved from a special purpose register (46) so that the partitioned device (14, 61) can determine if the access command can be performed based on local access control information.Type: GrantFiled: April 30, 2012Date of Patent: January 5, 2016Assignee: Freescale Semiconductor, Inc.Inventors: Bryan D. Marietta, Gary L. Whisenhunt, Kumar K. Gala, David B. Kramer
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Patent number: 9223637Abstract: Methods and apparatus provide for a busy resource encoder to allow for a finer control of spin versus yield decisions. Specifically, the busy resource encoder allows for the execution a first thread, where the first thread is using a particular resource. Additionally, the busy resource encoder allows for the execution of a second thread, where the second thread requires use of the resource which is locked due to first thread execution. The busy resource encoder creates a busy code to indicate the progress of the execution of the first thread in relation to use of the resource by the first thread. The second thread can then read the busy code to determine to execute one of a spin and a yield routine by the second thread.Type: GrantFiled: July 31, 2007Date of Patent: December 29, 2015Assignee: Oracle America, Inc.Inventor: Peter B. Kessler
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Patent number: 9208857Abstract: An SRAM multiplexing apparatus comprise a plurality of local multiplexers and a global multiplexer. Each local multiplexer is coupled to a memory bank. The global multiplexer has a plurality of inputs, each of which is coupled to a corresponding output of the plurality of local multiplexers. In response to a decoded address in a read operation, an input of a local multiplexer is forwarded to a corresponding input of the global multiplexer. Similarly, the decoded address allows the global multiplexer to forward the input signal to a data out port via a buffer.Type: GrantFiled: April 30, 2014Date of Patent: December 8, 2015Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yi-Tzu Chen, Wei-jer Hsieh, Tsai-Hsin Lai, Ling-Fang Hsu, Hau-Tai Shieh
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Patent number: 9202046Abstract: Described systems and methods allow protecting a host system, such as a computer system or smartphone, from malware such as viruses, exploits, and rootkits. In some embodiments, a hypervisor executes at the highest processor privilege level and displaces other software to a guest virtual machine (VM). A security application detects the launch of a target process within the guest VM. In response to the launch, the hypervisor instantiates a process VM isolated from the guest VM, and relocates the target process to the process VM. In some embodiments, when the relocated target process attempts to access a resource, such as a file or registry key, an instance of the respective resource is fetched on-demand, from the guest VM to the respective process VM. Executing the target process within an isolated environment helps to contain malware to the respective environment.Type: GrantFiled: March 3, 2014Date of Patent: December 1, 2015Assignee: Bitdefender IPR Management Ltd.Inventors: Bogdan C. Dumitru, Sandor Lukacs, Dan H. Lutas, Raul V. Tosa
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Patent number: 9195856Abstract: In accordance with one aspect of the present description, a node of the distributed computing system has multiple communication paths to a data processing resource lock which controls access to shared resources, for example. In this manner, at least one redundant communication path is provided between a node and a data processing resource lock to facilitate reliable transmission of data processing resource lock signals between the node and the data processing resource lock. Other features and aspects may be realized, depending upon the particular application.Type: GrantFiled: November 7, 2013Date of Patent: November 24, 2015Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Yolanda Colpo, John C. Elliott, Enrique Q. Garcia, Larry Juarez, Todd C. Sorenson
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Patent number: 9195855Abstract: In accordance with one aspect of the present description, a node of the distributed computing system has multiple communication paths to a data processing resource lock which controls access to shared resources, for example. In this manner, at least one redundant communication path is provided between a node and a data processing resource lock to facilitate reliable transmission of data processing resource lock signals between the node and the data processing resource lock. Other features and aspects may be realized, depending upon the particular application.Type: GrantFiled: February 22, 2013Date of Patent: November 24, 2015Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Yolanda Colpo, John C. Elliott, Enrique Q. Garcia, Larry Juarez, Todd C. Sorenson
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Patent number: 9189297Abstract: Systems, methods, and computer-readable and executable instructions are provided for managing shared memory. A method for managing shared memory can include statically assigning a first number of locks to the shared memory during compile-time and dynamically assigning a second number of locks to the shared memory during runtime.Type: GrantFiled: December 14, 2010Date of Patent: November 17, 2015Assignee: Hewlett-Packard Development Company, L.P.Inventors: Dhruva Ranjan Chakrabarti, Sandya Srivilliputtur Mannarswamy
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Patent number: 9189536Abstract: Data is stored persistently. At least two different items of the data are stored in two different non-conflicting regions or two different physical clusters. A relationship is maintained between the two different items of data. The relationship enables a process to reach any one of the data items from the other data item. Consistency of the relationship is maintained notwithstanding updates of either or both of the items.Type: GrantFiled: August 5, 2009Date of Patent: November 17, 2015Assignee: Miosoft CorporationInventors: Albert B. Barabas, Ernst M. Siepmann, Mark D. A. van Gulik
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Patent number: 9176741Abstract: A method for sequential data storage. In an embodiment of such a method, a non-circular data structure is used for sequential data storage. The method includes dividing the non-circular data structure into a plurality of segments, where each segment includes a plurality of entries. The method further includes dynamically allocating the plurality of segments and sequentially associating the dynamically allocated segments.Type: GrantFiled: October 31, 2007Date of Patent: November 3, 2015Assignee: Invention Science Fund I, LLCInventor: Andrew Forsyth Glew
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Patent number: 9170956Abstract: A memory protection unit including hardware logic. The hardware logic receives a transaction from a virtual central processing unit (CPU) directed at a bus slave, the transaction being associated with a virtual CPU identification (ID), wherein the virtual CPU is implemented on a physical CPU. The hardware logic also determines whether to grant or deny access to the bus slave based on the virtual CPU ID. The virtual CPU ID is different than an ID of the physical CPU on which the virtual CPU is implemented.Type: GrantFiled: May 17, 2013Date of Patent: October 27, 2015Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Balatripura Sodemma Chavali, Karl Friedrich Greb, Rajeev Suvarna
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Patent number: 9164765Abstract: A method for managing a processor includes: obtaining an online request of a processor of a computer system; collecting lock contention information of the computer system if a lock contention status flag indicates a non-lock thrashing status; determining whether the computer system is in a lock thrashing status according to the lock contention information; and accepting the online request if it is determined that the computer system is in a non-lock thrashing status. By using the management method according to embodiments of the present application, processor performance degradation and a waste of idle processor resources that are caused by the case that the computer system is in a lock thrashing status are prevented, thereby improving utilization efficiency of processor resources and promoting overall performance of the computer system.Type: GrantFiled: May 9, 2014Date of Patent: October 20, 2015Assignee: Huawei Technologies Co., Ltd.Inventors: Xiaofeng Zhang, Han Zheng
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Patent number: 9164793Abstract: A method includes requesting a lock on a resource. The request for the lock on the resource is specified as a low priority non-blocking request that does not block one or more other requests such that one or more other requests can request a lock on the resource and obtain the lock on the resource in priority to the low priority non-blocking request. Based on the low priority request, the method includes maintaining the low priority request in a non-blocking fashion until a predetermined condition occurs. As a result of the predetermined condition occurring, the method includes handling the low priority request such that it is no longer treated as a low priority non-blocking request. Embodiments may further include a kill request which kills any operations on the resource, aborts any transactions having a lock on the resource, and locks the resource.Type: GrantFiled: December 21, 2012Date of Patent: October 20, 2015Assignee: Microsoft Technology Licensing, LLCInventors: Panagiotis Antonopoulos, Hanumantha Rao Kodavalla, Naveen Prakash
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Patent number: 9152458Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for determining image search results. One of the methods includes scheduling a first computation for execution on each of a first plurality of worker processes. The first computation changes a respective state of each of one or more of the first worker processes from a first state to a second state. A respective second computation is scheduled for execution on each of a second plurality of worker, where each respective second computation will use a different value for a particular variable for two or more of the second plurality of worker processes. The respective state of each of the second plurality of worker processes is updated from the second state to a third state, where the third state corresponds to execution of the second computation using a first value of the particular variable.Type: GrantFiled: August 30, 2012Date of Patent: October 6, 2015Assignee: Google Inc.Inventors: Joseph Hellerstein, Rian T. Pirtle, Lamia Youseff
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Patent number: 9146759Abstract: Techniques for processing source code written in a traditionally interpreted language such as JavaScript, or another dynamic and/or interpreted language, are disclosed. In one example, compiled code associated with the source code is constructed and executed. An assumption on which a specific aspect of the compiled code is based (e.g., an optimization) is tested at a checkpoint of the compiled code. A roll over to fallback code is performed if the test indicates the assumption is not true.Type: GrantFiled: July 30, 2010Date of Patent: September 29, 2015Assignee: Apple Inc.Inventors: Victor Leonel Hernandez Porras, Christopher Arthur Lattner, Jia-Hong Chen, Eric Marshall Christopher, Roger Scott Hoover, Francois Jouaux, Robert John McCall, Thomas John O'Brien, Pratik Solanki
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Patent number: 9141447Abstract: Conditional deferred queuing may be provided. Upon receiving a message, one or more throttle conditions associated with the message may be identified. A lock associated with the throttle condition may be created on the message until the throttle condition is satisfied. Then, the lock on the message may be removed and the message may be delivered.Type: GrantFiled: December 15, 2010Date of Patent: September 22, 2015Assignee: MICROSOFT TECHNOLOGY LICENSING, LLCInventors: Fai Sigalov, Victor Boctor, Wilbert De Graaf, Greg Gourevitch, Shaun Michael Wallace
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Patent number: 9141609Abstract: In a database system having a plurality of concurrently executing session processes, the method commences by establishing a master list of sequences, the master list comprising a plurality of sequence objects which in turn define a sequence of values used for numbering and other identification within the database system. To reduce sequence cache latch access contention, multiple tiers of latches are provided. Methods of the system provide a first tier having a first tier “global” latch to serialize access to the master list. A second tier of latches is provided, the second tier having multiple second tier latches to serialize access to corresponding allocated sequences of values such that at any point in time, only one of the concurrently executing session processes is granted access to the allocated sequence.Type: GrantFiled: December 1, 2011Date of Patent: September 22, 2015Assignee: ORACLE INTERNATIONAL CORPORATIONInventors: Fulu Li, Vineet Marwah, Amit Ganesh
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Patent number: 9137406Abstract: The present invention is directed to an information processing apparatus operable in any of a plurality of power states including a first power state and a second power state in which power consumption is lower than power consumption in the first power state. The information processing apparatus includes a reception unit configured to receive a shift instruction to shift to the second power state, and a control unit configured to shift the information processing apparatus to the second power state in a case where the reception unit receives the shift instruction while an application that does not support the second power state is not running, and not to shift the information processing apparatus to the second power state in a case where the reception unit receives the instruction while an application that does not support the second power state is running.Type: GrantFiled: May 28, 2013Date of Patent: September 15, 2015Assignee: Canon Kabushiki KaishaInventor: Takaaki Miyata
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Patent number: 9135054Abstract: A method and an apparatus that generate a request from a first thread of a process using a first stack for a second thread of the process to execute a code are described. Based on the request, the second thread executes the code using the first stack. Subsequent to the execution of the code, the first thread receives a return of the request using the first stack.Type: GrantFiled: July 16, 2008Date of Patent: September 15, 2015Assignee: Apple Inc.Inventors: Ronnie Misra, Joshua Shaffer
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Patent number: 9116862Abstract: A system that implements a data storage service may store data on behalf of storage service clients. The system may maintain data in multiple replicas of various partitions that are stored on respective computing nodes in the system. The system may employ a single master failover protocol, usable when a replica attempts to become the master replica for a replica group of which it is a member. Attempting to become the master replica may include acquiring a lock associated with the replica group, and gathering state information from the other replicas in the group. The state information may indicate whether another replica supports the attempt (in which case it is included in a failover quorum) or stores more recent data or metadata than the replica attempting to become the master (in which case synchronization may be required). If the failover quorum includes enough replicas, the replica may become the master.Type: GrantFiled: January 17, 2012Date of Patent: August 25, 2015Assignee: Amazon Technologies, Inc.Inventors: Timothy Andrew Rath, Jakub Kulesza, David A. Lutz
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Patent number: 9111043Abstract: To provide a semiconductor device and a mobile terminal device capable of operating with stability. A semiconductor device includes an HSIC physical layer circuit fixedly connected to another semiconductor device through a bus line, a USB link control unit that operates with either a USB host function or a USB device function, and link-connects to the another semiconductor device, a nonvolatile storage unit that stores selection data, the selection data being used to select the USB function with which the USB link control unit operates, and a semiconductor substrate on which the HSCI physical control unit, the USB link control unit, and the nonvolatile storage unit are formed.Type: GrantFiled: February 14, 2013Date of Patent: August 18, 2015Assignee: RENESAS ELECTRONICS CORPORATIONInventor: Satoshi Sasaki
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Patent number: 9106650Abstract: An access system is described herein which allows an application module to access a user-owned resource based on an indication of a user's intent to interact with the user-owned resource. For example, the application module can provide an application user interface which embeds a gadget associated with a particular user-owned resource. The access system can interpret the user's interaction with the gadget as conferring implicit permission to the application module to access the user-owned resource associated with the gadget. In addition, or alternatively, the user may make a telltale gesture in the course of interacting with the application module. The access system can interpret this gesture as conferring implicit permission to the application module to access a user-owned resource that is associated with the gesture.Type: GrantFiled: November 9, 2011Date of Patent: August 11, 2015Assignee: Microsoft Technology Licensing, LLCInventors: Franziska Roesner, Tadayoshi Kohno, Alexander Moshchuk, Bryan J. Parno, Helen J. Wang
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Patent number: 9098301Abstract: The present invention provides an electronic device including a write-once-then-read-only register, a chipset, a read-only memory, a flash memory and a central processor. The write-once-then-read-only register is arranged to store a determination value. The chipset is arranged to produce a CPU reset signal. The read-only memory is implemented in the chipset, and has a first memory block which corresponds to a predetermined address and is used to store a first instruction. The flash memory is coupled to the chipset, and has a second memory block which corresponds to the predetermined address and is used to store a second instruction. The central processor is arranged to determine the location of the predetermined address according to the CPU reset signal and the determination value.Type: GrantFiled: September 4, 2013Date of Patent: August 4, 2015Assignee: VIA TECHNOLOGIES, INC.Inventors: Kai Li, Jiangbo Wang, Wei Yin
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Patent number: 9100528Abstract: The present invention is directed to an information processing apparatus operable in any of a plurality of power states including a first power state and a second power state in which power consumption is lower than power consumption in the first power state. The information processing apparatus includes a reception unit configured to receive a shift instruction to shift to the second power state, and a control unit configured to shift the information processing apparatus to the second power state in a case where the reception unit receives the shift instruction while an application that does not support the second power state is not running, and not to shift the information processing apparatus to the second power state in a case where the reception unit receives the instruction while an application that does not support the second power state is running.Type: GrantFiled: May 28, 2013Date of Patent: August 4, 2015Assignee: Canon Kabushiki KaishaInventor: Takaaki Miyata
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Patent number: 9098462Abstract: A first processing core selects a first memory address of a first memory area based on a last written buffer that identifies a last written memory address. The first memory area is a portion of a shared memory, and the first processing core has sole write access to the first memory area among a plurality of processing cores that use the shared memory. Data is written to the first memory address of the first memory area. After writing the data to the first memory address, the last written buffer is updated to designate the first memory address as the last written memory address of the first memory area. A second processing core of the plurality of processing cores is operable to access the data by accessing the last written buffer and determining, based on the last written buffer, that the data is stored at the first memory address.Type: GrantFiled: September 14, 2010Date of Patent: August 4, 2015Assignee: The Boeing CompanyInventors: Michael J. McNicholl, David Joseph Guichard, Yong-Long Ling, George Wu
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Patent number: 9071654Abstract: Systems, methods, and computer-readable storage media for ensuring data consistency and concurrency for globally unique identifiers (GUIDs) and associated content items via locking. A content management system configured to practice the method can receive, from a client device, a request to perform a content item operation in a storage environment that affects a GUID. Then the content management system can acquire a first mutex for a namespace associated with the content item operation, such as an application-level lock, and acquire a second mutex for the GUID, such as a row-level lock in a database table. After acquiring the locks, the content management system can perform the content item operation according the request, and update the GUID based on the content item operation. Then the content management system can release the mutexes and provide a confirmation to the client device in response to the request.Type: GrantFiled: March 12, 2013Date of Patent: June 30, 2015Assignee: Dropbox, Inc.Inventor: Rian Hunter
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Patent number: 9063937Abstract: A method is provided for a destination storage system to join a storage area network with a source storage system. The method includes discovering a volume on the source storage system when the source storage system exports the volume to the destination storage system and exporting the volume to the host computer systems. When a command to reserve the volume for a host computer system is received, the method includes determining locally if the volume is already reserved. When the volume is not already reserved, the method includes reserving locally the volume for the host computer system and transmitting to the source storage system another command to reserve the volume for the destination storage system.Type: GrantFiled: July 31, 2012Date of Patent: June 23, 2015Assignee: Hewlett-Packard Development Company, L.P.Inventors: Jonathan Andrew McDowell, Siamak Nazari
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Patent number: 9052944Abstract: We teach a powerful approach that greatly simplifies the design of non-blocking mechanisms and data structures, in part by, largely separate the issues of correctness and progress. At a high level, our methodology includes designing an “obstruction-free” implementation of the desired mechanism or data structure, which may then be combined with a contention management mechanism whose role is to facilitate the conditions under which progress of the obstruction-free implementation is assured. In general, the contention management mechanism is separable semantically from an obstruction-free concurrent shared/sharable object implementation to which it is/may be applied. In some cases, the contention management mechanism may actually be coded separately from the obstruction-free implementation. We elaborate herein on the notions of obstruction-freedom and contention management, and various possibilities for combining the two.Type: GrantFiled: April 15, 2005Date of Patent: June 9, 2015Assignee: Oracle America, Inc.Inventors: Mark S. Moir, Victor M. Luchangco, Maurice Herlihy
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Patent number: 9043380Abstract: A data processing system arranged for receiving over a network, according to a data transfer protocol, data directed to any of a plurality of destination identities, the data processing system comprising: data storage for storing data received over the network; and a first processing arrangement for performing processing in accordance with the data transfer protocol on received data in the data storage, for making the received data available to respective destination identities; and a response former arranged for: receiving a message requesting a response indicating the availability of received data to each of a group of destination identities; and forming such a response; wherein the system is arranged to, in dependence on receiving the said message.Type: GrantFiled: July 13, 2012Date of Patent: May 26, 2015Assignee: Solarflare Communications, Inc.Inventors: Steven Leslie Pope, Derek Edward Roberts, David James Riddoch, Greg Law, Steve Grantham, Matthew Slattery
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Patent number: 9043551Abstract: For a plurality of input/output (I/O) operations waiting to assemble complete data tracks from data segments, a process, separate from a process responsible for the data assembly into the complete data tracks, is initiated for waking a predetermined number of the waiting I/O operations.Type: GrantFiled: March 31, 2014Date of Patent: May 26, 2015Assignee: International Business Machines CorporationInventors: Kevin J. Ash, Michael T. Benhase, Lokesh M. Gupta, David B. Whitworth
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Publication number: 20150113190Abstract: A processing unit of a packet processing node initiates a transaction with an accelerator engine to trigger the accelerator engine for performing a processing operation with respect to a packet, and triggers the accelerator engine to perform the processing operation. The processing unit attempts to retrieve a result of the first processing operation from a memory location to which a result is to be written. It is determined whether the result has been written to the memory location, and when it is determined that the result has not yet been written to the memory location, the processing unit is locked until at least a portion of the result is written to the memory location.Type: ApplicationFiled: October 17, 2014Publication date: April 23, 2015Inventors: Aron WOHLGEMUTH, Rami ZEMACH, Gil LEVY
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Publication number: 20150106542Abstract: Provided is a lock management system, a lock management method and a lock management program whereby lock acquisition and release processes can be carried out at high speed. A lock management system 1 having a multiprocessor includes: a lock acquisition process 310 for carrying out a lock acquisition process for a thread according to one or more lock modes, at least a portion of the lock modes being a shared lock that can be acquired by one or more threads; and lock status holding means 410 for managing the number of threads acquiring a lock, by first information which can express the number of threads by one word that can be handled by an indivisible access command of the multi-processor, and second information representing a whole range of the number of threads that can possibly acquire a lock in each lock mode.Type: ApplicationFiled: March 26, 2013Publication date: April 16, 2015Inventor: Takashi Horikawa
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Patent number: 9003092Abstract: A bus system of a system on chip (SoC) includes a first and a second masters, a first slave, and a first and a second control modules. The control modules generates a first and a second access control state signals in response to a first locking access preparation request signal from a corresponding master. The access control signals are broadcasted between the first and the second control modules through a communication channel. A method of operating a bus system in a locked access mode includes allowing one of masters to access one of slaves through a control module and restricting other masters from accessing the one of slaves through other control modules connecting the other masters and the one of slaves in accordance with a control state signal.Type: GrantFiled: February 23, 2012Date of Patent: April 7, 2015Assignee: Samsung Electronics Co., Ltd.Inventors: Sung-min Hong, Jae-geun Yun
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Patent number: 8988190Abstract: A portable information handling system includes a top cover, a base, and an electronic latch. The top cover is connected to the base. The top cover has a gesture sensitive surface configured to receive a trace. The electronic latch is in communication with the gesture sensitive surface, and is configured to latch the top cover and the base together. The electronic latch is further configured to unlatch the top cover from the base in response to receiving a signal representing that the trace received on the gesture sensitive surface is proper.Type: GrantFiled: September 3, 2009Date of Patent: March 24, 2015Assignee: Dell Products, LPInventors: Bradley M. Lawrence, Keith A. Kozak, Nicolas A. Denhez
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Patent number: 8990179Abstract: Described herein are techniques for time limited lock ownership. In one embodiment, in response to receiving a request for a lock on a shared resource, the lock is granted and a lock lease period associated with the lock is established. Then, in response to determining that the lock lease period has expired, one or more lock lease expiration procedures are performed. In many cases, the time limited lock ownership may prevent system hanging, timely detect system deadlocks, and/or improve overall performance of the database.Type: GrantFiled: December 20, 2012Date of Patent: March 24, 2015Assignee: Oracle International CorporationInventors: Wilson Chan, Angelo Pruscino, Michael Zoll
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Patent number: 8977795Abstract: Systems, methods, and other embodiments associated with managing access to critical sections in a multithread processor are described. According to one embodiment, an apparatus includes a register configured to store i) respective resource identifiers that identify respective resources and ii) respective priorities for respective resource identifiers. The apparatus includes a managing module logic configured to receive a blocking instruction for a first resource having a first resource identifier that is associated with a first task, access the register to determine a priority associated with the first resource identifier, select one or more dependent resources based, at least in part on the priority associated with first resource identifier, and block the first resource and the dependent resources. In this manner the first task is granted access to the first resource and the dependent resources while other tasks are prevented from accessing the first resource and the dependent resources.Type: GrantFiled: October 23, 2012Date of Patent: March 10, 2015Assignee: Marvell International Ltd.Inventors: Olaf Mater, Sascha Schmeckenbecher
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Patent number: 8972994Abstract: Example methods and apparatus to manage object locks are disclosed. A disclosed example method includes receiving an object lock request from a processor, the lock request associated with object lock code to lock an object, and generating object lock-bypass code based on a type of the processor, the object lock-bypass code to execute in a managed runtime in response to receiving the object lock request. The example method also includes identifying a type of instruction set architecture (ISA) associated with the processor, invoking a checkpoint instruction for the processor based on the identified ISA, suspending the object lock code from executing and executing target code when the object is uncontended, and allowing the object lock code to execute when the object is contended.Type: GrantFiled: December 23, 2009Date of Patent: March 3, 2015Assignee: Intel CorporationInventors: Suresh Srinivas, Stephen H. Dohrmann, Mingqiu Sun, Uma Srinivasan, Ravi Rajwar, Konrad K. Lai
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Publication number: 20150058509Abstract: A method of an embodiment enables locking of downstream ports of a USB hub controller in an electronic apparatus. The method includes the determination step, the assertion step and the lock step. The determination step determines, with a BIOS, whether a lock setting has been made on each of the downstream ports. The assertion step performs, with the BIOS, assertion control for resetting the USB hub controller. The lock step performs, with the BIOS, lock control during the assertion control based on whether the lock setting has been made.Type: ApplicationFiled: August 13, 2014Publication date: February 26, 2015Inventor: Katsuhiro UCHIDA
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Patent number: 8966147Abstract: A method for resolving deadlock in a multi-threaded computing system using a novel lock lease is disclosed. A first thread leases a lock held by the first thread to a second thread different from the first thread. The leasing transfers control of the lock to the second thread while the first thread retains ownership of the lock. To lease the lock: (1) the second thread applies for the lease from the first thread; (2) the first thread grants the lease; (3) the first thread waits for the second thread to complete a task; (4) the second thread terminates the lease; (5) the first thread confirms termination of the lease. The first thread receives control of the lock back from the second thread after the second thread has finished using resources controlled by the lock. The second thread also can sublease the lock to a third thread.Type: GrantFiled: August 22, 2012Date of Patent: February 24, 2015Inventors: Wenguang Wang, Richard Paul Spillane
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Patent number: 8966494Abstract: A data processing apparatus has processing circuitry for processing threads using resources accessible to the processing circuitry. Thread handling circuitry handles pending threads which are waiting for resources required for processing. When a request is made for a resource which is not available, a lock is set to ensure that once the resource becomes available, the resource remains available until the lock is removed. This prevents other threads reallocating the resource. When a subsequent pending thread requests access to the same locked unavailable resource, the lock is transferred to that subsequent thread so that the latest thread accessing that resource is considered the lock owning thread. The lock is removed once the lock owning thread is ready for processing.Type: GrantFiled: March 16, 2012Date of Patent: February 24, 2015Assignee: ARM LimitedInventors: Nebojsa Makljenovic, Benjamin Charles James
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Publication number: 20150052273Abstract: An information processing system includes: an information processing apparatus; and a terminal device configured to communicate with the information processing apparatus using a connection established between the information processing apparatus and the terminal device. The information processing apparatus notifies the terminal device of scheduled time of release of the connection, and the terminal device determines whether or not current time has passed the scheduled time notified from the information processing apparatus at the time of transmitting a request to the information processing apparatus and, in a case where the current time is determined to have passed the scheduled time, before transmitting the request to the information processing apparatus, transmits a connection request for establishing a connection with the information processing apparatus to the information processing apparatus.Type: ApplicationFiled: July 29, 2014Publication date: February 19, 2015Inventor: Hiroya NOZAKI
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Patent number: 8954692Abstract: A file protecting method and system and a memory controller and a memory storage apparatus using the same are provided. The file protecting method includes performing a file protection enabling procedure for a file to generate an entry value backup according to at least one entry value corresponding to at least one cluster storing the file, which is recorded in a file allocation document, store the entry value backup in a secure storage area and change the entry value corresponding to the cluster storing the file in the file allocation document, wherein the file cannot be read according to the changed entry value. Accordingly, the file stored in the memory storage apparatus the can be effectively protected from being accessed by an un-authorized person.Type: GrantFiled: July 17, 2012Date of Patent: February 10, 2015Assignee: Phison Electronics Corp.Inventor: Chien-Fu Lee
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Patent number: 8949566Abstract: Methods, apparatuses, and computer program products are provided for locking access to data storage shared by a plurality of compute nodes. Embodiments include maintaining, by a compute node, a queue of requests from requesting compute nodes of the plurality of compute nodes for access to the data storage, wherein possession of the queue represents possession of a mutual-exclusion lock on the data storage, the mutual-exclusion lock indicating exclusive permission for access to the data storage; and conveying, based on the order of requests in the queue, possession of the queue from the compute node to a next requesting compute node when the compute node no longer requires exclusive access to the data storage.Type: GrantFiled: December 2, 2010Date of Patent: February 3, 2015Assignee: International Business Machines CorporationInventors: Madhusudanan Kandasamy, Vidya Ranganathan, Murali Vaddagiri
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Publication number: 20150032927Abstract: Subject matter disclosed herein relates to an apparatus comprising memory and a controller, such as a controller which determines block locking states in association with operative transitions between two or more interfaces that share at least one block of memory. The apparatus may support single channel or multi-channel memory access, write protection state logic, or various interface priority schemes.Type: ApplicationFiled: August 8, 2014Publication date: January 29, 2015Inventors: Giulio ALBINI, Emanuele CONFALONIERI
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Patent number: 8943502Abstract: A method, system, and computer usable program product for retooling lock interfaces for using a dual mode reader writer lock. An invocation of a method is received using an interface. The method is configured to operate on a lock associated with a resource in a data processing system. A determination is made whether the lock is an upgraded lock. The upgraded lock is the DML operating in an upgraded mode. An operation corresponding to the method is executed on the DML, if the lock is the upgraded lock.Type: GrantFiled: March 15, 2010Date of Patent: January 27, 2015Assignee: International Business Machines CorporationInventors: Bruce Mealey, James Bernard Moody