Abstract: An input/output subsystem is configured as a plurality of input/output subsystem images, each of which appears to a program as an independent input/output subsystem. An input/output subsystem image is identified by an input/output subsystem image identifier, which is used by various programs to designate the particular input/output subsystem image for which an I/O operation is to be performed. An input/output subsystem image includes, for instance, one or more input/output paths. An input/output path of an input/output subsystem image is identified by an input/output path identifier, as well as a physical input/output path identifier.

Abstract: A peripheral interface device that is adaptable into a computer system and which provides a communication interface for a plurality of external devices. The peripheral interface device comprises: a plurality of transfer control logic (TCL) modules, wherein each TCL module provides a dedicated interface for an associated one of the external devices, and wherein multiple TCL modules can communicate in parallel with their associated external devices; and a dual port memory (DPM) device that is in communication with an input/output bus of the computer system, wherein the DPM device can selectively communicate with each of the plurality of TCL modules.

Abstract: A control apparatus of a storage unit having a first and a second communication ports for conducting communication with a computer, a first and a second processors that control respectively the first and the second communication ports, first and second storage devices that store respectively a first and a second queues for storing commands sent from the computer respectively to the first and the second communication ports, and a first nonvolatile memory that the first processor accesses, the first and the second processors executing the commands stored respectively in the first and the second queues to thereby control the communications with the computer, comprising a unit causing the second processor to implement execution of the command stored in the first queue; and a unit changing data stored in the first memory while the second processor is being caused to implement execution of the command stored in the first queue.

Abstract: An input/output subsystem is configured as a plurality of input/output subsystem images, each of which appears to a program as an independent input/output subsystem. In response to an operating system image submitting an input/output (I/O) request requesting access to an input/output subsystem image, a determination is made as to whether the operating system image is authorized to access the input/output subsystem image. In response to the access being authorized, the I/O request is authorized.

Abstract: When an active data copy process relative to a logical storage device is performed without involving a computer, an access permission/rejection of the computer to the logical storage device is checked by referring to a correspondence between WWN of the computer and a logical storage device identifier LUN to thereby determine whether an access to a copy source logical storage device and a copy destination logical storage device is permitted or not. It is therefore possible to prevent an outflow of illegal data from a storage subsystem to be caused by an active copy instruction command.

Abstract: A wireless local area network (WLAN) includes mobile devices that are allowed to transfer wireless connections between WLAN subnets or channels having different access points. The access points connect to a central controller or roaming server that supports seamless hand-offs of mobile devices from one access point to another access point. The roaming server supports the reassignment of session data parameters from one access point to another (e.g., access point address spoofing) so that the mobile device can use the same parameters for communicating to a new access point. The roaming server also supports the seamless handoff of a mobile device from one access point to another by using a master-slave switch technique across two piconets. The roaming server also facilitates the control of access points by establishing a host controller interface and wireless protocol stack in the roaming server and another, complementary wireless protocol stack in the access point.

Abstract: Methods and systems for optimizing data mirroring operations are disclosed. One or more data channels can be selected from among a plurality of data channels associated with a data-processing system, such that the selected data channel or data channels can comprise a data channel that is the least occupied data channel among the plurality of data channels. A plurality of data mirroring operations can then operate simultaneously on the selected data channel or data channels, in response to selecting the data channel form among the plurality of data channels, thereby optimizing data mirroring operations associated with said data-processing system.

Abstract: A system interface having a cache memory and a plurality of directors. Each one of the plurality of directors includes a data pipe coupled between an input of such one of the directors. The data pipe includes a data pipe memory and a data pipe memory controller for controlling the data pipe memory. Each one of the directors includes microprocessor coupled to the data pipe memory controller. The system includes a switching network coupled to the cache memory to transfer data between the memory and: (a) the input of a selected one of the plurality of directors through the data pipe memory; (b) the microprocessor and the data pipe memory through the data pipe memory controller of a selected one of the plurality of directors; and (c) the microprocessor and the data pipe memory controller while by-passing the data pipe memory of a selected one of the plurality of directors.

Abstract: An embodiment of an access control system is disclosed herein that is easily customized by a user. A user defines cardholders, clearance levels, and logic scripts that dictate how the system will operate. User-entered changes propagate through the system automatically. The disclosed embodiment includes personality modules coupled to both field devices and a server. However, the personality modules operate autonomously from the server. Personality modules can also be added to the system dynamically and are auto-configuring. Display modules may also be included for locally and remotely programming, testing, managing, and operating personality modules and field devices. The system may include an intelligent display station that includes a reader and a display, displaying information in an interactive user interface in accordance with an individual's clearance level.

Abstract: A control apparatus of a storage unit having a first and a second communication ports for conducting communication with a computer, a first and a second processors that control respectively the first and the second communication ports, first and second storage devices that store respectively a first and a second queues for storing commands sent from the computer respectively to the first and the second communication ports, and a first nonvolatile memory that the first processor accesses, the first and the second processors executing the commands stored respectively in the first and the second queues to thereby control the communications with the computer, comprising a unit causing the second processor to implement execution of the command stored in the first queue; and a unit changing data stored in the first memory while the second processor is being caused to implement execution of the command stored in the first queue.

Abstract: In a bus system having a plurality of instruments linked to each other, the invention proposes a method which avoids useless data transmission or useless occupation of a data transmission line. A data transmission line is established for starting receipt/transmission of data after available instruments for the transmission/receipt of the date are identified. During the transmission of the data, the enable and disable state of transmission/receipt of the data is monitored and if desired, the data transmission is broken.

Abstract: In a limit cycle autotuning method, the first limit cycle of alternately outputting a heat-side manipulated variable set point and a cool-side manipulated variable set point is generated. The first control response corresponding to the first limit cycle is detected. The second limit cycle is generated by changing one of the heat-side manipulated variable set point and the cool-side manipulated variable set point on the basis of predetermined change instruction information for instructing which one of the heat-side manipulated variable set point and the cool-side manipulated variable set point is to be changed after the first limit cycle and a predetermined manipulated variable change ratio indicating the degree of the change. The second control response corresponding to the second limit cycle is detected. The control parameter for each of the heat mode and the cool mode is calculated on the basis of the detected first and second control responses. A heat/cool control apparatus is also disclosed.

Abstract: A translating host bus interface adapter is capable of connecting a computer system as a compute node to a storage area network. The adapter has a processor and a memory system containing firmware for execution in the processor. The host bus adapter is capable of recognizing first and second types of redundant storage accessible over the storage area network and translating generic storage commands into translated commands suitable for communicating with either type of redundant storage, and forwarding the translated commands onto the storage area network. The translating host bus adapter is also capable of constructing and maintaining a mirrored dataset comprising copies on redundant storage systems of either or both types.

Abstract: A system and method for a dual stage persistent reservation preemption protocol is presented. A first adapter registers with a shared device and obtains reservation ownership of the shared device. The first adapter sets an internal reservation owner flag to “TRUE” in response to obtaining reservation ownership. The internal flag status is analyzed if the first adapter is de-registered from the shared device. When a second adapter preempts the first adapter to obtain reservation ownership, the first adapter loses its registration with the shared device. The first adapter receives an error message from the shared device in response to a request, and the first adapter checks its internal reservation owner flag status. If the first adapter's internal reservation owner flag status is “TRUE”, the first adapter re-registers with the shared device.

Abstract: A method, system, and apparatus for preventing input/output (I/O) adapters used by an operating system (OS) image, in a logically partitioned data processing system, from fetching or corrupting data from a memory location allocated to another OS image within the data processing system is provided. A hypervisor prevents transmission of data between an input/output adapter in one of the logical partitions and memory locations assigned to other logical partitions during a direct memory access (DMA) operation by assigning each of the input/output adapters a range of I/O bus DMA addresses. The I/O adapters (IOAs) are connected to PCI host bridges via terminal bridges. A single terminal bridge may support multiple IOAs, in which case every terminal bridge has a plurality of sets of range registers, each associated with a respective one of the IOAs to which it is connected. An arbiter is provided which selects one of the input/output adapters to use the PCI bus.

Abstract: The present invention is directed to a configurable input/output interface and method for data transfer between a host and a target in a network environment. A method for providing data transfer between a host and a target in a network environment by a configurable input/output interface includes providing a logical identifier. The logical identifier is configurable for operation in at least two modes, the at least two modes including at least two of referencing multiple data transfer routes between the target and the input/output device utilizing a single logical identifier, referencing a single route between the target and the input/output device utilizing a logical identifier, and referencing a physical address of the target utilizing a logical identifier. Communications between the host and the target are managed by selecting a mode of the at least two modes operable by the input/output interface.

Abstract: The SCSI control block interface provides for distributed processing of storage commands that provides transports and processing blocks the ability to interconnect with each other independent of the underlying transport or hardware architecture. The interface receives a SCSI control block from a transport and determines a storage command associated with the SCSI control block. Based upon the storage command, a particular processor that processes the storage command is determined. The SCSI control block is routed to the appropriate processor for processing. After processing, the SCB is routed to a transport for delivery.

Abstract: The present invention relates to a method and system for transferring portions of a memory block. A first data mover is configured with a first start address corresponding to a first portion of a source memory block. A second data mover is configured with a second start address corresponding to a second portion of the source memory block sized differently from the first portion. The first portion of the source memory block is transferred by the first data mover and the second portion of the source memory block is transferred by the second data mover.

Abstract: A node device for a serial databus connecting a number of devices, having in each case three input and output units, in which case a second output unit of the node device can, in each case, be connected to a first input unit of a second node device of the databus. A third output unit of the node device can be connected to an input unit of a device, and a third input unit of the node device can be connected to an output unit of the device. The node device contains a multiplexer for connecting the first or third input unit to the second output unit of the node device and, furthermore, a detector, which is coupled to the first input unit, to the third input unit and to the multiplexer, for detection of an incoming data stream at the first and/or third input unit for appropriate control of the connection of the multiplexer.

Abstract: A computer system comprising multi-ported memory electrically coupled to a central processing unit and a peripheral device. The central processing unit and the peripheral device access the multi-ported memory independently.

Abstract: An apparatus comprising a first circuit and a second circuit. The first circuit may be configured to transfer data between a plurality of first ports and a second port via a single port memory in response to one or more control signals. The second circuit may be configured to generate the one or more control signals, wherein the memory is time shared among the second port and the plurality of first ports.

Abstract: A disk storage system has high throughput between a disk adapter of a disk controller and a disk array. The disk adapter of the disk controller is connected to the disk array through switches. Data on a channel between the switch and a RAID group is multiplexed in the switch to be transferred onto a channel between the switch and the disk adapter and data on the channel between the switch and the disk adapter is demultiplexed in the switch to be transferred onto the channel between the switch and the RAID group. A data transfer rate on the channel between the disk adapter and the switch is made higher than that on the channel.

Abstract: A method and apparatus to provision a plurality of server blades from a modular server system with operating system software is described.

Abstract: In a network implemented based on IEEE 1394, when an HDD is connected to a personal computer via an IEEE 1394 connection unit and a GUID terminal connection unit, the HDD obtains a GUID via the GUID terminal connection unit. When the personal computer requests acquisition of an access right, the HDD obtains a GUID via the IEEE 1394 connection unit, and compares it with the GUID obtained via the GUID terminal connection unit, and since the GUIDs match, the HDD assigns an access right to the personal computer. Even if another personal computer not connected to the HDD via the GUID terminal connection unit, transmits a GUID to the HDD via the IEEE 1394 connection unit, because the GUID differs from that of the personal computer connected to the HDD via the GUID terminal connection unit, an access right is not assigned to the personal computer not connected to the HDD via the GUID terminal connection unit.

Abstract: A method and apparatus for a burst mode write in a shared bus architecture comprising detecting a write data burst, determining if at least one memory unit is available to receive the write data burst, writing the write data burst to the at least one memory unit if the at least one memory unit is available to receive data. Storing a first portion of the write data burst in a buffer, concurrently with activating the at least one memory unit to receive data, if the at least one memory unit is not available to receive data; writing a second portion of the write data burst to the at least one memory unit when the at least one memory unit is available to receive data, and writing the first portion of the write data burst from the buffer to the at least one memory unit after writing the second portion of the write data burst.

Abstract: Methods and apparatus are disclosed for communication between appliances. In one embodiment, the method comprises receiving at an appliance communications manager that stands apart from source and destination appliances, a connection request from a source appliance, receiving at the appliance communications manager destination appliance communication information for a destination appliance, and receiving at the appliance communications manager a communication message from the source appliance. The method additionally comprises storing the communication message in a data memory of the appliance communications manager, establishing, via the appliance communications manager, a communication link with the destination appliance, and transferring the stored communication message to the destination appliance via the communication link.

Abstract: A technique for decreasing VLAN lookup times in hardware-based packet switches by emulating the functionality of a content addressable memory (CAM) with software and random access memories (RAM). The decrease in lookup time is achieved by using content from the data packet to index directly into a table that stores forwarding information. Since the forwarding information is addressed directly by content from the packet, the need to spend time and resources sorting through the table of forwarding information with a key search is eliminated.

Abstract: A matrix of routing cells forming a cross-bar decoder (70). Signal triplets (84, 86, 88) coupled to the cross-bar decoder (70) are assigned a priority. A register (50) provide outputs to the cross-bar decoder (70) to either activate or deactivate routing of the triplet signals (84, 86,88) through the cross-bar decoder (70). The routing cells (72-82) are arranged in a matrix of columns and rows, where the triplet signals are applied to the row routing cells (72, 74, 76) and are extracted at the column routing cells (76, 80, 82). When a routing cell in a row is enabled to couple signals to an output, it disables all other lower priority routing cells in its column so that they cannot route signals to that output. Based on the automatic disabling of routing cells by others, the signals ripple through the cross-bar decoder (70) until all high priority I/O pins are used.

Abstract: A system and method for developing signals to activate vehicle stability controllers wherein wheel speed sensors for the wheels of the vehicle are used as input variables. The wheel speed values are used in a wheel rolling radius determination. Dynamic imbalance strength estimation and dynamic imbalance strength magnitude use the computed wheel rolling radius information in a tire imbalance logic unit to develop signals to activate the vehicle stability controllers.

Abstract: A method is provided for processing a remote request by a local processor. The method includes the steps of receiving a remote request from a remote node over a network by a remote aware software driver interface and modifying the remote request with a software converter to emulate a local request which can be processed by the local processor. The method also includes the step of verifying that the remote request can be serviced by the local processor and executing the remote request by the local processor.

Abstract: A method, system, and apparatus for preventing input/output (I/O) adapters used by an operating system (OS) image, in a logically partitioned data processing system, from fetching or corrupting data from a memory location allocated to another OS image within the data processing system is provided. A hypervisor prevents transmission of data between an input/output adapter in one of the logical partitions and memory locations assigned to other logical partitions during a direct memory access (DMA) operation by assigning each of the input/output adapters a range of I/O bus DMA addresses. The I/O adapters (IOAs) are connected to PCI host bridges via terminal bridges. A single terminal bridge may support multiple IOAs, in which case every terminal bridge has a plurality of sets of range registers, each associated with a respective one of the IOAs to which it is connected. An arbiter is provided which selects one of the input/output adapters to use the PCI bus.

Abstract: Determining device characteristics includes obtaining a first globally accessible value, if the first globally accessible value corresponds to a stored first value, obtaining device characteristics data from a relatively fast memory, if the first globally accessible value does not correspond to the stored first value, obtaining a second globally accessible value, if the second globally accessible value corresponds to a stored second value, obtaining device characteristics data from a relatively fast memory, if the second globally accessible value does not correspond to the stored second value, obtaining device characteristics data from a relatively slow memory and updating the relatively fast memory, the stored first value, and the stored second value. The globally accessible first value may include device I/O information. The globally accessible values may be stored in global memory that is accessible to a plurality of processors.

Abstract: Described are techniques for performing compression and decompression of statistical data. This data may be used in connection with performing optimizations. A delta value for each statistic is determined representing a difference between a current value and a previous value. Delta values are stored in a statistics table in a compressed form using a monotonic compression scheme. Small tables are used to determine decompressed values estimating the observed values when information is retrieved for use to within a predetermined relative error. Statistical information is stored and represented in a statistics table and an events table. Statistical information is selectively fetched and loaded into memory from a storage device. Indexing techniques are used to force physical continuity rows of the tables in accordance with a specified retrieval order.

Abstract: A two-wire process transmitter for use in monitoring an industrial process includes HART communication circuitry and Fieldbus communication circuitry to couple to a two-wire process control loop. A first pair of electrical terminals is provided to couple the HART communication circuitry to the two-wire process control loop in a first configuration, and a second pair of electrical terminals is provided to couple the Fieldbus communication circuitry to the two-wire process control loop in an alternative second configuration.

Abstract: Within one embodiment of the present invention, arbitration software operating on a computer is able to determine whether communication software utilizes the same serial communication (COM) port of the computer as a HotSync Manager. If they do use the same serial COM port, the present embodiment arbitration software shuts down the HotSync Manager, if its running, thereby enabling the serial COM port to be utilized for other purposes (e.g., wireless modem communication). However, if the present embodiment arbitration software detects a HotSync Request received via the serial COM port, it runs the HotSync Manager enabling a HotSync process to occur between (for example) a personal digital assistant (PDA) and the computer. Once the present embodiment arbitration software detects the completion of the HotSync process, it shuts down the HotSync Manager until it detects the next HotSync Request.

Abstract: In a multi-modal user interface, user inputs may be made in various different ways. For instance, the user might use a keyboard, a speech system, a vision system, a mouse or pen. Different inputs made by the user may be related and may have different significance. A processing system detects and resolves ambiguities and/or conflicts in inputs made by the user using the different input modes available.

Abstract: An intelligent apparatus comprises a master module and a plurality of slave modules each having a CPU, a control circuit and an associated software, wherein each of the slave modules is in communication with the master module, and the CPU of the master module may control the CPUs of the slave modules respectively to form a single system. When the master module detects that a monitoring device coupled to a single user I/O interface installed in the apparatus is performing network monitoring and management with respect to a certain module, the CPU of the master module may transfer an access right of the user I/O interface to the certain module by closing or opening switches installed in the master modules enabling the certain module to receive the access signal from the user I/O interface by closing a switch thereof.

Abstract: A FIFO for buffering a cell between an incoming stream (Din) and an outgoing stream (Dout), comprising a memory, a write pointer indicating a first memory location for storing the cell, and a read pointer indicating a second memory location for releasing a stored cell, a controller, and additional memory for storing an additional cell; the controller arranged for: monitoring the additional cell's arrival in the additional memory; storing a pointer value (LOG_PTR) upon the additional cell's arrival, using a momentary write pointer value; monitoring a momentary read pointer value; upon equivalence of the read pointer and LOC_PTR; inserting the stored additional cell into the outgoing stream (Dout); inserting content from the second memory location into the outgoing stream (Dout).

Abstract: N_Port_Name information capable of distinctly identifying a host computer has seen set in a microprocessor 42 of a storage controller 40 prior to start-up of host computers 10, 20, 30; upon startup of the host computers 10, 20, 30, when the storage controller 40 receives a frame issued, then the microprocessor 42 operates to perform comparison for determining whether the N_Port_Name information stored in the frame has been already set in the microprocessor 42 and registered to the N_Port_Name list within a control table maintained. When such comparison results in match, then continue execution of processing based on the frame instruction; if comparison results in failure of match, then reject any request.

Abstract: A technique is provided for assigning an I/O controller to a host in a cluster. The cluster includes one or more hosts and one or more I/O controllers connected by a cluster interconnection fabric. In an example embodiment, an I/O controller is connected to the cluster interconnection fabric. The I/O controller connected to the fabric is detected and a network address is assigned to the I/O controller. An administrative agent is used to assign the I/O controller to a host that is connected to the cluster interconnection fabric. A message is sent to the host informing the host that the I/O controller is assigned to the host and providing the network address of the I/O controller.

Abstract: A system that supports a high performance, scalable, and efficient I/O port protocol to connect to I/O devices is disclosed. A distributed multiprocessing computer system contains a number of processors each coupled to an I/O bridge ASIC implementing the I/O port protocol. One or more I/O devices are coupled to the I/O bridge ASIC, each I/O device capable of accessing machine resources in the computer system by transmitting and receiving message packets. Machine resources in the computer system include data blocks, registers and interrupt queues. Each processor in the computer system is coupled to a memory module capable of storing data blocks shared between the processors. Coherence of the shared data blocks in this shared memory system is maintained using a directory based coherence protocol. Coherence of data blocks transferred during I/O device read and write accesses is maintained using the same coherence protocol as for the memory system.

Abstract: In a computer (e.g. an 80×86-compatible personal computer) in which peripheral devices (e.g. hard drives, floppy drives, CD-ROMs, etc.) are accessed through more than one chain of handlers for the peripheral devices (e.g. via interrupts 13h and 40h), an improved device handler for a peripheral device (e.g. a device that complies with the “El Torito” standard) is inserted in both chains (e.g. by “hooking” both interrupts 13h and 40h), so the device handler cannot be bypassed when an access request directed to the device handler is passed through either chain and so the device handler can direct the access request to the next device handler in the correct chain, when appropriate.

Abstract: A memory array apparatus with shorter data accessing time is proposed. The memory array apparatus comprises a register administrator and a plurality of data registers between a micro controller and at least one memory array. The data to be accessed are divided into a plurality of data blocks according to a predetermined data unit. The data block is firstly stored in corresponding data register and then read by the main frame or stored into the corresponding memory array. At the same time, the next data block is stored in the corresponding data register through circuit switched by the micro controller. The pending time of the main frame and the data accessing time can be advantageously reduced.

Abstract: In a multi-processor computer system, a message receive unit using a shared buffer pool and a set of per-node credit registers in each processor node. The buffer stores incoming messages received from the sending nodes. The credit registers prevent a sending node from using more than its allocated share of the buffer pool and thus prevent the buffer pool from overflowing. Because the buffer pool of the receiving node does not overflow, the receiving node can continue to communicate with other nodes.

Abstract: Determining device characteristics includes obtaining a first globally accessible value, if the first globally accessible value corresponds to a stored first value, obtaining device characteristics data from a relatively fast memory, if the first globally accessible value does not correspond to the stored first value, obtaining a second globally accessible value, if the second globally accessible value corresponds to a stored second value, obtaining device characteristics data from a relatively fast memory, if the second globally accessible value does not correspond to the stored second value, obtaining device characteristics data from a relatively slow memory and updating the relatively fast memory, the stored first value, and the stored second value. The globally accessible first value may include device I/O information. The globally accessible values may be stored in global memory that is accessible to a plurality of processors.

Abstract: An apparatus for providing I/O support to a computer system and a method of use thereof is disclosed. The apparatus in accordance with the present invention includes an internal control element located within the apparatus. The control element allows the apparatus in accordance with the present invention to relinquish ownership of the associated I/O devices for the purpose of being used by another computer. Accordingly, through the use of the apparatus in accordance with the present invention, expensive KVM switches and cabling, along with the accompanying I/O devices, are no longer needed to provide I/O support for computer networks. A first aspect of the present invention provides an apparatus for providing I/O support to a computer system. The apparatus comprises an I/O device and an internal control element coupled to the I/O device for relinquishing ownership of the I/O device from the apparatus to the computer network.

Abstract: A method, apparatus, and computer program product are described for controlling data transfer. A next data packet to be transferred is retrieved. A determination is made regarding whether a data bus busy signal is asserted. If the data bus busy signal is asserted, a determination is made regarding whether a data bus grant signal is asserted. If the data bus grant signal is asserted, the next data packet is transferred on the next cycle after a last cycle of data transfer of a previous data packet.

Abstract: A method for allowing appliance-to-appliance communication transactions wherein an appliance communications manager that stands apart from source and destination appliances receives a connection request from a source appliance. A phonebook having a plurality of phonebook entries, and stored in the appliance communications manager, is then accessed. Each of the phonebook entries includes a destination appliance identifier and associated destination appliance communication information. A user of the source appliance is presented with a list having a plurality of the phonebook entries. The appliance communications manager receives the identity of a destination appliance selected from said list and, via the appliance communications manager, a communication link is established with the selected destination appliance. When a communication message is received from the source appliance, the communication message is sent to the selected destination appliance.

Abstract: A system, computer program product and method for servicing requests. A server may be configured to receive a stream of requests to access particular logical block addresses in one or more logical drives in a RAID from one or more clients. The server may be coupled to one or more RAID adapters that are coupled to the RAID. The server may comprise a software RAID and each RAID adapter may comprise a hardware RAID. By monitoring the utilization of the processors in the server and in each RAID adapter, all or part of these received requests may subsequently be routed to either the software RAID or the hardware RAID based on which implementation is more desirable to service these requests.

Abstract: Methods and systems for interfacing one or more Input/Output (I/O) controllers to a channel-based switched fabric. One or more channel adapters allow connection of the one or more I/O controllers to the channel-based switched fabric. The channel adapters support transferring of messages or data between the one or more I/O controllers and one or more initiating units connected to the channel-based switched fabric. An adaptable physical interface exists between the one or more I/O controllers and the adapters. A set of command primitives are used for communicating information between the one or more I/O controllers and the adapters via the physical interface.