Abstract: A standalone Storage Controller with PCIe Multi-Mode capability that can be configured as PCIe Root-Complex (RC), an End-Point (EP) or a bridge (BR). In EP mode, the Storage Controller acts like a regular PCIe slaved controller which is connected to a PCIe Root-Complex provided by a Host via a PCIe port. While in RC mode, the Storage Controller acts as a PCIe configuration and management entity, a Host acting as a PCIe Root-Complex, which an add-in card or chip can attach to via a PCIe port that is provided by the Storage Controller, supporting any type of Network Device Interface, without an external Root-Complex. While in bridge mode, the Storage Controller can act as a transparent or non-transparent bridge with either a Root-Complex or End-Point port for the internal connection to the bridge.

Abstract: A network device may receive packets and may calculate, during a time interval, an arrival rate and a departure rate, of the packets, at one of multiple virtual output queues. The network device may calculate a current oversubscription factor based on the arrival rate and the departure rate, and may calculate a target oversubscription factor based on an average of previous oversubscription factors associated with the multiple virtual output queues. The network device may determine whether a difference exists between the target oversubscription factor and the current oversubscription factor and may calculate, when the difference exists, a scale factor based on the current oversubscription factor and the target oversubscription factor. The network device may calculate new scheduling weights based on prior scheduling weights and the scale factor, and may process packets received by the multiple virtual output queues based on the new scheduling weights.

Abstract: Examples of lighting equipment provide services to and on behalf of a biomechatronically enhanced organism and/or a biomechatronic component of the organism. Such services include charging, communications, location-related services, control, optimization, client-server functions and distributed processing functionality. The biomechatronically enhanced organism and/or biomechatronic component utilize such services provided by and/or via the lighting equipment to enable, enhance or otherwise influence operation of the organism.

Abstract: A compute-in-memory bitcell is provided that includes a pair of cross-coupled inverters for storing a stored bit. The compute-in-memory bitcell includes a logic gate formed by a pair of switches for multiplying the stored bit with an input vector bit. A controller controls the pair of switches responsive to a sign bit during a computation phase of operation and controls the pair of switches responsive to a magnitude bit during an execution phase of operation.

Abstract: An object of the present disclosure is to suppress an increase in the time required for setting a peripheral device including driver installation. An embodiment of the present invention is a method including: a step for causing a display unit to display information of each of detected peripheral devices as a search result from a searching step; a step for causing a storage unit to store information of a peripheral device selected by a user from among the detected peripheral devices; an installation step for installing a driver that is compatible with the selected peripheral device; and a determination step for determining a port that is capable of communicating with the selected peripheral device, based on the information stored in the storage unit, wherein an installation process by the installation step and a communication-capable port determination process by the determination step are executed concurrently.

Abstract: A set command is issued to transfer a diagnostic parameter record to a communication component of the computing environment. The diagnostic parameter record specifies a diagnostic action to be taken by the communication component to obtain diagnostic information and specifies a version of the diagnostic information to be obtained. Based, in part, on issuing the set command, the diagnostic information is obtained. The version of the diagnostic information obtained is the version specified, based on the version specified being supported by the communication component.

Abstract: Techniques in electronic systems, such as in systems including a processing chip and one or more external memory chips, provide improvements in one or more of system security (such as intrusion and/or virus/malware prevention), performance, cost, and efficiency. For example, the processing chip includes at least one CPU and circuitry enabling the at least one CPU to securely boot from an external, non-volatile memory chip containing encrypted, executable code, and does not expose un-encrypted data, including the executable code, on an external memory interface, including a DRAM interface. Further, only the specific processing chip that was used to initially write the encrypted executable code to the external non-volatile memory chip is able to decrypt the encrypted executable code. The decryption uses a key unique to the processing chip and created at manufacturing time that is never CPU-accessible, forming a secure hardware association between the two chips.

Abstract: A method, computer program product, and computer system for extending, by a computing device, transaction log page-buffers for Non-Volatile Random Access Memory (NVRAM) onto a solid state drive (SSD). It may be determined whether a bandwidth limit of the NVRAM has reached a threshold bandwidth. An IO may be processed on one of the NVRAM and the SSD based upon, at least in part, whether the bandwidth limit of the NVRAM has reached the threshold bandwidth.

Abstract: A shared memory controller receives, from a computing node, a request associated with a memory transaction involving a particular line in a memory pool. The request includes a node address according to an address map of the computing node. An address translation structure is used to translate the first address into a corresponding second address according to a global address map for the memory pool, and the shared memory controller determines that a particular one of a plurality of shared memory controllers is associated with the second address in the global address map and causes the particular shared memory controller to handle the request.

Abstract: Some embodiments provide a method for a global manager that manages a logical network configuration for multiple datacenters that each have a local manager for managing the logical network configuration within the datacenter. Based on detecting that a connection to a particular local manager of a particular datacenter has been restored after a period of unavailability, the method identifies a portion of the logical network configuration that is relevant to the particular datacenter. In a series of transactions, the method transfers the identified portion of the logical network configuration to the particular local manager. During the series of transactions, the method identifies modifications to the identified portion of the logical network configuration to be included in the series of transactions. Upon completion of the series of transactions, the method transfers a notification to the particular local manager indicating completion of the series of transactions.

Abstract: Embodiments of the present disclosure relate to load balancing application processing between storage platforms. Input/output (I/O) workloads can be anticipated during one or more time-windows. Each I/O workload can comprise one or more I/O operations corresponding to one or more applications. Processing I/O operations of each application can be dynamically migrated to one or more storage platforms of a plurality of storage platforms based on the anticipated workload.

Abstract: Systems, apparatuses, and methods for identifying response data arriving out-of-order from two different memory types are disclosed. A computing system includes one or more clients for processing applications. A memory channel transfers memory traffic between a memory controller and a memory bus connected to each of a first memory and a second memory different from the first memory. The memory controller determines a given point in time when read data is to be scheduled to arrive on the memory bus from memory. The memory controller associates a unique identifier with the given point in time. The memory controller identifies a given command associated with the arriving read data based on the given point in time.

Abstract: A method and a system for transparently overlaying a logical transport network over an existing physical transport network is disclosed. The system designates a virtual channel located in a first transaction layer of a network conforming to a first network protocol. The system assembles a transaction layer packet in a second logical transaction layer of a second network protocol that is also recognizable by the first transaction layer. The system transfers the transaction layer packet from the second transaction layer to the virtual channel. The system transmits the transaction layer packet over the first transaction layer using the designated virtual channel over the network.

Abstract: A method and system for protecting an aircraft against an incoherent command instruction. The system has a generation unit generating a command instruction transmitted to an evaluation unit that evaluates whether or not the command instruction is incoherent and generates and transmits a validation order if the command instruction is coherent or an arbitration request if not, the arbitration request being transmitted by an arbitration unit, where applicable, to an operator who sends a confirmation response or a cancellation response. The arbitration unit generates and transmits a validation order to an execution unit in the event of receiving a confirmation response and a cancellation order in the event of receiving a cancellation response, the system allowing the execution unit to execute only the command instructions evaluated and confirmed as not being incoherent.

Abstract: A compute-in-memory bitcell is provided that includes a pair of cross-coupled inverters for storing a stored bit. The compute-in-memory bitcell includes a logic gate formed by a pair of switches for multiplying the stored bit with an input vector bit. A controller controls the pair of switches responsive to a sign bit during a computation phase of operation and controls the pair of switches responsive to a magnitude bit during an execution phase of operation.

Abstract: According to one embodiment, a memory system manages a plurality of first weights that correspond to the plurality of queues, and a plurality of second weights that correspond to the plurality of queues. The memory system selects a queue of a largest or smallest second weight, of the plurality of queues, as a queue of a highest priority, and starts execution of a command stored in the selected queue. The memory system updates the second weight corresponding to the selected queue by subtracting the first weight corresponding to the selected queue from the second weight corresponding to the selected queue or by adding the first weight corresponding to the selected queue to the second weight corresponding to the selected queue.

Abstract: Techniques are disclosed for using a forwarding microchip to implement a network functions virtualization (NFV) backplane within a network device. In one example, processing circuitry of a forwarding microchip establishes a respective logical connection between each of a plurality of virtual ports of the forwarding microchip and each of a plurality of virtual ports configured for respective software-implemented virtual network functions (VNFs) executing on the network device. The processing circuitry receives packets via one or more physical ports of the forwarding microchip and forwards, using the logical connections between each of the plurality of virtual ports of the forwarding microchip and each of the plurality of virtual ports configured for the respective software-implemented VNFs, the packets to a Network Interface Controller (NIC) for forwarding to the plurality of virtual ports configured for the respective software-implemented VNFs.

Abstract: Systems and methods for offloading data processing tasks using in-storage code execution are disclosed. For example, a data storage system including one or more processors, a non-transitory storage medium, and a storage logic executable by the one or more processors to perform operations including: receiving portable code configured to perform a data processing offload task, the portable code comprising one or more translatable, hardware-agnostic instructions for processing data stored on the storage medium; translating and executing the one or more translatable, hardware-agnostic instructions of the portable code to perform the data processing offload task using a translation and execution engine disposed in the storage logic; determining that use of the portable code has concluded; and responsive to determining that use of the portable code has concluded, releasing the portable code.

Abstract: A storage system with a controller having a persistent memory interface to local memory is provided. The persistent memory can be used to store a logical-to-physical address table. A logical-to-physical address table manager, local to the controller or remote in a secondary controller, can be used to access the logical-to-physical address table. The manager can be configured to improve bandwidth and performance in the storage system.

Abstract: An information processing apparatus includes: a CPU board configured to communicate with an external apparatus via a network and including a CPU; and a printer being an internal equipment configured to communicate with the CPU board by a communication method different from a communication method used between the CPU board and the network and having a USB device descriptor, wherein the CPU obtains the USB device descriptor from the printer and generates identification information corresponding to the printer based on the obtained USB device descriptor, and when the CPU receives an inquiry request to the printer from the external apparatus, the CPU transmits first response information indicating the generated identification information to the external apparatus.

Abstract: Technologies for pacing network packet transmissions include a computing device. The computing device includes a compute engine and a network interface controller (NIC). The NIC is to select a first transmit descriptor from a window of transmit descriptors. The first transmit descriptor is associated with a packet stream. The NIC is also to identify a node of a plurality of nodes of a hierarchical scheduler. The node is associated with the selected first transmit descriptor. The NIC is also to determine whether the identified node has a target amount of transmission credits available and transmit, in response to a determination that the identified node has a target amount of transmission credits available, the network packet associated with the first transmit descriptor to a target computing device.

Abstract: A control device of a machine or system data compares access data with a current access authorization. If there is a match, access to user data stored in the control device is permitted. The control device occasionally accepts encrypted verification data from an external computer via a network and stores them encrypted or unencrypted as current verification data, with the current access authorization being derived from the unencrypted current verification data. Verification data already stored in the control device as current verification data when the verification data are accepted are retained as old verification data, while older verification data are overwritten. The accepted access data are compared with an old access authorization derived from the old verification data. An operator can access the user data only if there is a match with the old access authorization.

Abstract: An information processing apparatus includes a setting reception section and a posture acquisition section. The information processing apparatus outputs a scan setting to an image reading apparatus including a main body having a plurality of postures. The main body reads a document according to the scan setting. The setting reception section is configured to display a setting item included in the scan setting on a display portion and receive a change in a setting content shown in the setting item. The posture acquisition section acquires posture information indicating the posture of the main body from the image reading apparatus. The setting reception section switches the setting item displayed on the display portion to the setting content according to the posture when the posture indicated by the posture information is switched.

Abstract: Various embodiments are generally directed to an apparatus, method and other techniques to send a power operation initiation indication to the accelerator device via the subset of the plurality of interconnects, the power operation initiation indication to indicate a power operation to be performed on one or more infrastructure devices, receive a response the accelerator device, the response to indicate to the processor that the accelerator is ready for the power operation, and ucause the power operation to be performed on the accelerator device, the power operation to enable or disable power for the one or more of the infrastructure devices.

Abstract: Due to design variations, process variations, manufacturing variations, and other factors, memory of a certain type manufactured by one manufacturer often exhibits a unique pattern of performance characteristics relative to the patterns of the same type of performance characteristics exhibited by memory from other manufacturers. A system for identifying counterfeit memory is trained to learn the different patterns of performance characteristics for different manufacturers of memory. Thereafter, the system may analyze the performance of a given memory device to determine whether the memory device has been manufactured by a particular manufacturer. Thus, the system is capable of determining whether the memory device is counterfeit (e.g., has been manufactured by an unexpected manufacturer).

Abstract: A memory system includes a non-volatile memory chip that includes a memory cell array, and a memory controller. The memory controller is configured to perform a read operation on the non-volatile memory chip by instructing the non-volatile memory chip to perform a sensing operation to read data stored in the memory cell array, estimating a time when the read data becomes ready to be transferred from the non-volatile memory chip to the memory controller, and instructing the non-volatile memory chip, after the estimated time, to perform a transfer operation to transfer the read data to the memory controller.

Abstract: A distributed search system can be partitioned into buckets based on entities and time periods. Addresses for the partitions can be formed from entity parameters and time period parameters. An indexing scheme for the partitions can be maintained at one or more search clusters, which may be geographically separate from one another. Consistency can be maintained across the search clusters though routing queries between clusters based at least in part on the status of partitions.

Abstract: A data intake and query system provides interfaces that enable users to configure source type definitions used by the system. A data intake and query system generally refers to a system for collecting and analyzing data including machine-generated data. Such a system may be configured to consume many different types of machine data generated by any number of different data sources including various servers, network devices, applications, etc. At a high level, a source type definition comprises one or more properties that define how various components of a data intake and query system collect, index, store, search and otherwise interact with particular types of data consumed by the system. The interfaces provided by the system generally comprise one or more interface components for configuring various attributes of a source type definition.

Abstract: The present disclosure pertains to a paraphrase generation system. The system comprises one or more hardware processors and/or other components. The system is configured to obtain a training corpus. The training corpus comprises language and known paraphrases of the language. The system is configured to generate, based on the training corpus, a word-level attention-based model and a character-level attention-based model. The system is configured to provide one or more candidate paraphrases of a natural language input based on both the word-level and character-level attention-based models. The word-level attention-based model is a word-level bidirectional long short term memory (LSTM) network and the character-level attention-based model is a character-level bidirectional LSTM network. The word-level and character level LSTM networks are generated based on words and characters in the training corpus.

Abstract: A method of managing errors in a plurality of storage drives includes receiving, at a memory controller coupled to at least one storage medium in an SSD, a read command from a host interface. The method also includes retrieving, from the storage medium, read data corresponding to a plurality of data chunks to be retrieved in response to the read command, and determining that at least one data chunk of the plurality of data chunks is unable to be read, the at least one data chunk corresponding to a failed data chunk. And in response to determining the failed data chunk, sending to the host interface the read data including the failed data chunk or excluding the failed data chunk. And in response to the read command sending to the host interface status information about all data chunks.

Abstract: A block-based storage system hosts logical volumes that are implemented via multiple replicas of volume data stored on multiple resource hosts in different failure domains. Also, the block-based storage service allows multiple client computing devices to attach to a same given logical volume at the same time. In order to prevent unnecessary failovers, a primary node storing a primary replica is configured with a health check application programmatic interface (API) and a secondary node storing a secondary replica determines whether or not to initiate a failover based on the health of the primary replica.

Abstract: Embodiments of the present invention are directed to a computer-implemented method for simulating a plurality of electronic control units (“ECU”s) in communication over a simulated bus. The method includes simulating an operation of a first ECU and an operation of a second ECU and performing arbitration at a packet-level granularity at a packet transmission start point with respect to a first packet sent to the simulated bus by the first ECU and a second packet sent to the simulated bus by the second ECU. The method identifies an initially winning ECU in the arbitration and a zone from the packet transmission start point to a bit where the initially winning ECU is determined to win based on the arbitration and continues the simulation of the operation of the first ECU and the operation of the second ECU to the end of the zone.

Abstract: A peripheral disconnection switch system and method are provided. The system comprises at least one peripheral connected to a processor, and a hardware switch connected to the at least one peripheral. The system is operable such that engaging the hardware switch disables the at least one peripheral.

Abstract: A data processing apparatus is provided. The data processing apparatus includes hardware locating circuitry for locating hardware associated with processing circuitry, and for causing hardware configuration data relating to the hardware to be generated. Providing circuitry causes the hardware configuration data to be provided to an operating system executing on the processing circuitry to enable the operating system to utilise the hardware.

Abstract: Techniques for communicating packets in a computer network are provided. At a network device, a first stream of packets is obtained from a packet processing node. A second stream of packets is obtained from a packet generating node. A counter is maintained that counts a number of the packets received from the second stream. An internal clock signal of the network device is obtained. A control signal is generated for pacing the first stream of packets based on the counter and the internal clock signal. The first stream of packets is provided to a packet consuming node based on the control signal.

Abstract: Systems and methods for configuration of computer peripherals are described. In one embodiment, the systems and methods may include detecting the storage device being connected to a host machine; determining whether the host machine supports human interface device (HID) service; and upon determining the host machine supports the HID service, bypassing installation of a driver and using a HID protocol to establish an interface between the storage device and the host machine.

Abstract: A system to is described. The system includes at least one physical memory device to store print workflow manager and one or more processors coupled with the at least one physical memory devices to execute the print workflow manager receive a plurality of print jobs, each including a plurality of documents to be printed, receive job tickets including a description as to how pages in the plurality of documents are to be printed, store the plurality of documents in a document pool, store a document property record associated with each of the plurality of documents in the document pool, wherein a document property record provides and process the job tickets and the document property records to generate a combined print job including two or more of the plurality of the documents.

Abstract: A control device includes a cyclic communication part, a message communication part, and a communication management part. The cyclic communication part performs communication according to a preset cyclic period. The message communication part performs communication that need not conform to the cyclic period. The communication management part manages a communication schedule for the cyclic communication part and the message communication part. When it is detected that control data scheduled to be communicated is data for preferentially selecting communication in the cyclic communication part, the communication management part detects a communication state of the cyclic communication part. When cyclic communication is possible, the communication management part stores the control data in the cyclic communication part, and when cyclic communication is not possible, the communication management part stores the control data in the message communication part.

Abstract: Technologies for secure enumeration of USB devices include a computing device having a USB controller and a trusted execution environment (TEE). The TEE may be a secure enclave protected secure enclave support of the processor. In response to a USB device connecting to the USB controller, the TEE sends a secure command to the USB controller to protect a device descriptor for the USB device. The secure command may be sent over a secure channel to a static USB device. A driver sends a get device descriptor request to the USB device, and the USB device responds with the device descriptor. The USB controller redirects the device descriptor to a secure memory buffer, which may be located in a trusted I/O processor reserved memory region. The TEE retrieves and validates the device descriptor. If validated, the TEE may enable the USB device for use. Other embodiments are described and claimed.

Abstract: According to one embodiment, an electronic device includes: a first interface and a second interface, each interface being connected with outside of the electronic device to supply power to a connection destination or receive power from a connection destination; a storage configured to store therein first identification information; a transmitter configured to transmit first information containing the first identification information to a first device when the first interface serves as a source to supply power, the first device being the connection destination of the first interface; a receiver configured to receive second information containing second identification information of a second device from the second device when the second interface serves as a sink to receive power, the second device being the connection destination of the second interface; and a controller configured to stop reception of power via the second interface when the second information contains the first identification information.

Abstract: A data method and a related device to resolve a disadvantage encountered when a first device accesses data of a second device. The method is applied to the first device, and the first device is coupled to the second device using a Universal Serial Bus (USB) interface. The method includes displaying, by the first device, an interface to which the second device is mapped, accessing data of the second device using the interface, receiving, by the first device, an instruction entered for the interface, displaying the data of the second device, receiving, by the first device, an operation instruction entered for the data, and processing, by the first device, the data according to the operation instruction.

Abstract: A given host machine in a virtualization system having a virtual distributed storage system may receive an iSCSI protocol packet from a computer system separate from the given host machine. Processing the iSCSI protocol may include accessing distributed storage device (iSCSI target) comprising storage connected to the two or more host machines in the virtualization system. The given host machine may generate an outbound iSCSI protocol packet comprising return data received from the target and send the outbound iSCSI protocol packet to the computer system.

Abstract: A storage control program for causing a computer to perform a process comprising; determining a second number indicating a number of first storage devices in each of which a connection with a controller is established among the two or more first storage devices; and performing control such that a second storage devices, in each of which a connection with the controller is not established among the two or more first storage devices, are caused to transition to a power saving state in a time period in which the second number reaches a first number indicating a number of communication routes used when the controller accesses the two or more first storage devices.

Abstract: A data processing method comprises receiving a request to perform a prior period adjustment (PPA) for a tenant in which data values applicable to a time period earlier than a current time period will be modified, in response to the request, identifying a working subset of data from tenant data in the production database and copying the working subset to a calculation database separate from the production database, performing the PPA, using the working subset in the calculation database, to result in creating and storing a plurality of result data, receiving, while performing the PPA, an additional request using the tenant data in the production database, performing the additional request using the tenant data in the production database while performing the PPA and updating the replay log, after completing the PPA and using the replay log, transferring the plurality of results to the production database.

Abstract: A storage system with a controller having a persistent memory interface to local memory is provided. The persistent memory can be used to store a logical-to-physical address table. A logical-to-physical address table manager, local to the controller or remote in a secondary controller, can be used to access the logical-to-physical address table. The manager can be configured to improve bandwidth and performance in the storage system.

Abstract: Techniques for generating and transferring bulk messages from one computing device to another computing device in a cluster are provided. Each computing device in a cluster is assigned a different set of nodes of a graph. A first computing device may be assigned a particular node that is neighbors with multiple other nodes that are assigned to one or more other computing devices in the cluster. When processing graph-related code at the first computing device, information about the neighbors may be required. The first computing device receives a bulk message from one of the other computing devices. The bulk message contains information about at least a subset of the neighbors. Therefore, the first computing device is not required to send multiple messages for information about the subset of neighbors. In fact, the first computing device is not required to send any message for the information.

Abstract: Embodiments for a memory access broker system with application-controlled early write acknowledgment support. A memory access broker may be selectively enabled to facilitate early write acknowledgement (EWACK) operations and notification of failed EWACK write requests to one or more issuing applications such that the failed EWACK write requests are logged by the memory access broker for inspection by the one or more issuing applications.

Abstract: Embodiments of the present application relate to the field of communications technologies, and provide a wireless communication method, a device, and a system, so as to cancel or reduce inter-cell interference, to a terminal, between neighboring cells. The method includes: sending, by a terminal, uplink information to a first network side device in a first time period; and receiving, by the terminal in a second time period, downlink information sent by a second network side device, where the first time period and the second time period are a same time period. The embodiments of the present application are used for wireless communication.

Abstract: Wear-related information is obtained from one or more storage devices in a storage array system being monitored. One or more graphics representing at least a portion of the wear-related information are generated. The one or more graphics are overlaid onto a real-world view of the one or more storage devices of the storage array system being monitored to generate an augmented reality view illustrating the wear-related information for the one or more storage devices of the storage array system being monitored. The augmented reality view may be presented on a user device. In one example, the wear-related information comprises estimated EOL computations for each of the one or more storage devices.

Abstract: A control system for a crane comprises a mobile terminal, with pre-installed application software for entering a control command for a crane and with a transmitting module for transmitting the control command, a control unit with a receiving module which is suitable for receiving the control command and is capable of being brought into signal linkage with the mobile terminal, the signal linkage being wireless, and at least one crane module in signal linkage with the control unit, for executing the control command.