Path Selection Patents (Class 710/38)
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Publication number: 20130111082Abstract: In order to provide an inexpensive way to share an I/O device loaded in an I/O drawer among a plurality of blades, in a server system including a plurality of servers, a PCI device, and a manager for initializing a PCI switch, the PCI device has a plurality of virtual functions (VFs). The PCI switch, which has VF allocation information which indicates association between the servers and the VFs, is configured to: receive a transaction from one of the servers or from the PCI device; when the received transaction is a transaction sent from the one of the servers, remove a server identifier with which a sender server is identified and transfer the received transaction to the PCI device; and when the received transaction is a transaction sent from the PCI device, attach a server identifier that is determined based on the VF allocation information.Type: ApplicationFiled: November 19, 2012Publication date: May 2, 2013Inventors: Takashige BABA, Toshiomi MORIKI, Keitaro UEHARA
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Publication number: 20130111081Abstract: A semiconductor memory device includes a selection signal generation unit configured to generate a plurality of selection signals that are sequentially activated, a path selection unit configured to select a transmission path of sequentially input information data in response to the plurality of selection signals, a plurality of first storage units, each configured to have a first storage completion time and store an output signal of the path selection unit, and a plurality of second storage units, each configured to have a second storage completion time, which is longer than the first storage completion time, and store a respective output signal of the plurality of first storage units.Type: ApplicationFiled: October 25, 2012Publication date: May 2, 2013Applicant: SK hynix Inc.Inventor: SK hynix Inc.
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Patent number: 8427941Abstract: Disclosed is a redundant storage virtualization subsystem (SVS) having branching functionality. The SVS comprises a first and a second storage virtualization controller (SVC) and a physical storage device (PSD) array. A first and a second data path are provided between the first SVC and the PSD array passing through a first and a second signal integrity enhancing device (SIED), respectively, and configured as a first pair of redundant data paths. A third and a fourth data path are provided between the second SVC and the PSD array passing through the second and the first SIED, respectively, and configured as a second pair of redundant data paths. In view of the PSD array, the first and fourth data paths form a third redundant data path pair for a PSD, and the third and second data paths form a fourth redundant data path pair for a PSD.Type: GrantFiled: September 22, 2006Date of Patent: April 23, 2013Assignee: Infortrend Technology, Inc.Inventors: Cheng-Yu Lee, Ling-Yi Liu
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Publication number: 20130097343Abstract: A request routing circuit includes m inputs for receiving m input request signals and n outputs for outputting a set of n output request signals. A routing subsystem within the request routing circuit is provided between the m inputs and the n outputs and comprises k inputs and n outputs, where m is greater than k, and where the routing subsystem is configured to operate over a plurality (m/k, rounded up to the next integer) of cycles to provide the set of n output request signals based on the m inputs to the n outputs.Type: ApplicationFiled: September 10, 2012Publication date: April 18, 2013Applicant: STMicroelectronics (Research & Development) LimitedInventors: Davide Sarta, David Smith
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Patent number: 8423906Abstract: A method, an application component manager, and a set of instructions are disclosed. A user interface 150 may register a first user component selection and a first user channel selection. A processor 110 may assign a first transmitting application component 220 to transparently broadcast a first transmission on a first bus channel 210 based on the first user component selection and the first user channel selection.Type: GrantFiled: August 25, 2010Date of Patent: April 16, 2013Assignee: Lockheed Martin CorporationInventors: Phillip Klinefelter, Jason Lee
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Patent number: 8417850Abstract: An information processing device is provided with plural HDMI connectors through which an audio signal is supplied to the other information processing device. The device allows selection of an audio signal supply destination. The audio signal supply is requested, and the audio signal is supplied to the specified information processing device in the requested arriving order. The information processing device of a specific type is determined as a priority device which is preferentially selected to receive the audio signal. If the information processing device of specific type is determined as the priority device, and supply of the audio signal therefrom is requested, the audio signal is supplied to the priority device by terminating the audio signal supply to the other information processing device. The audio signal may be supplied to plural supply destinations.Type: GrantFiled: October 27, 2010Date of Patent: April 9, 2013Assignee: Hitachi Consumer Electronics Co., Ltd.Inventors: Tatsuya Okamura, Kazuma Ueno, Toyoshige Ohshika, Yohei Kato, Nobuaki Kabuto
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Patent number: 8417849Abstract: A method to adjust a multi-path device reservation by supplying a computing device and a storage controller interconnected with a communication link. The method further reserves a data storage device in communication with the storage controller, where that data storage device reservation is held by a first communication path group comprising a first plurality of communication paths configured in the communication link. If the method detects a failed communication path configured in the first communication path group, the method configures a second communication path group by removing the failed communication path from the first communication path group, wherein the second communication path group maintains the data storage device reservation.Type: GrantFiled: October 7, 2009Date of Patent: April 9, 2013Assignee: International Business Machines CorporationInventors: Clint Alan Hardy, Matthew Joseph Kalos, Richard Anthony Ripberger
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Patent number: 8417858Abstract: Embodiments of the present invention provide for an IOC that does not limit each CPU to a particular port. Instead, the IOC may allow each CPU to communicate with all ports. Thus, the IOC can process CPU communications to determine which port to send them to, and send them to the correct port as well as process incoming communications from the ports to determine which CPU to send them to and send these communications to the correct CPU. This may significantly increase the flexibility and efficiency of a storage network.Type: GrantFiled: May 7, 2008Date of Patent: April 9, 2013Assignee: Emulex Design & Manufacturing CorporationInventors: Joseph Harold Steinmetz, Murthy Kompella, Narayan Rao Ayalasomayajula, Larry Lomelino
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Patent number: 8412900Abstract: To inhibit the occurrence of communication failures in the system in which a secondary storage control apparatus acquires journal data from a primary storage control apparatus and writes the data to a secondary volume. The primary storage control apparatus comprises a command processing unit, a journal data creation unit, a journal data transfer unit which reads journal data to the secondary storage control apparatus, and a transfer control unit. In specified occasions, the transfer control unit controls at least either one of the journal data transfer amount by the journal data transfer unit and the width of the communication band utilized for journal data transfer.Type: GrantFiled: September 27, 2011Date of Patent: April 2, 2013Assignee: Hitachi, Ltd.Inventors: Kazuhide Sano, Katsuhiro Okumoto
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Patent number: 8407390Abstract: According to the present invention, a method and apparatus for data processing is provided for a data processing device comprising an auxiliary execution system, a main execution system, a switch unit and a networking unit. The method and apparatus according to the present invention are capable of establishing a networking data channel between the auxiliary execution system, the switch unit and the networking unit based on a first control instruction for the switch unit; or of establishing a networking data channel between the main execution system, the switch unit and the networking unit based on a second control instruction for the switch unit. In this way, the realization of always online can be guaranteed, and apparently, the user satisfaction can be effectively improved.Type: GrantFiled: December 23, 2008Date of Patent: March 26, 2013Assignees: Lenovo (Beijing) Limited, Beijing Lenovo Software Ltd.Inventor: Xingwen Chen
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Patent number: 8402183Abstract: A system and method for coordinating control setting with respect to an automated input/output (I/O) processor. A state machine having a transition algorithm can be configured in association with a storage controller in order to permit multiple entities to safely transmit an I/O request to an I/O device. Specific combinations of control bits associated with a fast path engine can be determined by identifying different modes with respect to the behavior of the fast path engine. Each mode can be assigned as a state with respect to the state machine. An I/O path exception and error condition that can cause transitions between the states can be determined and the transitions can be assigned from one state to another state. A generic logic template can then be configured to govern the transitions with respect to the state machine. The logic can be executed when an event occurs in order to trigger multiple state transition and/or modifications with respect to the hardware control bits of the fast path engine.Type: GrantFiled: October 6, 2010Date of Patent: March 19, 2013Assignee: LSI CorporationInventors: Nick Pelis, Larry Rawe
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Patent number: 8402181Abstract: An arbiter for a space switch comprising a two buffers, a media access controller having data outputs coupled to the two buffers, and two control outputs coupled to respective buffers for buffering input data at a clock rate one-half that of the input data and a switch fabric connected to the two buffers for matching buffer data throughput with switch data throughput, the arbiter comprising first and second schedulers, each scheduler includes a plurality of inputs for connection to the two buffers for receiving requests, a plurality of outputs for granting requests and a plurality of inter connections to each of the plurality of schedulers for informing them of grants and logic for logically grouping input ports associated with a bifurcate input port, logically grouping output ports associated with a bifurcate output port, establishing round robin pointers for each of two alternate clock ticks for tracking next allowable requests and on one clock tick allowing connection requests from input ports to output poType: GrantFiled: March 12, 2008Date of Patent: March 19, 2013Assignee: Integrated Device Technology, Inc.Inventor: David Brown
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Patent number: 8402135Abstract: [Problem] To enhance the ease of use of a network by a DLNA-compliant device. [Solving Means] A television receiver 250 discovers another DLNA-compliant device connected to a network (S3). Then the television receiver 250 determines an IP address of eHDMI connection (S4) and, in the case of a device directly connected by HDMI, connection setting of a DLNA with that device is automatically executed (S5 through S8). The television receiver 250 may present each connection setting state to a user on a user interface screen, thereby making the user execute checking. In configuring an AV system, the user may execute direct connection by HDMI to enhance the ease of use of an AV system 200 without having to execute the connection setting of DLNA.Type: GrantFiled: September 26, 2008Date of Patent: March 19, 2013Assignee: Sony CorporationInventors: Kazumoto Kondo, Kazuhiro Imai, Yasuhisa Nakajima
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Patent number: 8402177Abstract: A processor implemented method for inferring storage topology of a host includes discovering, from a security group that contains an initiator port of the host, all initiator ports of the host and all target ports of a storage device. Identification is then made of a port in the security group through which access to the storage device is blocked. From the discovered ports not identified as blocked, available paths between the host and a volume exposed to the host by the storage device are detected.Type: GrantFiled: June 29, 2011Date of Patent: March 19, 2013Assignee: Hewlett-Packard Development Company, L.P.Inventor: Krishnamurthy Vikram
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Publication number: 20130067125Abstract: Methods and structure for improved processing of fast path I/O requests in a clustered storage system. In a storage controller of a clustered storage system, the controller comprises a fast path I/O request processing circuit tightly coupled with host system drivers for fast processing of requests directed to storage devices of a logical volume. The controller also comprises a logical volume I/O processing stack (typically implemented as programmed instructions) for processing I/O requests from a host system directed to a logical volume. Based on detecting a change of ownership of a device or volume and/or a change to logical to physical mapping of a logical volume, fast path I/O requests may be converted to logical volume requests based on mapping context information within the fast path I/O request and shipped within the clustered storage system for processing.Type: ApplicationFiled: March 28, 2012Publication date: March 14, 2013Applicants: LSI CORPORATION, LSI CORPORATIONInventors: James A. Rizzo, Vinu Velayudhan, Adam Weiner, Gerald E. Smith
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Patent number: 8397001Abstract: Described are techniques for storage configuration. Defined are one or more initiator groups each including one or more initiator ports, one or more target groups each including one or more target ports, and one or more storage groups each including one or more devices. A masking view is created where the masking view includes a first of the initiator groups, a first of the target groups, and a first of the storage groups. The masking view indicates which devices of the first storage group are accessible using one or more paths. Each of the one or more paths is specified using an initiator port from the first initiator group and a target port from the first target group.Type: GrantFiled: May 4, 2011Date of Patent: March 12, 2013Assignee: EMC CorporationInventors: Kevin Martin, Michael J. Scharland, Patrick Brian Riordan, Arieh Don, Violet S. Beckett, John F. Madden, Jr.
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Patent number: 8392630Abstract: Provided is an information processing apparatus and method of controlling same in which, when data transfer is performed among a plurality of control circuits, which control circuit is used to execute data transfer is controlled appropriately based on the transfer conditions of data transfer. To accomplish this, the apparatus has first and second control circuits, a request for data transfer performed between the first and second control circuits is acquired, the transfer conditions of the acquired data transfer are analyzed and which of the first and second control circuits is to execute the data transfer is selected.Type: GrantFiled: January 20, 2012Date of Patent: March 5, 2013Assignee: Canon Kabushiki KaishaInventor: So Yokomizo
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Patent number: 8392634Abstract: A PLC of building block type includes a switch module incorporating a switch part having N-to-N switch function between serial communication lines with a plurality of lines and a plurality of device modules individually incorporating device systems with various advanced-function device module characteristics. A CPU system having CPU functions of the PLC may be incorporated in the switch module, the switch module incorporating the CPU system and the plurality of device modules being connected together into a single body in a building block structure through module-connecting mechanisms. Dedicated serial communication lines each with a single line or a plurality of lines connect between the switch module incorporating the CPU system and each of the plurality of device modules such that a star-shaped serial communication network is formed with the switch module incorporating the CPU system as a central node and each of the plurality of device modules as a peripheral node.Type: GrantFiled: February 25, 2008Date of Patent: March 5, 2013Assignee: OMRON CorporationInventors: Tomohisa Ishino, Norio Furuishi
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Publication number: 20130054847Abstract: A semiconductor chip and a semiconductor system comprising the chip. The semiconductor system comprises: a serial advanced technology attachment (SATA) host; a plurality of SATA devices which receive data from the SATA host and stores the received data, or transmit the stored data to the SATA host; and a semiconductor chip which controls a data-transceiving operation between the SATA host and the SATA devices. The semiconductor chip and the semiconductor system have merits in that the semiconductor chip may be connected to a plurality of devices without being limited by the number of host channels of the semiconductor chip, while preventing an increase in the size of a host.Type: ApplicationFiled: May 12, 2011Publication date: February 28, 2013Applicant: NOVACHIPS CO., LTD.Inventors: Seong Won Cho, Young Goan Kim
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Publication number: 20130054846Abstract: Embodiments of the invention relate to configuring a virtualization controller in SAN data storage system without disrupting I/O operations. One aspect of the invention concerns a method that comprises establishing a first data path between a host and a storage controller in the same communication zone wherein the storage controller comprises disks for storing data; adding a virtualization controller to the zone wherein the virtualization controller maps the disks to virtual volumes and establishes a second data path between the host and the disks through the virtual volumes; removing the first data path in response to the host detecting the second data path; and performing I/O operations between the host and the disks through the second data path.Type: ApplicationFiled: August 31, 2011Publication date: February 28, 2013Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Ashish Chaurasia, Subhojit Roy
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Patent number: 8384938Abstract: An image reading apparatus includes: a reading unit; a transmission unit and a limiting unit. The reading unit is configured to read a document and create image data. The transmission unit supports a plurality of transmission modes, and is configured to transmit the image data to an external apparatus using at least one selected from the plurality of transmission modes. The limiting unit is configured to limit selectable transmission modes of the transmission unit based on at least one of: a user-designated attribute of the document set by a user; a reading attribute of the reading unit; and a content of the document read by the reading unit.Type: GrantFiled: December 21, 2009Date of Patent: February 26, 2013Assignee: Brother Kogyo Kabushiki KaishaInventor: Hiroto Nakayama
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Patent number: 8386669Abstract: To appropriately manage configuration information acquired from a storage system for the purpose of performance management, etc., an information processing apparatus managing the configuration information, i.e.Type: GrantFiled: February 7, 2012Date of Patent: February 26, 2013Assignee: Hitachi, Ltd.Inventors: Hirokazu Uchi, Hideo Ohata
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Patent number: 8380894Abstract: A system, method and program product for tracking an I/O mapping-path among a plurality of nodes in a storage configuration. A system is disclosed that includes: a path tracking manager implemented at a host system that enables I/O mapping-path tracking for an I/O request being serviced within the storage configuration; and a path tagging system implemented at each of a plurality of virtual storage nodes within the storage configuration, wherein each path tagging system appends mapping-path information to the I/O request in response to receiving and processing the I/O request.Type: GrantFiled: December 11, 2009Date of Patent: February 19, 2013Assignee: International Business Machines CorporationInventor: Mark R. Gordon
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Patent number: 8380927Abstract: Described are systems that employ configurable on-die termination elements that allow users to select from two or more termination topologies. One topology is programmable to support rail-to-rail or half-supply termination. Another topology selectively includes fixed or variable filter elements, thereby allowing the termination characteristics to be tuned for different levels of speed performance and power consumption. Termination voltages and impedances might also be adjusted.Type: GrantFiled: August 10, 2009Date of Patent: February 19, 2013Assignee: Rambus Inc.Inventors: Richard E. Perego, Frederick A. Ware, Ely K. Tsern, Craig E. Hampel
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Patent number: 8380970Abstract: A device driving apparatus includes a storage unit to store a plurality of device driving programs, a plurality of devices to receive the plurality of device driving programs, and a switching unit to transfer the plurality of device driving programs.Type: GrantFiled: October 28, 2008Date of Patent: February 19, 2013Assignee: SAMSUNG Electronics Co., Ltd.Inventor: Dong-jun Jang
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Patent number: 8380937Abstract: A system including a server apparatus executes an application program and a client apparatus enabling a user to utilize the application program by communicating with the server apparatus based on an instruction of the user. The server apparatus includes: an output detection section for detecting output-processing which is processing of outputting data from the application program into a shared area; and an output control section for storing instruction information in the shares area, instead of storing the output data outputted from the application program therein, in response to the detection of the output-processing, the instruction information specifying an acquisition method by which an authorized client apparatus acquires the output data.Type: GrantFiled: November 28, 2006Date of Patent: February 19, 2013Assignee: International Business Machines CorporationInventors: Sanehiro Furuichi, Yuriko Kanai, Masana Murase, Tasuku Otani
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Patent number: 8380893Abstract: A host I/F unit has a management table for managing an MPPK which is in-charge of the control of input/output processing for a storage area of an LDEV, and if a host computer transmits an input/output request for the LDEV, the host I/F unit transfers the input/output request to the MPPK which is in-charge of the input/output processing for the LDEV based on the management table, an MP of the MPPK performs the input/output processing based on the input/output request, and the MP of the MPPK also judges whether the MPPK that is in-charge of the input/output processing for the LDEV is to be changed, and sets the management table so that an MPPK which is different from the MPPK that is in-charge is to be in-charge of the input/output processing for the LDEV.Type: GrantFiled: February 27, 2012Date of Patent: February 19, 2013Assignee: Hitachi, Ltd.Inventors: Kazuyoshi Serizawa, Yasutomo Yamamoto, Norio Shimozono, Akira Deguchi, Hisaharu Takeuchi, Takao Sato, Hisao Homma
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Publication number: 20130036244Abstract: An IOP 14 includes a path-state determining unit 54 and a path selecting unit 55. The path-state determining unit 54 determines whether there is any path which is neither in process of data transmission nor in a prohibition period in which data transmission is prohibited for a predetermined time since the last data transmission has been completed out of multiple paths connecting a device to a communication partner device. When the path-state determining unit 54 determines that there is no path which is neither in process of data transmission nor in the prohibition period, the path selecting unit 55 selects a path which completes data transmission but does not pass through the prohibition period as a path for data transmission.Type: ApplicationFiled: June 20, 2012Publication date: February 7, 2013Applicant: FUJITSU LIMITEDInventor: Tadasuke KATOH
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Patent number: 8370592Abstract: A technique migrates data from source arrays to target arrays. The array devices operate in either active mode, passive mode, or stalled-active mode. The technique involves providing active-to-passive instructions to transition the source devices from active to passive while a host initially accesses host data from the source arrays using MPIO software (the target devices being in stalled-active mode), and monitoring whether the source devices successfully transition to passive during a predefined time period. If so, the technique involves operating the target devices in active mode and transferring data from the source devices to the target devices to enable the host to access the host data from the target arrays using the MPIO software. However, if a source device remains passive, the technique involves providing passive-to-active instructions to transition the source devices back to active to enable the host to access the host data from the source arrays.Type: GrantFiled: March 30, 2010Date of Patent: February 5, 2013Assignee: EMC CorporationInventors: Michael Specht, Steven Goldberg, Ian Wigmore, Patrick Brian Riordan, Arieh Don
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Patent number: 8370539Abstract: A video apparatus includes plural interface sections such as HDMI (Registered Trademark) sections for connection with plural video signal sources, a function transferring section which transfers functions of the interface sections, and one or more function blocks for use in common to the plural interface sections. The functions are assigned to the interface sections such as HDMI sections connected with the video signal sources, via switches for example, to minimize the number of the function blocks to be provided.Type: GrantFiled: April 22, 2010Date of Patent: February 5, 2013Assignee: Hitachi Consumer Electronics Co., Ltd.Inventor: Nobuaki Kabuto
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Patent number: 8364926Abstract: A memory module having reduced access granularity. The memory module includes a substrate having signal lines thereon that form a control path and first and second data paths, and further includes first and second memory devices coupled in common to the control path and coupled respectively to the first and second data paths. The first and second memory devices include control circuitry to receive respective first and second memory access commands via the control path and to effect concurrent data transfer on the first and second data paths in response to the first and second memory access commands.Type: GrantFiled: February 29, 2012Date of Patent: January 29, 2013Assignee: Rambus Inc.Inventors: Craig E. Hampel, Frederick A. Ware
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Patent number: 8364853Abstract: A computer program product is provided for performing a method including: obtaining information relating to an I/O operation at a channel subsystem in a host computer system; generating at least one address control word (ACW) in the local channel memory specifying one or more host memory locations for transfer of data between the host and a control unit and including at least one ACW error checking field; generating an address control structure specifying a location in the local channel memory of a corresponding ACW and including at least one address control structure error checking field; receiving a data transfer request from the network interface that includes the addressing information; comparing the at least one ACW error checking field to the at least one address control structure error checking field; and, responsive to the fields matching, routing the data transfer request to the host memory location specified in the corresponding ACW.Type: GrantFiled: June 1, 2011Date of Patent: January 29, 2013Assignee: International Business Machines CorporationInventors: Clinton E. Bubb, Daniel F. Casper, John R. Flanagan
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Publication number: 20130016032Abstract: A wireless peripheral mode is provided by a host system that communicates to a WiFi infrastructure and, utilizing the same WiFi RF subsystem, also communicates to peripherals. The host system may employ additional RF channels for communicating with high bandwidth peripherals, such as display devices, where high levels of QoS may be managed locally. The host system may be a conventional desktop computer system, a notebook computer system, a multi-media access point, a cell phone, a game machine, a portable game machine, a Personal Digital Assistant (PDA), a smart phone or any other type of device that benefits from accessing both a WiFi infrastructure and local peripherals.Type: ApplicationFiled: September 19, 2012Publication date: January 17, 2013Inventor: Neal D. Margulis
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Publication number: 20130019034Abstract: Connecting USB devices with USB hosts over distinct network data plane connections, including the following steps: USB hosts are connected with respective USB host adaptors (USBHs) according to USB specification timings. USB devices are connected with respective USB device adaptors (USBDs). Enabling the USBDs and the USBHs to communicate over a network that can connect each USBD with each USBH, wherein the network includes network control plane and network data plane. Initiating first, second, and third USB-over-network-data-plane connections from the USB hosts to the USB devices. And operating the at least two USB-over-network-data-plane connections essentially simultaneously and without any common network node.Type: ApplicationFiled: January 19, 2012Publication date: January 17, 2013Applicant: Valens Semiconductor Ltd.Inventors: Eyran Lida, Aviv Salamon
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Patent number: 8356132Abstract: A position sensing system controls selection of channels in a KVM switch having a plurality of channels. The system has a sensor interface for receiving a sensor reading indicating a current position of a position movable component. Each position of the movable component is associated with one of the plurality of channels. The position sensing system also includes a position component for selecting channels of the KVM switch according to the sensor reading. The position component comprises a position definition component and a translation component. The definition component identifies one of the channels corresponding to the sensor reading based on one of a position definition. Each position definition provides sensor readings corresponding to the positions associated with one of the channels. The translation component generates a signal for selecting the determined channel at the KVM switch. This signal is provided to the KVM switch to switch the KVM channel.Type: GrantFiled: June 20, 2006Date of Patent: January 15, 2013Assignee: International Business Machines CorporationInventor: Derek Kwan
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Patent number: 8352649Abstract: Disclosed is a storage virtualization subsystem (SVS) architecture comprising a plurality of SVSs, each SVS comprising at least one storage virtualization controller (SVC), and, in some cases, a physical storage disk (PSD) array attached to the SVC. A first and a second data access path is configured passing through the SVSs to form the SVS architecture such that when one path is failed, the other can be taken as a substitution. The SVSs in the first path are connected in a first sequence and the SVSs in the second path are connected in a second sequence different from the first one. In another embodiment, each SVS comprises a plurality of redundantly-configured SVCs rather than one SVC. The first path is formed passing through a first set of SVCs and the second path is formed passing through a different second set of SVCs.Type: GrantFiled: June 7, 2006Date of Patent: January 8, 2013Assignee: Infortrend Technology, Inc.Inventors: Ling-Yi Liu, Cheng-Yu Lee, Ching-Hua Fang
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Patent number: 8352668Abstract: A USB printer sharing switch device with automatic switching capabilities is provided for multiple computers to share a USB printer. The sharing switch device transfers USB data between the computers and the printer without changing the data format. The automatic switching function is performed by hardware and firmware of the sharing switch device in cooperation with driver software on the computers. In one implementation, the sharing switch device includes multiple USB device controllers corresponding to the multiple computers, and employs multiple switches and a USB hub so that each computer is connected to its corresponding controller and the computer that is currently connected to the printer can communicate with its controller while printing. The current computer transmits a spooling finished command to its controller when spooling is finished. After receiving the spooling finished command, the sharing switch device automatically switches the printer to another computer.Type: GrantFiled: December 29, 2010Date of Patent: January 8, 2013Assignee: Aten International Co., Ltd.Inventor: Xiong Yan
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Patent number: 8352661Abstract: A data storage system having a pair of CPU modules each one of having a port coupled to a host computer/server and a storage medium for transferring data during an IO transfer. Each one of the modules produces different types of reset signals, one of such types being a software reset signal produced during a software upgrade of the module and other types being produced for events other than during a software upgrade, The other types produced by a first one of the modules disables the port of the first one of the modules; whereas, in response the software reset signal produced by the first one of the modules during an IO transfer, a second one of the modules couples the port of the first one of the modules to the second one of the modules to enable the IO transfer to be processed by the second one of the modules.Type: GrantFiled: March 24, 2010Date of Patent: January 8, 2013Assignee: EMC CorporationInventors: Alex J. Sanville, Steven D. Sardella
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Patent number: 8346997Abstract: In one embodiment, a computer-implemented method for creating redundant system configurations is presented. The computer-implemented method creates a set of virtual function path authorization tables, and receives a request from a requester to provide requested data from a virtual function wherein the virtual function is performed by a single root or a multi-root peripheral component interconnect device. Further a receive buffer is created in a selected address range in a set of addresses ranges as well as a virtual function work queue entry for the virtual function containing an address of the receive buffer in the selected address range. Responsive to a determination that the virtual function is authorized, writing the requested data into the receive buffer of the selected address range in the one or more systems, and responsive to writing the requested data, issuing a notice of completion to the requester.Type: GrantFiled: December 11, 2008Date of Patent: January 1, 2013Assignee: International Business Machines CorporationInventors: Douglas M. Freimuth, Steven M. Thurber
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Patent number: 8341359Abstract: A method of dynamically sharing a media volume in a network includes associating a first media management module with a first media volume of a first storage device, associating a second media management module with the first media volume, the second media management module mounting the media volume and creating an access path to the media volume, and delegating management of the created access path to the second media management module.Type: GrantFiled: October 3, 2011Date of Patent: December 25, 2012Assignee: CommVault Systems, Inc.Inventors: Rajiv Kottomtharayil, Parag Gokhale, Anand Prahlad, Manoj Retnamma, David Ngo, Varghese Devassy
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Patent number: 8341311Abstract: A flash memory system having the capability of streaming data directly from flash memory to the interface of a host computer in order to substantially reduce latency of to-host transfers, while also maintaining the capabilities for caching and overlapped flash I/O provided by RAM DMA transfers. When data is read from the flash memory, the data is transferred into the RAM buffer and at the option of the memory controller, directly (via an intermediate FIFO) to the host interface. This results in a desirable reduction in the latency of data transfer because as soon as the first byte of data is read from the flash memory by the DMA engine, the data will be transferred directly to the host interface. Because the data is also being transferred to the buffer RAM, preferred embodiments of the present invention still provide the advantages of using an intermediate transfer buffer.Type: GrantFiled: November 18, 2009Date of Patent: December 25, 2012Assignee: Entorian Technologies, IncInventors: Leland Szewerenko, Thomas Branca
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Patent number: 8332549Abstract: A method for communication between an initiator system and a block storage cluster may include receiving a first input/output (I/O) request from the initiator system. The method may also include sending a referral response from a first storage system included in a plurality of storage systems of the block storage cluster to the initiator system when data associated with the first I/O request is stored in more than one storage system of the plurality of storage systems of the block storage cluster. Additionally, the method may include directing a referral I/O to the first storage system and the second storage system for transferring data to or transferring data from the first storage system and the second storage system, and transferring data associated with the referral I/O to or transferring data associated with the referral I/O from the first storage system and the second storage system.Type: GrantFiled: March 31, 2009Date of Patent: December 11, 2012Assignee: LSI CorporationInventors: Andrew J. Spry, Ross Zwisler, Gerald J. Fredin, Kenneth J. Gibson
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Publication number: 20120311256Abstract: The computer system of the present invention has a plurality of SAS target devices, an SAS initiator device, and a service delivery subsystem that is connected to each SAS target device by means of a physical link that is physical wiring and connected to the SAS initiator device by means of a wide link constituted by a plurality of physical links. The SAS initiator device controls how many physical links in the wide link are allocated to a particular SAS target device, whereby access from the SAS initiator device to the SAS target device is made via a physical link that is allocated to the SAS target device and is not made via a physical link that is not allocated to the SAS target device.Type: ApplicationFiled: August 16, 2012Publication date: December 6, 2012Applicant: HITACHI, LTD.Inventors: Akio NAKAJIMA, Ikuya YAGISAWA
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Patent number: 8321633Abstract: A memory card, connected to a host, includes a NAND flash memory and a memory controller. The NAND flash memory includes multiple pages, and each page includes multiple sectors. The memory controller receives sector data and a corresponding sector address from the host. The memory controller enables the sector data to be transferred to the NAND flash memory over a first data bus, via a buffer memory, when the sector address is an address for accessing a first sector in a selected page. The memory controller enables the sector data to be transferred to the NAND flash memory over a second data bus, bypassing the buffer memory, when the sector address is an address for accessing a sector other than the first sector in the selected page.Type: GrantFiled: August 3, 2007Date of Patent: November 27, 2012Assignee: Samsung Electronics Co., Ltd.Inventor: Kyong-Ae Kim
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Patent number: 8321617Abstract: In an information system, for I/O migration, the migration management module detects a first I/O function associated with a first I/O device to which the OS is connected, selects a second I/O function associated with a second I/O device which is the same type of the first I/O device, and instructs to hot-add the second I/O function to the OS. And the OS sets a teaming for a first virtual MAC address of a first virtual NIC corresponding to the first I/O function and a second virtual MAC address of a second virtual NIC corresponding to the second I/O function, and disconnects the first virtual MAC address of the first virtual NIC corresponding to the first I/O function.Type: GrantFiled: May 18, 2011Date of Patent: November 27, 2012Assignee: Hitachi, Ltd.Inventor: Futoshi Haga
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Patent number: 8316319Abstract: An example method involves: providing a user-interface having a plurality of input regions, where one of the input regions is a home region, where each of the input regions is associated with a primary character from a set of primary characters, and where at least one of the input regions is associated with a subset of secondary characters from a set of secondary characters; receiving data indicating an input-movement from the home region to a second input region from the plurality of input regions that is associated with a subset of secondary characters; receiving data indicating an input-movement from the second input region to the home region; selecting, in response to the input-movement from the second input region to the home region, a character from the subset of secondary characters associated with the second input region; and causing the selected character to be displayed on a graphical display.Type: GrantFiled: May 16, 2011Date of Patent: November 20, 2012Assignee: Google Inc.Inventors: Nirmal Patel, Thad Eugene Starner
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Patent number: 8316161Abstract: Described are techniques for indicating a state associated with a device. A request is received over a path for information about a device. A response to the request is sent. The response indicates a state regarding the device on the path. The response has a response status of good and a payload of a varying size. The payload is truncated at a location prior to that at which a device identifier for the device is expected. In accordance with the response, a state regarding the device on the path is determined.Type: GrantFiled: September 30, 2010Date of Patent: November 20, 2012Assignee: EMC CorporationInventors: Cesareo Contreras, Helen S. Raizen, Michael E. Bappe, Ian Wigmore, Arich Don, Xunce Zhou
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Publication number: 20120290747Abstract: A method for more effectively distributing the I/O workload in a data replication system is disclosed herein. In selected embodiments, such a method may include generating an I/O request and identifying a storage resource group associated with the I/O request. In the event the I/O request is associated with a first storage resource group, the I/O request may be directed to a first storage device and a copy of the I/O request may be mirrored from the first storage device to a second storage device. Alternatively, in the event the I/O request is associated with a second storage resource group, the I/O request may be directed to a second storage device and a copy of the I/O request may be mirrored from the second storage device to the first storage device.Type: ApplicationFiled: April 16, 2012Publication date: November 15, 2012Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Philip M. Doatmas, Michael R. Groseclose, Paul A. Jennas, Larry Juarez, David Montgomery, Jason L. Peipelman, Joshua M. Rhoades, Todd C. Sorenson
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Patent number: 8301831Abstract: An extended Universal-Serial-Bus (USB) connector plug and socket each have a pin substrate with one surface that supports the four metal contact pins for the standard USB interface. An extension of the pin substrate carries another 8 extension metal contact pins that mate when both the connector plug and socket are extended. The extension can be an increased length of the plug's and socket's pin substrate or a reverse side of the substrate. Standard USB connectors do not make contact with the extension metal contacts that are recessed, retracted by a mechanical switch, or on the extension of the socket's pin substrate that a standard USB connector cannot reach. Standard USB sockets do not make contact with the extension metal contacts because the extended connector's extension contacts are recessed, or on the extension of the connector pin substrate that does not fit inside a standard USB socket.Type: GrantFiled: October 24, 2011Date of Patent: October 30, 2012Assignee: Super Talent Electronics, Inc.Inventors: Jim Chin-Nan Ni, David Q. Chow, Frank I-Kang Yu, Abraham C. Ma, Ming-Shiang Shen
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Patent number: 8302094Abstract: One embodiment is a virtualized mobile device including virtualization software that supports one or more virtual machines and further includes: (a) device emulation software that communicates with device driver software in the one or more virtual machines; (b) device driver software that communicates with one or more physical devices of the mobile device; and (c) transformer stack software that interacts with the device emulation software and the device driver software.Type: GrantFiled: June 26, 2009Date of Patent: October 30, 2012Assignee: VMware, Inc.Inventors: Lawrence S. Rogel, Scott W. Devine