For Data Storage Device Patents (Class 710/74)
  • Patent number: 12001372
    Abstract: A PCIe retimer includes read-only vendor registers with low latency mode entry and exit values. In-band low latency switching logic monitors the output of an elastic buffer for read commands of the vendor registers and, when such read commands are received, reads the corresponding address and switches a multiplexer between a link training data path and a low latency data path based on the return value of the read operation. Read commands, and therefore control of data path switching, is handled entirely in-band. Return values of the read operations indicate success or failure of mode switching to the root complex.
    Type: Grant
    Filed: March 14, 2022
    Date of Patent: June 4, 2024
    Assignee: Avago Technologies International Sales Pte. Limited
    Inventor: Jeffrey Ronald Dorst
  • Patent number: 11914537
    Abstract: Techniques are disclosed for managing the connection assignments of a plurality of accessory devices to one or more hub devices. In one example, a user device acting as a leader device receives an assignment request from an accessory device. The user device may obtain information corresponding to hub attributes from the one or more hub devices. The user device may also obtain accessory traits from the accessory device. The user device can compare the accessory traits with the hub attributes to determine a connection score for each hub device. The user device can then assign the accessory device to the hub device with the highest connection score.
    Type: Grant
    Filed: April 12, 2022
    Date of Patent: February 27, 2024
    Assignee: Apple Inc.
    Inventors: Jared S. Grubb, Robert M. Stewart, Gabriel Sanchez, Zaka ur Rehman Ashraf, David J. Chandler
  • Patent number: 11899943
    Abstract: A node interconnection apparatus includes a computing node and a resource control node, and a device interconnection interface connecting the two. Each of the computing node and the resource control node includes a processing unit and a storage unit, and the resource control node further includes a resource interface for connecting with a network storage device. The resource control node manages storage resource of the network storage device, and when the computing node needs to start up, the resource control node obtains operating system startup information from the network storage device and provides the information to the computing node. The computing node can start up without the need for storing startup information locally.
    Type: Grant
    Filed: April 16, 2021
    Date of Patent: February 13, 2024
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Baifeng Yu, Zhou Yu, Jiongjiong Gu
  • Patent number: 11841396
    Abstract: A storage device controller includes drive controller circuitry configured to control writing and fetching of data from a storage medium, read data channel circuitry for interfacing between the drive controller circuitry and the storage medium, test controller circuitry configured to test the read data channel circuitry by issuing test commands simulating the writing and fetching of data from the storage medium, and selector circuitry configured to switchably couple the read data channel circuitry to the drive controller circuitry in an operating mode and to the test controller circuitry in a testing mode. The storage device controller may include a pattern generator configured to output the test commands. Processor circuitry may be configured to store test results in memory, to compute performance metrics from the stored test results, and communicate the performance metrics to a host device.
    Type: Grant
    Filed: March 21, 2022
    Date of Patent: December 12, 2023
    Assignee: Marvell Asia Pte Ltd
    Inventors: Sameer Vaidya, Supaket Katchmart, Vivek Khanzode, Pallavi Joshi, Henri Sutioso, Naim Siemsen-Schumann, Hongying Sheng
  • Patent number: 11797180
    Abstract: A method includes, in one non-limiting embodiment, receiving a command originating from an initiator at a controller associated with a non-volatile mass memory coupled with a host device, the command being a command to write data that is currently resident in a memory of the host device to the non-volatile mass memory; moving the data that is currently resident in the memory of the host device from an original location to a portion of the memory allocated for use at least by the non-volatile mass memory; and acknowledging to the initiator that the command to write the data to the non-volatile mass memory has been executed. An apparatus configured to perform the method is also described.
    Type: Grant
    Filed: December 23, 2020
    Date of Patent: October 24, 2023
    Assignee: Memory Technologies LLC
    Inventors: Kimmo J. Mylly, Jani J. Klint, Jani Hyvonen, Tapio Hill, Jukka-Pekka Vihmalo, Matti Floman
  • Patent number: 11789619
    Abstract: A node interconnection apparatus includes a computing node, a resource control node, and a device interconnection interface connecting the computing node and the resource control node. Each of the computing node and the resource control node includes a processing unit and a storage unit, and the resource control node further includes a resource interface for connecting with a network storage device. The resource control node manages a storage resource of the network storage device, and when the computing node needs to start up, the resource control node obtains operating system startup information from the network storage device and provides the operating system startup information to the computing node. The computing node can start up without the need for storing startup information locally.
    Type: Grant
    Filed: July 29, 2022
    Date of Patent: October 17, 2023
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Baifeng Yu, Zhou Yu, Jiongjiong Gu
  • Patent number: 11693577
    Abstract: Systems and methods for storage operation processing during data migration using selective block migrated notifications are disclosed. A host system may be configured with connections to a source storage node and a destination storage node while a data migration is moving data blocks from the source to the destination. The host may send a storage request to the source storage node and receive a block migrated notification from the source storage node. The host may then store a migrated indicator for that data block in a migration table and direct future storage requests to the destination storage node.
    Type: Grant
    Filed: October 18, 2021
    Date of Patent: July 4, 2023
    Assignee: Western Digital Technologies, Inc.
    Inventors: Senthil Kumar Veluswamy, Rahul Gandhi Dhatchinamoorthy, Kumar Ranjan
  • Patent number: 11487683
    Abstract: Techniques in electronic systems, such as in systems comprising a CPU die and one or more external mixed-mode (analog) chips, may provide improvements advantages in one or more of system design, performance, cost, efficiency and programmability. In one embodiment, the CPU die comprises at least one microcontroller CPU and circuitry enabling the at least one CPU to have a full and transparent connectivity to an analog chip as if they are designed as a single chip microcontroller, while the interface design between the two is extremely efficient and with limited in number of wires, yet may provide improved performance without impact to functionality or the software model.
    Type: Grant
    Filed: April 7, 2021
    Date of Patent: November 1, 2022
    Assignee: AyDeeKay LLC
    Inventor: Scott David Kee
  • Patent number: 11460908
    Abstract: A storage system includes a first storage device and a second storage device, a first programmable chip of the first storage device and a second programmable chip of the second storage device are connected in series, and the second storage device is in a sleep state. The first programmable chip sends a wakeup instruction to the second programmable chip to instruct the second storage device to enter a working state. In this way, the second storage device is switched from the sleep state to the working state by using a programmable chip of the storage device.
    Type: Grant
    Filed: February 28, 2019
    Date of Patent: October 4, 2022
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Mingyong Shen, Wenxing Liu
  • Patent number: 11449455
    Abstract: During operation, the system receives, by a master node, a first I/O request with associated data, wherein the master node is in communication with a first plurality of storage drives via a switch based on a network protocol, wherein the master node and the first plurality of storage drives are allowed to reside in different cabinets, and wherein a respective collection of storage drives are coupled to a converter module, which is configured to convert data between the network protocol and an I/O protocol used to access the storage drives. The system identifies, by the master node, a first collection of storage drives from the first plurality on which to execute the first I/O request. The system executes, based on a communication via the switch and a converter module associated with the first collection of storage drives, the first I/O request on the first collection of storage drives.
    Type: Grant
    Filed: January 15, 2020
    Date of Patent: September 20, 2022
    Assignee: Alibaba Group Holding Limited
    Inventor: Shu Li
  • Patent number: 11451645
    Abstract: A method of data storage includes determining a latency distance from a primary node to each of two or more replica nodes, choosing a preferred replica node of the two or more replica nodes based on the determined latency distances, and write-caching data into the preferred replica node.
    Type: Grant
    Filed: September 12, 2019
    Date of Patent: September 20, 2022
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Zhengyu Yang, Jiayin Wang, Thomas David Evans
  • Patent number: 11381524
    Abstract: Provided are techniques for the efficient distribution of peer zone databases in a FC Fabric. In an example, a switch instantiates a peer zone definition defining a peer zone in which two or more initiator host devices are each permitted to communicate with one or more target storage devices via the switched FC fabric and the two or more initiator host devices are prevented from communicating with each other. The switch stores the peer zone definition in a peer zone database at the FC switch, and distributes the peer zone definition to other FC switches of the switched FC fabric without performing a Fabric lock operation.
    Type: Grant
    Filed: July 17, 2020
    Date of Patent: July 5, 2022
    Assignee: CISCO TECHNOLOGY, INC.
    Inventors: Karthik Subramani, Venu Gopal Tummala, Kishan Kumar Kotari Uppunda
  • Patent number: 11356636
    Abstract: Methods, systems, and apparatuses are described for determining a power state of a device. Identification data may be received, e.g., in a media device hub, from one or more devices coupled to the device hub. In some example implementations, the devices coupled to the device hub may comprise an intermediate device coupled to the hub via a first multimedia cable and a sink media device coupled to the intermediate device via a second multimedia cable. Attributes may be identified in the received identification data, such as attributes relating to one or more of the coupled devices. The attributes may be associated with one or more of the devices that are coupled to the device hub. Based on an association of attributes, a power state of one or more of the devices coupled to the hub may be determined.
    Type: Grant
    Filed: January 17, 2019
    Date of Patent: June 7, 2022
    Assignee: Caavo Inc
    Inventors: Ashish D. Aggarwal, Sharath H. Satheesh, Conrad Savio Jude Gomes
  • Patent number: 11347663
    Abstract: A set of memory commands associated with one or more memory dies of a memory device are communicated via a first portion of an interface to the memory device. Communication of a set of data bursts corresponding to the set of memory commands to the one or more memory dies via a second portion of the interface is caused, wherein one or more of the set of memory commands is communicated via the first interface concurrently with one or more of the set of data bursts.
    Type: Grant
    Filed: October 27, 2020
    Date of Patent: May 31, 2022
    Assignee: Micron Technology, Inc.
    Inventor: Luigi Pilolli
  • Patent number: 11321112
    Abstract: Communication endpoints associated with a virtual machine for migration can be discovered. Properties associated with the communication endpoints can be discovered. The communication endpoints can be matched to establish a communication channel between the endpoints. The communication endpoints, the properties and the at least one communication channel can be used in recreating the communication channel for a migrated version of the virtual machine.
    Type: Grant
    Filed: April 22, 2019
    Date of Patent: May 3, 2022
    Assignee: International Business Machines Corporation
    Inventors: Ching-Farn E. Wu, Niteesh K. Dubey, Ramanjaneya S. Burugula, Hao Yu, Joefon Jann
  • Patent number: 11294893
    Abstract: A method for querying a storage system is provided. The method includes receiving, at one of a plurality of storage nodes of the storage system, a query relating to metadata of the storage system. The method includes determining which authorities have ownership of ranges of user data to which the query pertains and distributing the query or portions of the query to the authorities that have ownership of the data, wherein each of the authorities access the metadata of the storage system associated with the query. The method includes aggregating replies to the query from the authorities that have ownership of the ranges of user data, to form a query reply.
    Type: Grant
    Filed: May 3, 2016
    Date of Patent: April 5, 2022
    Assignee: Pure Storage, Inc.
    Inventor: Par Botes
  • Patent number: 11288096
    Abstract: One embodiment provides a computer implemented method of balancing mixed workload performance including monitoring the compression and decompression workload at a hardware accelerator using the hardware accelerator quality of service (QoS) scheduler; monitoring the compression and decompression workload at a CPU using the CPU QoS scheduler; comparing the workload at the hardware accelerator and the workload at the CPU; and allocating tasks between the hardware accelerator and the CPU to obtain an optimal bandwidth at the hardware accelerator and the CPU.
    Type: Grant
    Filed: October 15, 2019
    Date of Patent: March 29, 2022
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Rahul Ugale, Colin Zou
  • Patent number: 11258852
    Abstract: The present disclosure involves systems, software, and computer implemented methods for performing dynamic topology switch in a failover operation. In one example, a failover of a first node is determined. The first node includes a first data server and a first replication server. At least one user application connects to the first data server prior to the failover of the first node. In response to the determined failover, the at least one user application is connected to a second data server of a second node. The second node includes the second data server and a second replication server. Prior to the failover of the first node, a data replication topology of the second node is a remote topology. During the failover, if the first replication server on the first node is down, the data replication topology of the second node is switched from the remote topology to a local topology.
    Type: Grant
    Filed: May 28, 2020
    Date of Patent: February 22, 2022
    Assignee: SAP SE
    Inventors: Zheng-Wei Wang, Jian Luo, Yi Chen, Weizhong Qiu, Huizi Liu, Du Xue
  • Patent number: 11256449
    Abstract: A storage system includes controllers, physical storage devices, and logical storage devices to which storage areas are assigned from the physical storage devices. The controllers each have the physical storage device being different from that of each other and the host connected thereto being different from that of each other, and are each able to access the physical storage device and the host that are not connected thereto, through another controller. Any one of the controllers has an ownership to process an access request concerning the logical storage device. At least one controller determines that the ownership is caused to be moved among the controllers, based on an index of accesses to the physical storage device that includes the storage area to be assigned to the logical storage device and an index of accesses to the host that accesses the logical storage device.
    Type: Grant
    Filed: February 20, 2020
    Date of Patent: February 22, 2022
    Assignee: HITACHI, LTD.
    Inventors: Kenichi Betsuno, Nobumitsu Takaoka, Hideyuki Koseki
  • Patent number: 11231998
    Abstract: Provided are a computer program product, system, and method for generating a chain of a plurality of write requests including a commit wait flag and plurality of write requests. The commit wait flag is set to one of an indicated first value or a second value. The commit wait flag is set to the first value to cause a storage server to process the write requests by requiring a current write request being processed to complete before transferring data for a next write request following the current write request. The commit wait flag is set to the second value to cause the storage server to process the write requests by transferring data for the next write request before completing the current write request preceding the next write request. The write request chain is sent to the storage server to apply the write requests to the storage.
    Type: Grant
    Filed: January 27, 2020
    Date of Patent: January 25, 2022
    Assignee: International Business Machines Corporation
    Inventors: Jeffrey A. Berger, Susan K. Candelaria, Matthew J. Kalos, Beth A. Peterson, Harry M. Yudenfriend
  • Patent number: 11204879
    Abstract: Circuitry comprises a transaction interface to receive a data handling transaction from an upstream device, the data handling transaction defining a target virtual memory address in a virtual memory address space; translation circuitry to access a set of address mappings between virtual memory addresses and physical memory addresses in a physical memory address space; the translation circuitry being configured to initiate handling of the data handling transaction by a downstream device according to a target physical memory address mapped from the target virtual memory address when the set of address mappings includes an address mapping for the target virtual memory address, and to provide a transaction response to the transaction interface indicating a fault condition when the set of address mappings fails to provide an address mapping for the target virtual memory address; and control circuitry to receive a memory region request from the upstream device, requesting that a memory region in the virtual memory
    Type: Grant
    Filed: June 6, 2019
    Date of Patent: December 21, 2021
    Assignee: Arm Limited
    Inventor: Andrew Brookfield Swaine
  • Patent number: 11169961
    Abstract: A plurality of computing devices are communicatively coupled to each other via a network, and each of the plurality of computing devices is operably coupled to one or more of a plurality of storage devices. A plurality of failure resilient address spaces are distributed across the plurality of storage devices such that each of the plurality of failure resilient address spaces spans a plurality of the storage devices. The plurality of computing devices maintains metadata that maps each failure resilient address space to one of the plurality of computing devices. The metadata is grouped into buckets. Each bucket is stored in the backend of a computing device. Data may be migrated from an external file system to the plurality of storage devices using inode stubs to represent directories and files of the external file system. As the contents of the external file system are copied, the inode stubs are replaced with real inodes.
    Type: Grant
    Filed: February 12, 2019
    Date of Patent: November 9, 2021
    Inventors: Maor Ben Dayan, Omri Palmon, Liran Zvibel, Kanael Arditti
  • Patent number: 11138066
    Abstract: The A storage device comprises a controller comprising first random access memory (RAM1), second random access memory (RAM2), and a storage unit divided into a plurality of streams. A first command to write data to a first stream is received, first XOR data is generated in the RAM1, and the data of the first command is written to the first stream. When a second command to write data to a second stream is received, the generated first XOR data is copied from the RAM1 to the RAM2, and second XOR data for the second stream is copied from the RAM2 to the RAM1. The second XOR data is updated with the second command, and the data of the second command is written to the second stream. The updated second XOR data is copied from the RAM1 to the RAM2.
    Type: Grant
    Filed: May 27, 2020
    Date of Patent: October 5, 2021
    Assignee: Western Digital Technologies, Inc.
    Inventors: Sergey Anatolievich Gorobets, Daniel L. Helmick, Liam Parker, Alan D. Bennett, Peter Grayson
  • Patent number: 11113202
    Abstract: A memory system includes: a memory device including a memory block, a page buffer, and first and second memory dies; a write buffer suitable for temporarily storing first and second data; a program managing unit suitable for controlling the memory device to sequentially perform first and second program operations on the memory block with the first and second data; a buffer managing unit suitable for managing the write buffer based on a scatter-gather scheme; a failure processing unit suitable for forcing the second program operation to fail, when the first program operation is a failure; and an error handling unit suitable for controlling the program managing unit to perform the first and second program operations again for the first and second data that are temporarily stored in the write buffer when the second program operation is forced to fail.
    Type: Grant
    Filed: November 13, 2019
    Date of Patent: September 7, 2021
    Assignee: SK hynix Inc.
    Inventors: Hoe-Seung Jung, Joo-Young Lee
  • Patent number: 11074189
    Abstract: Various embodiments are provided for providing byte granularity accessibility of memory in a unified memory-storage hierarchy in a computing system by a processor. A location of one or more secondary memory medium pages in a secondary memory medium may be mapped into an address space of a primary memory medium to extend a memory-storage hierarchy of the secondary memory medium. The one or more secondary memory medium pages may be promoted from the secondary memory medium to the primary memory medium. The primary memory medium functions as a cache to provide byte level accessibility to the one or more primary memory medium pages. A memory request for the secondary memory medium page may be redirected using a promotion look-aside buffer (“PLB”) in a host bridge associated with the primary memory medium and the secondary memory medium.
    Type: Grant
    Filed: June 20, 2019
    Date of Patent: July 27, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Ahmed Abulila, Vikram Sharma Mailthody, Zaid Qureshi, Jian Huang, Nam Sung Kim, Jinjun Xiong, Wen-Mei Hwu
  • Patent number: 11023143
    Abstract: Embodiments of application provide a node interconnection apparatus, and a method implemented by the node interconnection apparatus. The node interconnection apparatus includes a computing node and a resource control node, and a device interconnection interface connecting the two. Each of the computing node and the resource control node includes a processing unit and a storage unit, and the resource control node further includes a resource interface for connecting with a network storage device. The resource control node manages storage resource of the network storage device, and when the computing node needs started up, the resource control node obtains operating system startup information from the network storage device and provide the information to the computing node. The computing node can start up without the need for storing startup information locally. Therefore, storage resource inside the computing node is saved.
    Type: Grant
    Filed: May 20, 2019
    Date of Patent: June 1, 2021
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Baifeng Yu, Zhou Yu, Jiongjiong Gu
  • Patent number: 11016922
    Abstract: A device includes a first interface to receive a signal from a first communication link, wherein the receive signal includes out-of-band (OOB) information. A detector coupled to the first interface detects the OOB information. An encoder coupled to the detector encodes the OOB information into one or more symbols (e.g., control characters). A second interface is coupled to the encoder and a second communication link (e.g., a serial transport path). The second interface transmits the symbols on the second communication link. The device also includes mechanisms for preventing false presence detection of terminating devices.
    Type: Grant
    Filed: February 3, 2020
    Date of Patent: May 25, 2021
    Assignee: RAMBUS INC.
    Inventor: Michael J. Sobelman
  • Patent number: 11012353
    Abstract: In one embodiment, nodes use in-band operations data (e.g., carried in iOAM data field(s)) to signal departures in the processing of a packet in a network. A “departure” refers to a divergence or deviation, as from an established rule, plan, or procedure. Departures include, but are not limited to, sending a packet over a backup path (thus, a departure/deviation from sending over a primary path); offload processing of a packet (thus, a departure/deviation from processing of a packet by an application processing apparatus); and exception or punting/slow/software path processing of a packet (thus, a departure/deviation from normal or fast/hardware path processing of a packet). In one embodiment, a proof of transit validation apparatus uses departure information to select among multiple possible verification secrets, with the selected verification secret used in validation processing with a cumulative secret value obtained from the packet.
    Type: Grant
    Filed: December 21, 2018
    Date of Patent: May 18, 2021
    Assignee: Cisco Technology, Inc.
    Inventors: Shwetha Subray Bhandari, Nagendra Kumar Nainar, Carlos M. Pignataro, Frank Brockners
  • Patent number: 10999305
    Abstract: A computer-implemented method according to one embodiment includes identifying a storage environment, establishing a baseline associated with input and output requests within the storage environment, monitoring activity associated with the storage environment, comparing the activity to the baseline, and performing one or more actions, based on the comparing.
    Type: Grant
    Filed: November 20, 2018
    Date of Patent: May 4, 2021
    Assignee: International Business Machines Corporation
    Inventors: Tara Astigarraga, Christopher V. DeRobertis, Louie A. Dickens, Daniel J. Winarski
  • Patent number: 10990307
    Abstract: A semiconductor device, memory system, and method are provided. One example of the semiconductor device is disclosed to include a host interface that enables bi-directional communications with a host computer, a processor subsystem that enables processing of read or write requests received at the host interface, and one or more storage media interfaces, each of the one or more storage media interfaces being convertible between a first configuration and a second configuration, where the first configuration of a storage media interface enables a direct connection with a computer memory device, and where the second configuration of the storage media interface enables a connection with a plurality of computer memory devices via an expander and/or re-timer.
    Type: Grant
    Filed: July 27, 2018
    Date of Patent: April 27, 2021
    Assignee: BROADCOM INTERNATIONAL PTE. LTD.
    Inventors: Shaohua Yang, John Jansen
  • Patent number: 10970235
    Abstract: An operating method of a computing system includes storing, in a submission queue, a command entry corresponding to a request for one of input and output; fetching the command entry from the submission queue, moving data corresponding to the request within a host memory that is under control of a storage device; after moving the data, updating a completion status of the request in a completion queue; and after updating the completion queue, transferring the data between the host memory and the storage device.
    Type: Grant
    Filed: September 19, 2017
    Date of Patent: April 6, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: JuHyung Hong, Eui-Young Chung
  • Patent number: 10956990
    Abstract: The disclosure discloses a method for adjusting distribution of partitioned data. Access frequency information of to-be-processed partitioned data is acquired when an adjustment time corresponding to the to-be-processed partitioned data has arrived; revenue data of each of data centers corresponding to the partitioned data is then determined according to the access frequency information and a preset revenue function; and finally, optimal distribution information is determined according to the revenue data of each of the data centers and a quantity of copies, and a position of each of the copies in each of the data centers is adjusted according to the optimal distribution information. Therefore, without even having to provide additional memory or hard disk for storage, this disclosure dynamically optimizes the distribution status of the partitioned data according to access frequencies and characteristics of the partitioned data, thus reducing transmission bandwidth requirements among data centers.
    Type: Grant
    Filed: December 16, 2016
    Date of Patent: March 23, 2021
    Assignee: ALIBABA GROUP HOLDING LIMITED
    Inventors: Haiyong Zhang, Jing Lu, Wenhui Yao, Chengyu Dong, Jiaji Zhu
  • Patent number: 10896105
    Abstract: A storage virtualization computer system. The storage virtualization computer system comprises a host entity for issuing an IO request, a SAS storage virtualization controller coupled to the host entity for executing IO operations in response to the IO request, and at least one physical storage device, each coupled to the storage virtualization controller through a SAS interconnect, for providing data storage space to the storage virtualization computer system through the SAS storage virtualization controller.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: January 19, 2021
    Assignee: Infortrend Technology, Inc.
    Inventors: Ching-Te Pang, Michael Gordon Schnapp, Shiann-Wen Sue, Cheng-Yu Lee
  • Patent number: 10880205
    Abstract: In one implementation, a non-transitory machine-readable storage medium may store instructions that upon execution cause a processor to: determine, by a network device, path information for a plurality of paths in a computing fabric, the path information identifying alternative paths to access namespaces; determine, by the network device, a first portion of the path information that is associated with a first host; and provide, by the network device the first portion of the path information to the first host.
    Type: Grant
    Filed: July 30, 2019
    Date of Patent: December 29, 2020
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Krishna Babu Puttagunta, Rupin Mohan, Vivek Agarwal, Curtis C. Ballard
  • Patent number: 10872049
    Abstract: Disclosed herein are systems and techniques for general purpose input/output (GPIO)-to-GPIO communication in a multi-node, daisy-chained network. In some embodiments, a transceiver may support GPIO between multiple nodes, without host intervention after initial programming. In some such embodiments, the host may be required only for initial setup of the virtual ports. In some embodiments, GPIO pins can be inputs (which may change virtual ports) or outputs (which may reflect virtual ports). In some embodiments, multiple virtual ports may be mapped to one GPIO output pin (with the values OR'ed together, for example). In some embodiments, multiple GPIO input pins may be mapped to one virtual port. For example, multiple GPIO input pin values may be OR'ed together, even if they come from multiple nodes.
    Type: Grant
    Filed: January 20, 2017
    Date of Patent: December 22, 2020
    Assignee: ANALOG DEVICES, INC.
    Inventors: Martin Kessler, William Hooper, Lewis F. Lahr
  • Patent number: 10866911
    Abstract: A method for establishing a connection in a non-volatile memory system is provided. A connection to a host is established. A request message with a target parameter of an NVM subsystem is received. A target NVM subsystem that meets the target parameter is determined. Routing information of the target NVM subsystem is determined. A response message that includes the routing information of the target NVM subsystem is sent. According to the method for establishing a connection in a non-volatile memory system, the host can establish a connection to an NVM subsystem that meets a requirement to improve connection reliability.
    Type: Grant
    Filed: October 25, 2018
    Date of Patent: December 15, 2020
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Xin Qiu, Chunyi Tan
  • Patent number: 10852980
    Abstract: Techniques for performing data migration may include: receiving host information regarding hosts registered on a source data storage system; issuing registration commands from a host to a target data storage system; determining, at the target data storage system in accordance with the registration commands, a host registration table including a corresponding entry for the host, the corresponding entry denoting a host name for the host and initiators of the host that sent the registration commands; and determining a masking view for the host on the target data storage system, the masking view including an initiator group of the initiators of the host that sent the registration commands to the target data storage system, wherein the masking view is used by the target data storage system to determine whether to service received I/O operations.
    Type: Grant
    Filed: January 19, 2018
    Date of Patent: December 1, 2020
    Assignee: EMC IP Holding Company LLC
    Inventors: Michael E. Specht, Subin George, Arieh Don
  • Patent number: 10824745
    Abstract: In an operating system with access control functionality, a request for a function that requires kernel space access can be initiated by an application and executed in the kernel space using a management mechanism having access to the kernel space. An application container within which the application executes includes a signaling mechanism permitted to access a message bus external to the application container using an access control policy of the operating system. The signaling mechanism signals that a message associated with the request is to be processed with kernel space access. An access control policy of the operating system permits the signaling mechanism to access a message bus used to transmit the message to the management mechanism. The management mechanism executes the function in the kernel space responsive to receiving the message from the message bus and determining that the function requires kernel space access.
    Type: Grant
    Filed: April 19, 2017
    Date of Patent: November 3, 2020
    Assignee: ServiceNow, Inc.
    Inventor: Jeremy Norris
  • Patent number: 10817390
    Abstract: A transactional memory system uses a volatile memory as primary storage for transactions. Data is selectively stored in a non-volatile memory to impart durability to the transactional memory system to allow the transactional memory system to be restored to a consistent state in the event of data loss to the volatile memory.
    Type: Grant
    Filed: September 14, 2011
    Date of Patent: October 27, 2020
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Mehul A. Shah, Stavros Hartzopoulos, Arif A. Merchant, Mohit Saxena
  • Patent number: 10798653
    Abstract: A system for managing power on distributed devices may include a first device having a master logic and a second device having a slave logic. The master logic may enable the first device to communicate with multiple devices having the slave logic on one or more channels. The slave logic may enable the second device having the slave logic to communicate with the first device and to communicate with a third device having the slave logic. The slave logic may enable the multiple devices having the slave logic to manage operations of the distributed devices.
    Type: Grant
    Filed: February 4, 2019
    Date of Patent: October 6, 2020
    Assignee: Kinetic Technologies
    Inventors: William Robert Pelletier, Brian B. North, Stephen E. Parks
  • Patent number: 10771551
    Abstract: The present disclosure involves systems, software, and computer implemented methods for performing dynamic topology switch in a failover operation. In one example, a failover of a first node is determined. The first node includes a first data server and a first replication server. At least one user application connects to the first data server prior to the failover of the first node. In response to the determined failover, the at least one user application is connected to a second data server of a second node. The second node includes the second data server and a second replication server. Prior to the failover of the first node, a data replication topology of the second node is a remote topology. During the failover, if the first replication server on the first node is down, the data replication topology of the second node is switched from the remote topology to a local topology.
    Type: Grant
    Filed: March 28, 2017
    Date of Patent: September 8, 2020
    Assignee: SAP SE
    Inventors: Zheng-Wei Wang, Jian Luo, Yi Chen, Weizhong Qiu, Huizi Liu, Du Xue
  • Patent number: 10719484
    Abstract: Metadata of a root node from a serialized representation of a file system metadata tree data structure is obtained. A representation of the root node that references a stub intermediate node that is a placeholder for an intermediate node stored in the serialized representation is created. A request to access data of a leaf node in a tree path including the intermediate node is received. In response to the request, metadata of the intermediate node is obtained from serialized metadata representation.
    Type: Grant
    Filed: September 29, 2017
    Date of Patent: July 21, 2020
    Assignee: Cohesity, Inc.
    Inventors: Venkata Ranga Radhanikanth Guturi, Tushar Mahata, Praveen Kumar Yarlagadda
  • Patent number: 10656877
    Abstract: An exemplary embodiment disclosed herein is a method including a virtual storage controller receiving an input/output (I/O) command using a native drive communications protocol from a software application on a user virtual machine running on the host machine; determining whether a local service virtual machine is unresponsive to the virtual storage controller; translating the I/O command from the native drive communications protocol to an IP-based storage communications protocol to create a translated I/O command, in response to the local service virtual machine being unresponsive to the virtual storage controller; sending the translated I/O command to a remote service virtual machine, wherein the remote service virtual machine is configured to send the translated I/O command to a local storage and receive a response from the local storage; and receiving the response from the remote service virtual machine.
    Type: Grant
    Filed: December 5, 2017
    Date of Patent: May 19, 2020
    Assignee: NUTANIX, INC.
    Inventors: Felipe Franciosi, Miao Cui
  • Patent number: 10649857
    Abstract: Techniques are disclosed for dynamically changing a data protection plan based on a risk score. The risk score is continuously or periodically recalculated based on situational factors that are detected from external modules. The situational factors can include natural phenomena such as weather, fire, and seismic activity. The situational factors can include manmade phenomena such as financial conditions, political stability in the region where the data resides, war, terrorist attacks, and the like. The situational factors are retrieved from one or more external modules. The external modules may be IoT (Internet of Things) modules. The external modules are monitored, and as new data from the external modules becomes available, a risk score for stored data is computed. The risk score is then used to select an appropriate data protection plan.
    Type: Grant
    Filed: January 4, 2017
    Date of Patent: May 12, 2020
    Assignee: International Business Machine Corporation
    Inventors: Adam Banasik, Tomasz M. Gasiorowski, Daisy Mae L. Jose, Geri D. McGrath
  • Patent number: 10649659
    Abstract: A method of operating a storage system is disclosed. The method includes determining a storage cluster among storage arrays of the storage system. Each storage array includes at least two controllers and at least one storage shelf. The at least two controllers are configured to function as both a primary controller for a first storage array and a secondary controller for a second storage array.
    Type: Grant
    Filed: March 11, 2019
    Date of Patent: May 12, 2020
    Assignee: Pure Storage, Inc.
    Inventor: Ori Shalev
  • Patent number: 10642789
    Abstract: In one example, a request for storage of an extended attribute (EA) of a file system object is received. A storage location for the EA is determined from a plurality of storage locations, based on one or more characteristics of the EA, the plurality of storage locations including an inode, a first storage file accessible by a first B+ tree, and a second storage file accessible by a second B+ tree. The EA is accordingly stored in the determined storage location.
    Type: Grant
    Filed: January 15, 2015
    Date of Patent: May 5, 2020
    Assignee: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
    Inventors: Padmagandha Panigrahy, Abhay Sachan, Chaitanya Narra, Amarish Shapur Venkateshappa, Venkataraman Kamalaksha, Anil Kumar Boogarapu, Rajagopal Chellam
  • Patent number: 10599522
    Abstract: Provided are a computer program product, system, and method for generating a chain of a plurality of write requests including a commit wait flag and plurality of write requests. The commit wait flag is set to one of an indicated first value or a second value. The commit wait flag is set to the first value to cause a storage server to process the write requests by requiring a current write request being processed to complete before transferring data for a next write request following the current write request. The commit wait flag is set to the second value to cause the storage server to process the write requests by transferring data for the next write request before completing the current write request preceding the next write request. The write request chain is sent to the storage server to apply the write requests to the storage.
    Type: Grant
    Filed: May 8, 2018
    Date of Patent: March 24, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jeffrey A. Berger, Susan K. Candelaria, Matthew J. Kalos, Beth A. Peterson, Harry M. Yudenfriend
  • Patent number: 10582634
    Abstract: Mechanisms are provided for cabling a set of enclosures. Using a set of cables that comprises eight physical layers (PHYs), the set of enclosures are coupled together such that: for a first enclosure and each intermediate enclosure in the set of enclosures, at least four PHYs of the eight PHYs terminate within a Serial Attached Small Computer System Interface (SCSI) (SAS) expander of the first enclosure and a SAS expander of each intermediate enclosure white passing through a remaining four PHYs of the eight PHYs without connecting to the respective SAS expander; and, for a last enclosure in the set of enclosures, all of the eight PHYs terminate in the SAS expander of the last enclosure.
    Type: Grant
    Filed: June 20, 2016
    Date of Patent: March 3, 2020
    Assignee: International Business Machines Corporation
    Inventors: Daniel S. Critchley, Gordon D. Hutchison, Gareth P. Jones, Jonathan W. L. Short
  • Patent number: 10572386
    Abstract: A computer-implemented method, according to one embodiment, includes: receiving an operation request which corresponds to a given object, identifying multiple block addresses which are associated with the given object, determining whether any one or more of the identified block addresses have a token currently issued thereon, and combining the multiple block addresses to a first set in response to determining that at least one token is currently issued on one or more of the identified block addresses. A first portion of the block addresses determined as having a token currently issued thereon is transitioned to a second set. A remaining portion of the block addresses is also divided into equal chunks. The chunks are allocated in the first set across parallelization units, and the block addresses in the second set are divided into equal chunk. Furthermore, the chunks in the second set are allocated to a dedicated parallelization unit.
    Type: Grant
    Filed: September 12, 2018
    Date of Patent: February 25, 2020
    Assignee: International Business Machines Corporation
    Inventors: Amey Gokhale, Ranjith R. Nair, Sandeep R. Patil, Sasikanth Eda
  • Patent number: 10545678
    Abstract: A shared storage system includes a plurality of storage processors. A first storage processor of the plurality of storage processors is coupled with a shared storage device having a plurality of storage devices. The first storage processor receives a first verify connectivity request from an initiator device. In response to the first verify connectivity request, the first storage processor transmits a first ready response to the initiator device. After transmitting the first ready response, the first storage processor detects that the first storage processor is decoupled from the shared storage device. In accordance with detecting that the first storage processor is decoupled from the shared storage device, the first storage processor transmits a not-ready response to the initiator device in response to a second verify connectivity request from the initiator device.
    Type: Grant
    Filed: April 19, 2017
    Date of Patent: January 28, 2020
    Assignee: SanDisk Technologies LLC
    Inventors: Bart Joris A. Van Assche, Mark Ruijter