Abstract: An operation parameter determination apparatus (101) has an ID detecting unit (107) to detecting a plurality of ID codes by using a non-contact ID reader (102), an ID/operation parameter table (105) describing correspondence between ID codes and operation parameters, an operation parameter retrieval unit (106) to refer to the ID/operation parameter table (105) to retrieve operation parameters corresponding to the respective detected ID codes, and an operation parameter integration unit (109) to, if there are operation parameters inconsistent with each other among the retrieved operation parameters, adjust the parameters to consistent with each other to solve inconsistency.

Abstract: In a control apparatus for an automobile with a microcomputer, the control software stores the type of the terminal pin allocated to each control function in the fixed storage section, in a non-fixed state by using a terminal pin variable, in order to alter an allocation arrangement of the terminal pin to the control function. A rearrangement table showing the allocation arrangement of the terminal pin to the control function is stored in a rearrangement table storage section. An allocation content of the terminal pin to each control function is read out from the rearrangement table memory section and specific information of a corresponding terminal pin is substituted into the terminal pin variable corresponding to the each control function included in the control software, based upon the allocation content.

Abstract: A method for separating multiple home networks networked in one communication line into each home network is disclosed, which includes the steps of forming home network for networking apparatuses in the house to communicate with one another, setting individual home codes to each apparatus, connecting the home networks formed in a plurality of houses to one another, and forming packet data including the home codes for communicating.

Abstract: A configuration of an electronic device (400) is managed by obtaining (1005) stakeholder attributes of a component resident in the electronic device from stakeholder requirements (FIGS. 7, 8) of one or more stakeholders and correlating (1020) the respective stakeholder attributes as well as available sets of values of attributes of the component to determine (1025) a set of selected values of the attributes, and establishing (1030) at least a portion of a new configuration of the electronic device using the set of selected values of the attributes of the component. When the stakeholder requirements cannot be met with an existing application in the electronic device, the application may be formed (1200) from components of existing applications.

Abstract: A method of virtualizing hardware resources in a multiprocessor computing environment is provided. Each resource is provided a resource address. A hardware resource map is provided to store virtual resource addresses and physical resource addresses. Remapping hardware is utilized to redirect virtual addresses to physical addresses. The method of virtualizing hardware resources may be applied to any resource mapped across the bus, including memory address space, and I/O address space. Accordingly, the method of virtualizing hardware resources through platform firmware enables dynamic routing of resource accesses during run-time.

Abstract: A system and method for determining media to be exported out of a media library is described. In some examples, the system determines a media component to be exported, determines the media component is in the media library for a specific process, and exports the media component after the process is completed.

Abstract: The present invention provides a device and method for mitigating performance degradation caused by SATA drives attached to a SAS domain. In one of the embodiments of the present invention, a SATA degradation mitigation device (“SDMD”) is installed between a SAS domain and one or more SATA drives. The SDMD effectively reduces congestion on intermediate links by buffering SATA data and transmitting the data at a rate which is higher than the rate at which the SATA data is received from a drive. Conversely, write data from the SAS domain may be buffered at the SDMD at a higher rate and subsequently sent to the SATA drive at a lower rate. This SATA data buffering and subsequent increase in data rate improves the overall efficiency of a SAS domain storage system by reducing data congestion arising out of low-performance SATA drives clogging the intermediate links.

Abstract: The invention disclosed herein concerns methods and apparatus for implementing dynamic shortcuts for use in navigating web content and application program windows. In particular, the methods and apparatus of the invention allow a user to associate one or more items selected from web content or application program windows with a dynamic shortcut. In one aspect of the invention, a user assigns a keyboard shortcut to one or more web pages viewed during the browsing session. Once assigned a keyboard shortcut, the one or more web pages can be rapidly accessed using the keyboard shortcut. In variations of the invention, the one or more web pages may be assigned an icon accessible from, for example, the desktop. In other aspects of the invention the keyboard shortcut or icon is associated with content or resources derived from multiple sources; such as, for example, web pages located using a browser and application program windows spawned using an application program.

Abstract: Methods and systems for customizing information in a memory associated with a SAS host bus adapter (“HBA”). A SAS HBA typically includes a memory component that stores information common to all SAS HBA's manufactured by a particular vendor (e.g., common instructions and data). In addition, each HBA memory component typically includes some information unique to each HBA (e.g., board trace number, SAS address, configuration page, boot record, etc.). Features and aspects hereof permit pre-programmed memory components to be integrated with a SAS HBA to eliminate a step to program an assembled HBA through a specialized, one-time interaction to add required unique information. Thus a manufacturer may simply integrate a pre-programmed memory component to an otherwise completed HBA assembly to complete the product manufacturing without need for a special programming step. Or a design or test engineer may simply replace a memory component to change unique information on the HBA.

Abstract: In accordance with certain aspects of the automatic protocol determination for portable devices supporting multiple protocols, a portable device detects which one of the multiple protocols is being used by the host device for subsequent communication with the portable device. This detection is based on the content of a command received from a host device. The detected protocol is then used by the portable device for subsequent communication with the host device. The host device may also send, to the portable device, a notification of which of the multiple protocols is being used by the host device.

Abstract: Method and apparatus for dynamic provisioning of a Mobile Station (MS) to provide server configuration information. In one embodiment, a home network determines whether to use the visited local network or the home network. An indicator selecting the associated server is transmitted. The server is for session control, such as Session Initiation Protocol (SIP) control of voice over Internet Protocol (IP) communications.

Abstract: A method for limiting the size of a local storage of a processor is provided. A facility is provided in association with a processor for setting a local storage size limit. This facility is a privileged facility and can only be accessed by the operating system running on a control processor in the multiprocessor system or the associated processor itself The operating system sets the value stored in the local storage limit register when the operating system initializes a context switch in the processor. When the processor accesses the local storage using a request address, the local storage address corresponding to the request address is compared against the 1ocal storage limit size value in order to determine if the local storage address, or a modulo of the local storage address, is used to access the local storage.

Abstract: Embodiments of the present invention provide a method, system and computer program product for generating scalable addressing for expansion units. The method, system and computer program product for generate scalable addressing for an expansion unit is provided. The method, system and computer program product can include detecting a multiplexer of an expansion unit via a serial bus (e.g., an I2C bus), setting an address for the multiplexer of the first expansion unit, and upon accessing the multiplexer, switching the multiplexer to a first position to pass the serial bus to a second expansion unit to detect a multiplexer of the second expansion unit. The method can further include attempting to access the multiplexer of the second expansion unit and upon accessing the multiplexer of the second expansion unit, incrementing the address of the multiplexer of first expansion unit to set the address for the multiplexer of the second expansion unit.

Abstract: A system and method for registering combinations of physical and/or virtual functions for configuring an endpoint are provided. With the system and method, a mechanism informs a management component of a multifunction endpoint's functional combinations. The management component may then use this information to select the functional combinations that are to be made visible to each system image. The informing of the management component may be performed by writing values to various predefined fields in a configuration space for a physical or virtual function that provides information regarding the number of virtual functions supported, the combination of functions supported, a nominal combination of virtual functions to be used by the physical function, and a group identifier for identifying which functions are linked in a combination grouping.

Abstract: An area efficient system that includes a first circuit to synchronize a clock signal and a data signal and a data retaining and processing device to receive data from said data bus to thereby generate a status signal indicating the receipt of data by said area efficient system; a reference bus address and said data bus. The system also includes a device to compare the reference bus address with the content of memory for generating an address matching signal and a control signal generator to govern the data write signal generation for said shifting means. The system further includes a sequencer to read and write data from/to said data retaining and processing device in a plurality of subcycles for efficiently accessing storage buffers and a direct storage access controlling means for generating interrupt signals and access request signals.

Abstract: Embodiments of the present invention address deficiencies of the art in respect to computing device location and provide a novel and non-obvious method, system and computer program product for visually locating a computing device. In one embodiment of the invention, a computing device location method can include establishing filter criteria grouping different computing devices by common characteristic, wirelessly broadcasting the filter criteria in a discovery request to in range peripheral locators coupled to computing devices, aggregating a list of discovered peripheral locators meeting the filter criteria, selecting at least one of the peripheral locators in the list, and interrogating the selected peripheral locators to retrieve data provided by corresponding ones of the computing devices. Additionally, a display element in each of the discovered peripheral locators can be illuminated upon discovering the peripheral locators.

Abstract: A configurable interface system (100) couples an accessory (102) to a communication device (104). The interface system utilizes a memory device (120) embedded in the accessory (102) that stores physical configuration and event mapping descriptors (114, 122) pertaining to the accessory. The communication device (104) reads the physical configuration and event mapping descriptors and configures its external interface (112) in response thereto, preferably through the use of bi-directional GPIO lines (110).

Abstract: An apparatus and method capable of performing multiple tasks in a portable terminal are provided, in which menu functions of the portable terminal can be implemented while continuing to play the music. The multi-tasking apparatus includes a controller for performing controlling to implement at least one menu function while playing a music file and a display unit for displaying an indication that the music file is being played during the implementation of the menu function.

Abstract: An information processing apparatus which makes it easier to carry out setting of a wireless interface necessary for enabling a device or apparatus to be used via the wireless interface, using a wire interface. An information processing apparatus carries out first communication setting so as to enable an apparatus or device to be controlled via a wire interface, communicates with the apparatus or device via the wire interface after the first communication setting to carry out second communication setting for enabling communication with the apparatus or device via a wireless interface. This simplifies the communication setting for enabling communication with the apparatus or device via the wireless interface.

Abstract: Assigning addresses to legacy sharing at least one signal line with a plurality of client devices. Each of the devices includes a number of I/O pins selected ones of which are connected to the at least one signal line and each client device includes a first and a second initialization pin. In the described embodiment, all but a first one of the plurality of client devices are connected to one another in a daisy chain arrangement by way of the first and the second initialization pin separate from the signal line. A first client device has a first initialization pin that is independently held at a first logic level and a second initialization pin that is connected to the daisy chain arrangement. The first one of the client devices is initialized and, in turn, triggers initialization of the daisy chained client devices. The legacy device is initialized separately from the client devices.

Abstract: Provided is a method for removing alias addresses from an alias address pool. A plurality of alias addresses are assigned to an alias address pool, wherein the alias addresses in the alias address pool are capable of being dynamically assigned to a device to service I/O requests to the device. An operation is initiated by a process to remove a specified alias address from the alias address pool. An indicator is set to prevent additional processes from removing one alias address from the alias address pool in response to initiating the operation. The specified alias address is removed from the alias address pool.

Abstract: An electronic network is disclosed. One embodiment includes a plurality of network devices, a bus for transferring data between the network devices and a bus master for controlling the transfer of data between the network devices. Each network device is identified using one unique identification code. At least one number generator is provided, which is adapted to generate a number upon a request from the bus master. The received number is used as identification code of the respective network device.

Abstract: Method and system for latency-independent peripheral device identification. The computer system receives an interrupt from a peripheral device via a communications port. In response, an interrupt notification message is posted to alert a notification handler, and compliant peripheral class is determined. The voltage on a device may sense pin of the communications port for this determination. If the interrupt is indicative of the compliant peripheral class and the communications port is inactive, the port is opened, and an inquiry is sent and a response is received. If a response is received within a predetermined time period, an identification notification message is posted based on the response including information for classifying the peripheral device, so that a software handler registered with the operating system can handle the identification notification message when the software handler receives it. Thus, no time-critical interrupt response requirement is imposed for its successful operation.

Abstract: An information processing apparatus which makes it easier to carry out setting of a wireless interface necessary for enabling a device or apparatus to be used via the wireless interface, using a wire interface. An information processing apparatus carries out first communication setting so as to enable an apparatus or device to be controlled via a wire interface, communicates with the apparatus or device via the wire interface after the first communication setting to carry out second communication setting for enabling communication with the apparatus or device via a wireless interface. This simplifies the communication setting for enabling communication with the apparatus or device via the wireless interface.

Abstract: A method and circuit for enhancing the performance in a serial ATA interface uses a standard ATA queue automation circuitry that handles all the transmit/receive frame information structure (FIS) operations for ATA queue commands without interrupting the higher-level software and associated hardware, firmware, and drivers. If the standard ATA queue automation circuitry and command queues are not provided, then every FIS operation will interrupt the higher layer application program. The standard ATA queuing automation circuit preprocesses higher layer commands to write into the task file registers before initiating the transport layer for an FIS transmission and provides information regarding the success or failure of a command. Commands to be executed and completion command queues are preferably used to improve the performance further.

Abstract: A method of interacting with a speech recognition (SR)-enabled personal computer (PC) is provided in which a user SR profile is transferred from a wireless-enabled device to the SR-enabled PC. Interaction with SR applications, on the SR-enabled PC, is carried out by transmitting speech signals wirelessly to the SR-enabled PC. The transmitted speech signals are recognized with the help of the transferred user SR profile.

Abstract: A mechanism, method and computer usable medium is provided for each root node of a multiple root node system and its own independent address space. This mechanism also allows multiple system images within the same root node to have their own independent address spaces. A mechanism is also provided for incorporating legacy root node and input/output adapters that are non-aware of the mechanisms introduced by this invention. Input/ output adapters which implement this invention may also have the number of functions that they support greatly expanded beyond the present eight functions per input/output adapter.

Abstract: A system for providing dynamic queue splitting to maximize throughput of queue entry processing while maintaining the order of queued operations on a per-destination basis. Multiple queues are dynamically created by splitting heavily loaded queues in two. As queues become dormant, they are re-combined. Queue splitting is initiated in response to a trigger condition, such as a queue exceeding a threshold length. When multiple queues are used, the queue in which to place a given operation is determined based on the destination for that operation. Each queue in the queue tree created by the disclosed system can store entries containing operations for multiple destinations, but the operations for a given destination are all always stored within the same queue. The queue into which an operation is to be stored may be determined as a function of the name of the operation destination.

Abstract: A method and apparatus are provided for dynamically determining a primary adapter in a heterogeneous N-way adapter configuration. Each of the adapters generates information about itself and exchanges the information with all other adapters. First a decision-making adapter is identified. Then the decision-making adapter compares the adapter-generated information of all the adapters and makes a decision determining the primary adapter. The decision-making adapter communicates the decision to all other adapters. The determined primary adapter assumes a role as the primary adapter and the other adapters assume a role as a secondary adapter.

Abstract: An apparatus and method for enumeration of processors during hot-plug of a compute node are described. The method includes the enumeration, in response to a hot-plug reset, of one or more processors. The enumeration is provided to a system architecture operating system in which a compute node is hot-plugged. Once enumeration is complete, the compute node is started in response to an operating system activation request. Accordingly, once device enumeration, as well as resource enumeration are complete, the one or more processors of the processor memory node are activated, such that the operating system may begin utilizing the processors of the hot-plugged compute node.

Abstract: Embodiments of the invention provide a method and apparatus for initializing a computer system, wherein the computer system includes a processor, a volatile memory, and a non-volatile memory. In one embodiment, the method includes, when the computer system is initialized, automatically copying initialization code stored in the non-volatile memory to the volatile memory, wherein circuitry in the volatile memory automatically creates the copy, and executing, by the processor, the copy of the initialization code from the volatile memory.

Abstract: Provided is a method, system, deployment and program for resource allocation unit queuing in which an allocation unit associated with a task is classified. An allocation unit freed as the task ends is queued for use by another task in a queue at a selected location within the queue in accordance with the classification of said allocation unit. In one embodiment, an allocation unit is queued at a first end of the queue if classified in a first class and is queued at a second end of the queue if classified in said second class. Other embodiments are described and claimed.

Abstract: A method and apparatus for interfacing a personal digital assistant (PDA) with a communications appliance is provided. The method comprising a communication station receiving semi-structured data from a personal digital assistant (PDA) in a format native to the PDA, and parsing the semi-structured data to identify a type of the semi-structured data. If the semi-structured data is destination data, sending a job to a destination indicated by the semi-structured data.

Abstract: A method and an arrangement for configuration of a mobile appliance in a communication arrangement, with a communication address that is linked to its location in each case being assigned to the mobile appliance are provided. For this purpose, the location of the mobile appliance is determined in a first step, a configuration which is linked to the determined location is checked in a second step from a database, and this determined configuration is assigned to the mobile appliance in a third step.

Abstract: An IC assembly having a routing structure mounted on a PCB of an electronic apparatus includes a central IC mounted on a central portion of the PCB; and a plurality of peripheral ICs disposed adjacent to the central IC on the PCB, wherein each of the peripheral ICs is electrically connected to the central IC through at least one routing path formed there between. The IC assembly can reduce the size and thickness of the PCB.

Abstract: A remote controller is disclosed to include a housing, a control unit mounted in the housing, a communication unit mounted in the housing and electrically coupled to the control unit and controllable by the control unit to communicate with an external host and to download a control content from the external host, and a display unit, which is installed in housing and electrically coupled to the control unit, having a display zone for displaying the control content downloaded by the communication unit and a control zone for inputting instructions for enabling inputted instructions to be sent to a controlled device by the communication unit to drive the controlled device to execute the instructions.

Abstract: An optimized peripheral device configuration data sequential handling method and system is proposed, which is designed for use with a computer platform for providing the computer platform an optimized configuration data sequential handling function, which is characterized by the capability of performing a runtime data amount computing procedure for each set of the OPROM-embedded original configuration data from each connected peripheral device, such that an optimal handling sequence can be determined based on the runtime data amount for the handling of the configuration data in shadow RAM during initialization. This feature allows a shadow RAM unit having a limited capacity to support more peripheral devices at the same time, and also allows the utilization of the storage space of a shadow RAM to be more flexible and efficient.

Abstract: A reservation managing device 3 stores a demand for using a peripheral device 20a, if made by a network computer (NC) 10a, in a reservation list. A peripheral device server 1 releases, in response to an ending command from an NC 10n having used the peripheral device 20a, the use of the peripheral device 20a by the NC 10n. The peripheral device server 1 receives the ending command and permits the NC 10a to use the peripheral device 20a with reference to the reservation list. The peripheral device server 1 receives the data to the peripheral device 20a from the NC 10a having permitted, and gives the data to the peripheral device 20a. The peripheral device server 1 releases, in response to the ending command from the NC 10a having used the peripheral device 20a, the use by the NC 10a. By performing the reservation management and the cutting management, another NC is enabled, quickly after the end of the use of the peripheral device, to use the peripheral device.

Abstract: Methods and systems for allocating address space resources to resource requesting peripheral devices in an efficient manner. Resource requests are gathered for enumerated peripheral devices host by a computer platform. A map containing resource alignment requirements is built, and a virtual resource allocation map is computed based on aggregated resource requests and the alignment requirements. The resource aggregations are, in turn, based on a hierarchy of the peripheral devices. A bin-packing algorithm is employed to determine allocation of the resource requests so as to minimize resource address space allocations. The virtual resource map is then used to perform actual resource allocations. The resources include peripheral device I/O address allocation and peripheral device memory address allocations.

Abstract: Keyboard, mouse and video (KVM) capture session architecture that includes command center forensics. That is, redirector hardware (HW) and a command center forensics (CCF) appliance. The redirector HW includes a computer interface module (CIM) with a computer readable encoded media. The CIM is configured to record at least one KVM session. The computer readable encoded media is configured to instruct sending an identical copy of the recorded at least one KVM session to the CCF appliance. The CCF appliance being configured to store and playback the identical copy.

Abstract: A system and method is disclosed for the automatic assignment, or reassignment, of shared storage resources to blade computers in a blade server environment. A chassis manager is implemented as a processing entity on the mid-plane of a blade server chassis to provide, independently or in conjunction with other systems and/or attached storage devices, management of shared storage resources. Management of these resources includes, but is not limited to, creation of logical units, assignment of logical units to predetermined blade server chassis slots, and deletion of logical units. Host-based software is not required to assign shared resources to a computer blade, only its presence in a predetermined slot of a blade server chassis. Logical unit numbers (LUNs) are assigned by the chassis manager based on blade server slot IDs while host-unique identifiers, such as world wide names (WWNs) are used by one or more shared storage controllers for internal LUN addressing.

Abstract: A multi-ring memory controller sends request packets to multiple rings of serial flash-memory chips. Each of the multiple rings has serial flash-memory chips with serial links in a uni-directional ring. Each serial flash-memory chip has a bypassing transceiver with a device ID checker that bypasses serial packets to a clock re-synchronizer and bypass logic for retransmission to the next device in the ring, or extracts the serial packet to the local device when an ID match occurs. Serial packets pass through all devices in the ring during one round-trip transaction from the controller. The average latency of one round is constant for all devices on the ring, reducing data-dependent performance, since the same packet latency occurs regardless of the data location on the ring. The serial links can be a Peripheral Component Interconnect (PCI) Express bus. Packets have modified-PCI-Express headers that define the packet type and data-payload length.

Abstract: A communication controller of the present invention includes a descriptor cache mechanism which makes a virtual descriptor gather list from the descriptor indicted from a host, and which allows a processor to refer to a portion of the virtual descriptor gather list in a descriptor cache window. Another communication controller of the present invention includes a second processor which allocates any communication process related with a first communication unit of the communication processes to the first one of a first processors and any communication process related with a second communication unit of the communication processes to the second one of the first processors. Another communication controller includes a first memory which stores control information. The first memory includes a first area accessed by the associated one of processors to refer to the control information and a second area which stores the control information during the access.

Abstract: A method and structure manage a database. A first device that includes data is coupled to a second device that includes metadata relating to the data. The second device is removed from the first device and the metadata is modified. The second device is again coupled to the first device and the modified metadata on the second device modifies the data on the first device.

Abstract: A system and method for translating addressing protocols between two types of storage drives in a storage environment is provided. A storage environment may include a JBOD of Serial ATA drives coupled to a host server through an external SCSI connection. The addressing protocol of the host server will typically involve addressing each Serial ATA drive by a unique SCSI target ID. This addressing protocol of the host server is translated to an addressing protocol in which each Serial ATA drive is addressed through unique LUN identifier and a single SCSI target ID, which is the addressing scheme of some SCSI-based peripheral controllers.

Abstract: A method, computer program product, and distributed data processing system that enables host software or firmware to map PCI adapter virtual resources to PCI bus addresses that are associated with a system image is provided. Virtual addresses maintained in a protection table segment assigned to a system image are mapped to physical addresses defined in entries of an address table segment assigned to the system image. Discontiguous memory regions identified in entries of the address table segment may thus be mapped to a contiguous virtual address space.

Abstract: A method and apparatus is provided for validating a plurality of variable data transmitted in an automobile, comprising generating a control copy and a redundant copy of the variable data, calculating a pre-transmittal cross-check measure using the redundant copy of the variable data, and generating a transmittal message using the control copy of the data and the pre-transmittal cross-check measure.

Abstract: Techniques for synchronizing use of buffer descriptors for data, such as packets transmitted over a network, include receiving private index data that indicates a particular buffer descriptor owned by a DMA controller, for moving data between a data port and a corresponding memory buffer. A write command is placed on a memory exchange queue to change the owner to a different processor and the private index data is incremented. A public index is determined, which indicates a different buffer descriptor in which the owner is most recently changed to the processor and is known to be visible to the processor. In response to receiving a request from the processor for the most recent buffer descriptor changed to processor ownership, the public index data is sent to the processor. Based on the public index data, the processor exchanges data with buffer descriptors guaranteed to be owned by the processor.

Abstract: A system to provide link-local IPv4 addressing across multiple interfaces of a network-node. The network-node broadcasts an Address Resolution Protocol (ARP) request packet on multiple interfaces which asks for the hardware address of a network node whose link-local IPv4 address is Y. In response, the network-node receives an ARP-reply packet on an interface from a target network-node. If Y is present in the ARP cache and is associated with a different interface, the source network-node chooses a winner interface, and updates the ARP cache so that Y is associated with the winner interface. The network-node sends one or more contention-resolution packets on the loser interface to cause a loser network-node to choose another link-local IPv4 address for itself.

Abstract: A PCI Express-compatible flash device can include one or more flash memory modules, a controller, and an ExpressCard interface. The controller can advantageously provide PCI Express functionality as well as flash memory operations, e.g. writing, reading, or erasing, using the ExpressCard interface. A PIO interface includes sending first and second memory request packets to the flash device. The first memory request packet includes a command word setting that prepares the flash device for the desired operation. The second memory request packet triggers the operation and includes a data payload, if needed. A DMA interface includes sending the second memory request from the flash device to the host, thereby triggering the host to release the system bus for the DMA operation.