Abstract: A method of transmitting a stream of data bits from a memory card to a host device includes determining, at the memory card, a first number of data lines between the memory card and the host device, from one to a plurality of data lines. If the first number of data lines is determined to be a plurality of data lines, the method includes switching, at the memory card, the data stream between one of the first number of data lines and another of the first number of data lines after each occurrence of a second number of one or more bits of the data stream having passed toward the host device. The method also includes, if the first number of data lines is determined to be one data line, transmitting, from the memory card, the stream of data bits over the one data line to the host device.

Abstract: A method for reducing computer system power consumption. The computer system includes a memory module having a plurality of address pins, and a chipset having a plurality of driving units for driving the address pins. The method includes obtaining number of required address pins by detecting a capacity of the memory module, and disabling the driving units so as to make a number of the active driving units substantially equal to the number of the required address pins.

Abstract: A memory controller is unaware of device types of a plurality of memory devices in a serial interconnection configuration. Possible device types include, e.g., random access memories (DRAM, SRAM, MRAM) and NAND-, NOR- and AND-type Flash memories. Each device has device type information on its device type. Each device is capable of performing a “+1” to an input search number. First, the memory controller sends a specific device type (“don't care”) and an initial search number. Each device performs the “+1” calculation. The last device provides the memory controller with an Nד+1” search number from which the memory controller can recognize the total number of devices in the serial interconnection configuration. Thereafter, the memory controller sends a pre-determined device number for device type matching.

Abstract: A method for assigning addresses to nodes of a bus system, and installation, bus nodes being furnished with an identical delivery address, where (i) an assigning entity, particularly a central computer, start-up computer or bus node sends information to the delivery address via the bus system, (ii) the information includes a first address, (iii) an action is performed whose effect is detected by a first bus node, (iv) the first bus node accepts the first address, (v) the first bus node sends a response to the assigning entity, and (vi) steps (i) through (v) are repeated, each time with a further address for a further bus node.

Abstract: Techniques for enabling software-assisted assignment of control of peripherals (e.g., assigning ownership of or assigning access to the peripherals) by a computing device. In accordance with techniques described herein, assignment of control of peripherals is aided by input from software facilities that instruct a peripheral management facility regarding assignment of peripherals. Software facilities may instruct the peripheral management facility in different ways. In some cases, a software facility may instruct the peripheral management facility how to assign control of a peripheral in a particular way, while in other cases a software facility may instruct the peripheral management facility how to assign control of a group of peripherals. In other cases, a software facility may not instruct a peripheral management facility how to assign control of peripherals, but may identify one or more groups of peripherals for which control should be assigned as a group.

Abstract: During an initial generation/assignment of location codes for field replaceable units (FRUs) that are and/or may be attached to the computer system, the service processor provides an alias location code for each FRU not currently attached. When the service processor later detects a concurrent install of the FRU, the service processor's firmware generates the correct location code from data retrieved from the FRU, and replaces the alias location code stored within the service processor's internal data structures with the correct location code. The firmware also forwards the correct location code back to a serviceability application, and the application utilizes the new location code in all remaining concurrent install commands to maintain a single, consistent view of the system.

Abstract: Described herein are systems and methods for device management, and more particularly systems and methods for auto addressing in a control network. For example, some embodiments relate to procedures and protocols implemented in the context of a building management system thereby to allow auto addressing of IO devices. In one embodiment, each IO device includes a respective engineering data key (EDK), which is indicative of device data such as the device type and function. This EDK is combined with a generated number thereby to define a device identification code that has significant chances of uniqueness. The device identification code is communicated to a controller to which the IO device connects in a bus-based topology. The controller uses the identification code to assign a network address to the IO device, using a stored repository of network addresses available for such assignment.

Abstract: In described embodiments, a method of generating an identifier for a disk includes the steps of requesting an ASCII identification string for the disk and generating a padded string by processing the ASCII identification string into a predetermined number of bytes. The padded string is divided into portions and an encoded value is generated for each portion. The two or more encoded values for the portions are combined into a candidate value compatible with a World-Wide Name (“WWN”). The candidate value is compared to a list of previously generated candidate values and if the candidate value differs from the values in the list, the candidate value is included in the list of generated values and the candidate value is provided as the system-wide name for the disk.

Abstract: Provided are systems and methods to communicate data transfer of data between a disk device and an external storage device. A host can generate a control command to communicate with an external storage device, and a disk device to receive the control command from a host to identify and communicate with an external storage device when connected to the external storage device and to configure the external storage device by assigning an ID code to each storage area of the external storage device.

Abstract: An ultrasound measurement system including a handheld display and processing means, an ultrasound transducer, a processing means of a substantially similar weight to the handheld display and processing means, and a transmission cable interconnecting the handheld display and processing means with the ultrasound transducer and processing means, the cable being of sufficient length to provide a means to mechanically locate the system around the neck of a user.

Abstract: A modular distributed I/O system for an industrial automation network that allows one or more modules of an island to be omitted without requiring reconfiguration of the system by maintaining a consistent I/O image representation of the distributed I/O network for various physical distributed I/O configurations and managing reconfiguration changes remotely using Virtual Placeholder objects.

Abstract: A controller including an interface module and an index module. The interface module is configured to connect devices. The index module is configured to include, in a table stored in memory, an entry for each of the devices. Each entry includes an address field. The index module is configured to: receive a frame of data including an address of one of the devices; compare the address to the address fields associated with the entries in the table; in response to the address matching one of the address fields, access an index value identifying an entry of the table when the address matches one of the address fields; and in response to the address not matching one of the address fields, generate the index value. The index value is used to connect the device associated with the matching one of the address fields with the one of the devices.

Abstract: A memory module comprises a plurality of semiconductor memory devices each having a termination circuit for a command/address bus. The semiconductor memory devices are formed in a substrate of the memory module, and they operate in response to a command/address signal, a data signal, and a termination resistance control signal.

Abstract: A method of bridging a plurality of buses within a bus bridge can include determining whether a queue of the bus bridge includes a transaction request directed to a restricted address range and, for each received transaction request, determining whether an address to which the transaction request is directed is within the restricted address range. Each transaction request received by the bus bridge can be selectively rejected according to whether the address to which the transaction request is directed is within the restricted address range and whether the queue includes a transaction request directed to the restricted address range.

Abstract: A system and a method for determining a bus address for a controller within a network are provided. The method includes coupling a first set of pins of a wire harness connector to a second set of pins of a PCB connector of the controller. The method further includes sampling voltages of a portion of the first set of pins of the PCB connector to determine a wire harness ID utilizing a microprocessor. The method further includes accessing a look-up table from a memory device to select the bus address for the controller using the wire harness ID utilizing the microprocessor. The look-up table includes a plurality of bus addresses correspondingly associated with a plurality of wire harness IDs. The method further includes storing the selected bus address in the memory device utilizing the microprocessor.

Abstract: Unique addresses for a plurality of devices may be programmed through a single external connection (pin) on each device by using a one of a plurality of different analog voltage or current values on the single external pin in combination with a serial clock of a serial data bus for each device requiring a unique binary address. The unique binary address is stored in the device after detection of certain number of clocks on the serial data bus. Once the unique binary address has been stored in the device, the single external connection may be used for another purpose such as a multifunction external connection. This unique binary address may be retained by the device until a power-on-reset (POR) or general reset condition occurs. Address detection and address load commands on the serial bus may also perform the same address definition and storage functions.

Abstract: A distribution apparatus includes a firmware distribution unit distributing firmware corresponding to a post-update version of firmware included in an acquisition request to an image processing apparatus; a determination unit determining whether migration of setup information stored in a storage unit in the image processing apparatus is necessary in the update of the firmware from a pre-update version currently applied to the image processing apparatus to the post-update version on the basis of the pre-update version, the post-update version, and data on the setup information in which combinations of the versions of firmware are associated with information indicating whether the migration of the setup information is necessary; and a setup-migration-program distribution unit distributing a setup migration program involved in the migration of the setup information to the image processing apparatus if the determination unit determines that the migration is necessary.

Abstract: In an information processing device according to the present invention, in the case of acquiring a setting value by using a protocol, a setting value acquired from a server by using the protocol is stored into a storage area for storing a setting value designated by a user.

Abstract: A system (100) capable of configuring an electrical device (101) coupled to a computer (102), the system includes: (a) a computer communications component (111) of the electrical device configured to communicate with the computer; and (b) an installation component (120) of the electrical device capable of an initial configuration the electrical device. In this embodiment, the installation component is configured to automatically begin the initial configuration of the electrical device as soon as the installation component detects the electrical device is not configured and the computer communications component establishes a data connection between the electrical device and the computer. Furthermore, the initial configuration of the electrical device includes an initial configuration of either a dynamic or non-dynamic network connection between the electrical device and a network provider.

Abstract: A method, computer program product, and distributed data processing system that allows a system image within a multiple system image virtual server to directly expose a portion, or all, of its associated system memory to a shared PCI adapter without having to go through a trusted component, such as a Hypervisor. Specifically, the present invention is directed to a mechanism for sharing conventional PCI I/O adapters, PCI-X I/O Adapters, PCI-Express I/O Adapters, and, in general, any I/O adapter that uses a memory mapped I/O interface for communications.

Abstract: The described embodiments provide a system for accessing values for configuration space registers (CSRs). This system includes a CSR data storage mechanism with an address input and a CSR data output. The CSR data storage mechanism includes a memory containing a number of memory locations for storing the true or actual values for CSRs for functions for corresponding devices. In these embodiments, the memory locations are divided into at least one shared region and at least one unique region. In these embodiments, in response to receiving an address for a memory location on the address input, the CSR data storage mechanism accesses the value for the CSR in the memory location in a corresponding shared region or unique region.

Abstract: A burning apparatus for burning data stored in a burning machine to a chip includes: a power transforming circuit for providing a working voltage to the chip, a connector for receiving parallel burn data and control signals from the burning machine, and a data transforming circuit for transforming the parallel burn data received from the burning machine into serial data and sending the transformed serial data to the chip. The burning machine, connector, and the data transforming circuit are connected in series, thereby forming a data transfer channel for sending burn data into the chip and sending the burn data back to the burning machine after the burning process.

Abstract: A memory system architecture is provided in which a memory controller controls memory devices in a serial interconnection configuration. The memory controller has an output port for sending memory commands and an input port for receiving memory responses for those memory commands requisitioning such responses. Each memory device includes a memory, such as, for example, NAND-type flash memory, NOR-type flash memory, random access memory and static random access memory. Each memory command is specific to the memory type of a target memory device. A data path for the memory commands and the memory responses is provided by the interconnection. A given memory command traverses memory devices in order to reach its intended memory device of the serial interconnection configuration. Upon its receipt, the intended memory device executes the given memory command and, if appropriate, sends a memory response to a next memory device. The memory response is transferred to the memory controller.

Abstract: A data storage system has a first storage unit and a second storage unit for storing the same data received from a plurality of higher-level devices. The first storage unit transmits sequence information representative of a sequence for storing the data received from the higher-level devices, to said second storage unit.

Abstract: Provided are a human interface device and a wireless communication method thereof. The wireless communication method of the human interface includes the steps of: setting up an occupancy channel of the host digital terminal and the wireless input unit by communicating data for setting up the occupancy channel through the emergency channel; transmitting, at the wireless input unit, operation data through the occupancy channel, and receiving, at the host digital terminal, the operation data; and when the operation data is not generated until a predetermined time lapses, enabling the wireless input unit and the host digital terminal to operate in an operation standby state, and confirming whether there is interference on the occupancy channel. Accordingly, efficiency of a frequency band is increased, and cost and size of the product can be reduced.

Abstract: A method for confirming connection state of a home appliance in home network system is disclosed, which includes a step in which the home appliance periodically confirms the connection state to the home network system, a step in which the appliance generates a packet for requiring address allocation, a step in which the appliance transfers the packet to network managing appliance, a step in which the appliance generates an alive notifying packet on allocating the address of the appliance from the network managing appliance, and a step in which the appliance transfers the alive notifying packet to the network managing appliance.

Abstract: The subject invention relates to a Universal Graphics Adapter (UGA) that is a hardware-independent design that encapsulates and abstracts low-level graphics hardware in a standard manner through firmware. UGA is a firmware standard, intended to wrap existing or planned hardware, including VGA. UGA does not require the use of real-mode assembly language, direct hardware register, or frame buffer access to program, thus providing advantages over conventional systems. UGA supports basic drawing operations, continuous display modes, and power management. As a firmware-based standard, UGA facilitates updating a system to support both evolving and new hardware features. UGA includes the capability to determine ranges of output display capabilities for multiple devices and determine an overlap in capabilities of the multiple devices.

Abstract: Techniques for reducing mount time for a peripheral device connected to an external host device are presented. In some implementations, when a connection is detected, file system data is pre-fetched before a request for such data is sent by the external host device. This allows faster access to the file system data used for initiating read/write communications. In other implementations, in response to a data access command from the external host device, a reply message is delayed from the peripheral device to prevent data access command failures. This delayed response prevents the external host device from pausing before attempting subsequent communication requests.

Abstract: Methods and systems for performing direct memory access (DMA) transfers are described. An invalidate queue (or other storage device) contains an entry associated with a DMA transfer in progress. If the invalidate queue detects an invalidation of a memory page associated with that entry, then it is marked invalid. If the entry is marked invalid during the DMA transfer, then that DMA transfer is aborted. This enables, among other things, DMA transfers to unpinned virtual memory.

Abstract: An electronic device for shortening input response time comprises an input unit, which comprises a plurality of sub-input units, each of which is assigned a sign. A storage unit is configured for storing a dynamic table, which stores relationships between the sign of the sub-input units and use frequency of each of the sub-input units. A sub-input unit determination module is configured for scanning each of the sub-input units of the electronic device according to the order of the sub-input unit in the dynamic table to determine the touched sub-input unit. An accumulation module is configured for accumulating the use frequency of the determined sub-input unit. An update module is configured for re-sorting the sign of the sub-input unit in the dynamic table according to the order of the use frequency of the sub-input units.

Abstract: A USB host/client system includes a USB host device, a USB client device connected via a USB cable to the USB host device, and a power supply unit remote from the USB host device for powering the USB host device through the USB cable connecting the USB client device to the USB host device. The USB host device can have means for communicating with a computer while the USB host device is connected to a USB client device, and/or the power supply unit supplies sufficient power for all normal operations of the USB host device.

Abstract: An Input/Output (IO) Virtualization (IOV) system provides for sharing of computer peripheral devices between multiple host computers by presenting a single device multiple times to numerous host systems. The IOV system, in coupling or connecting multiple host computers and multiple IO devices, provides IO virtualization and host-to-host communication services to the host computers. The system comprises device interfaces coupled to IO devices, and host interfaces coupled to each of a number of host computers. The IO devices are initialized in a first domain. Each host interface exposes functions of the independent IO devices to the host computer to which it is coupled. Each host computer accesses functions from a host domain that is an independent domain specific to the host computer performing the access. The first domain is different from the host domain.

Abstract: A computer-implemented method for interconnecting a peripheral device and an electronic system includes analyzing an information (INF) file associated with the peripheral device, recognizing a resource conflict between the peripheral device and the electronic system based on the analyzing of the INF file, and resolving the resource conflict by modifying the INF file.

Abstract: A method, system, and program product for reserving resources in a networked environment, e.g. a storage area network. A resource is some object that a user must use or change to complete a task. When a user plans a task, the user selects some high-level resources and properties to reserve and a Reservation Service embodiment creates reservations for them. Accordingly, the method system and program product embodiments overcome inefficiencies in reserving resources in a data storage environment while still allowing such reservations to occur. The method includes reserving portions of properties for resources from more than one available choice.

Abstract: Wireless communication equipment which associates with a plurality of sets of peripheral equipment present in a prescribed range through wireless communication stores identification code information regarding the associated peripheral equipment, acquires identification code information from the peripheral equipment present in the prescribed range, and determines whether or not the peripheral equipment has already associated on the basis of the identification code information. If the peripheral equipment has not been associated, the wireless communication equipment stores the identification code information by associating them with an image. If the peripheral equipment has been associated, the wireless communication equipment displays the associated image stored by associating them with the acquired identification code information, and connects to the corresponding peripheral equipment in response to the selection of the displayed and associated image.

Abstract: Two or more very small encapsulated electronic circuit cards to which data are read and written are removably inserted into two or more sockets of a host system that is wired to the sockets. According to one aspect of the disclosure, command and response signals are normally communicated between the host and the cards by a single circuit commonly connected between the host and all of the sockets but during initialization of the system a unique relative card address is confirmed to have been written into each card inserted into the sockets by connecting the command and status circuit to each socket one at a time in sequence. This is a fast and relatively simple way of setting card addresses upon initialization of such a system.

Abstract: To minimize the restriction on the number of available PCI devices although the assignable size of I/O space is limited, an arithmetic unit is provided with a configuration information acquisition device for acquiring the configuration information about PCI devices, an available space determination device for determining available space for each PCI device, and a configuration information notification device for notifying an operating system of the configuration information.

Abstract: A peripheral device can be powered off when not in use by redirecting accesses to the peripheral device's configuration space from the peripheral device to a memory located separate from the peripheral device. A method for redirecting accesses includes copying the current contents of the configuration space to the memory. Accesses to the configuration space are redirected to the memory, whereby the memory services the accesses to the configuration space. After the redirection is enabled, the peripheral device can be powered off. When the peripheral device needs to be used again, it is powered on and the contents of the memory are copied to the configuration space. The configuration space can then resume servicing configuration space accesses.

Abstract: An information processing device includes: an address converter including a base address register in which address conversion information is stored and a conversion circuit that converts a PCI Express standard bus address of an inputted packet to a non-PCI Express standard bus address; and a packet generator. When first configuration information of a first device that has a device-unique unique address, is connected to a non-PCI Express standard bus and is unaware of the unique address is stored, the packet generator generates an address setting-use configuration write request packet, and when second configuration information including change information for changing the base address register to a base address register of a second device where at least one of an address width and an internal memory address is a device-unique unique value, the packet generator generates a change setting-use configuration write request packet and outputs the generated packet to the address converter.

Abstract: An Input/Output (IO) Virtualization (IOV) system couples or connects multiple host computers and IO devices to a managed transport fabric to provide IO virtualization. The host computers may run any operating system to provide a virtualized environment for guest operating systems. The host interface to the IOV system is PCI-Express (PCIe). The IO devices are PCIe based to provide maximum compatibility with industry standard devices, but are not so limited. The IOV system comprises a management central processor unit (MCPU) coupled to transport fabric. The IOV system comprises device interfaces coupled to the transport fabric and to independent input/output (IO) devices. Each device interface couples to the IO device of the independent IO devices. The IOV system comprises host interfaces coupled to the transport fabric. Each host interface couples to a host computer of the independent host computers and exposes functions of the independent IO devices to the host computer.

Abstract: A plurality of memory devices of mixed type (e.g., DRAMs, SRAMs, MRAMs, and NAND-, NOR- and AND-type Flash memories) is serially interconnected. Each device has device type information on its device type. A specific device type (DT) and a device identifier (ID) contained in a serial input (SI) as a packet are fed to one device of the serial interconnection. The device determines whether the fed DT matches the DT of the device. In a case of match, a calculator included in the device performs calculation to generate an ID accompanying the fed DT for another device and the fed ID is latched in a register of the device. In a case of no match, the ID generation is skipped and no ID is generated for another device. The DT is combined with the generated or the received ID depending on the device type match determination. The combined DT and ID is as a packet transferred to a next device. Such a device type match determination and ID generation or skip are performed in all devices of the serial interconnection.

Abstract: A controller and a memory subsystem including a plurality of memory banks each having a plurality of memory devices, in which the controller includes a memory device configured to store an identification (ID) of each of the plurality of memory banks; and a control logic configured to read an ID of a memory bank to be accessed among the plurality of memory banks from the memory device, then output the ID, and then output a command. Each of the plurality of memory devices includes an input port, a register configured to store an ID of each memory device, and a determination circuit configured to receive and compare an ID input via the input port with the ID stored in the register and to generate a control signal according to a result of the comparison. The input port is enabled or disabled in response to the control signal.

Abstract: A mechanism for modifying resources in a logically partitioned data processing system is provided. A request to modify resources associated with a virtual adapter allocated on a physical adapter is invoked. The resources associated with the virtual adapter comprise a subset of the physical adapter resources. The request to modify the physical adapter is conveyed to the physical adapter. Responsive to receipt of the request by the physical adapter, the physical adapter modifies the resources allocated to the virtual adapter.

Abstract: The invention relates to an input/output channel control block that comprises a number of successive input/output modules. The first is a control master module and the subsequent ones are expansion slave modules. Each expansion slave module comprises a processing logic unit as well as respective first signal port and a respective equal number of second signal ports and an equal number of third signal ports which are arranged at identical positions of each expansion slave module. The first signal port is connected to the processing logic unit, to which at least one fourth signal port for connecting an input/output bus terminal subscriber belongs, and a respective second signal port is connected to a third signal port. The control master module likewise possesses a number of third signal ports and a control logic unit for data exchange with a data bus and for targeted driving of the signal ports.

Abstract: A card type peripheral apparatus connected to a host apparatus for communication therewith according to a specific protocol. The card type peripheral apparatus includes a plurality of configuration registers configured to be accessible by the host apparatus and to be set with diverse set information. At least one of the plurality of configuration registers is a special register configured to be set with data arbitrarily selected and fixedly established by a vendor that either fabricates or markets the card type peripheral apparatus. The special register is set with protocol identification information for discriminating the specific protocol.

Abstract: A modular system comprises an appliance and an adaptive adapter configured to alternately couple two consumer electronic devices to the appliance and to supply a different electrical service between the appliance and the consumer electronic devices depending on the device selected. The adaptive adapter supplies a first category of electrical service to a first consumer electronic device and a second category of electrical service to a second consumer electronic device. The appliance may comprise a refrigeration appliance and the adaptive adapter can couple the consumer electronic devices to the appliance.

Abstract: A cable connection support apparatus has a structure in which a master apparatus and a slave apparatus are connected to both ends of a plurality of cables, and each apparatus is connected to each cable by a connecting terminal. The master apparatus and the slave apparatus are grounded. The master apparatus makes, for each connected cable, an inquiry about a position of a terminal of the slave apparatus to which the cable is connected, and inspects for inter-continuity, grounded connection, and unintentional disconnection. The connection destinations and inspection results are displayed on a display apparatus. Consequently, the connection condition for each cable wire in a cable can be confirmed.

Abstract: A system and method for determining media to be exported out of a media library is described. In some examples, the system determines a media component to be exported, determines the media component is in the media library for a specific process, and exports the media component after the process is completed.

Abstract: A system for determining efficacy of online advertising includes a server connected to a computer network. The server is specially adapted to provide functions for communicating with a web resource that provides a web media that contains links or JavaScript calls for causing a client device to generate a device identifier in response to a user of the client device retrieving the web media, receiving the device identifier via a network, associating and caching any impressions, clicks or conversions by the user with the device identifier, calculating total cached impressions, total cached clicks and total cached conversions associated with each unique device identifier, and displaying, for each unique device identifier, at least one of the total cached impressions, the total cached clicks, and the total cached conversions. The device identifier may be derived from a combination of a user-configurable machine parameter and a non-user-configurable machine parameter.

Abstract: Provided are a system and article of manufacture for removing alias addresses from an alias address pool. A plurality of alias addresses are assigned to an alias address pool, wherein the alias addresses in the alias address pool are capable of being dynamically assigned to a device to service I/O requests to the device. An operation is initiated by a process to remove a specified alias address from the alias address pool. An indicator is set to prevent additional processes from removing one alias address from the alias address pool in response to initiating the operation. The specified alias address is removed from the alias address pool.