Abstract: In an example, an apparatus comprises a plurality of execution units comprising at least a first type of execution unit and a second type of execution unit and logic, at least partially including hardware logic, to expose embedded cast operations in at least one of a load instruction or a store instruction; determine a target precision level for the cast operations; and load the cast operations at the target precision level. Other embodiments are also disclosed and claimed.
Type:
Grant
Filed:
August 10, 2021
Date of Patent:
January 30, 2024
Assignee:
INTEL CORPORATION
Inventors:
Uzi Sarel, Ehud Cohen, Tomer Schwartz, Amitai Armon, Yahav Shadmiy, Amit Bleiweiss, Gal Leibovich, Jeremie Dreyfuss, Lev Faivishevsky, Tomer Bar-On, Yaniv Fais, Jacob Subag
Abstract: A processing element, a neural processing device including the same, and a method for calculating thereof are provided. The processing element includes a weight register configured to receive and store weights, an input activation register configured to store input activations, a flexible multiplier configured to receive the weight and the input activation, to perform a multiplication calculation in a first precision or a second precision different from the first precision according to a mode signal, occurrence of an overflow, and occurrence of an underflow, and to generates result data; and a saturating adder configured to receive the result data and generate subtotals.
Abstract: Provided are systems and methods of a compiler that efficiently processes semantic analysis. For example, the compiler may perform semantic analysis on as much of the source code as possible during compile time. For any instructions, such as dynamic expressions, that are not known at compile time, the compiler may encode semantic bytecode for performing the semantic checks on such dynamic expressions, and their dependent expressions, during execution/runtime of the program. In one example, the method may include compiling source code of a program into bytecode, identifying, during the compiling, a dynamic expression that includes one or more dependent static expressions within the source code, generating semantic bytecode for semantic analysis of the one or more dependent static expressions of the dynamic expression, and adding the semantic bytecode to the bytecode of the program.
Type:
Grant
Filed:
July 26, 2021
Date of Patent:
January 10, 2023
Assignee:
SAP SE
Inventors:
Julius Bettin, Kilian Kilger, Christian Stork