Abstract: A subscriber station for a serial bus system. The subscriber station encompasses: a communication control device for controlling communication with at least one further subscriber station of the bus system; a transmission/reception device for receiving a message from a bus of the bus system, which message was created by the communication control device or by the at least one further subscriber station of the bus system and is being transferred on the bus; an interference detection unit that is configured to detect interference in the context of transfer of the message on the bus; and an interference processing unit that is configured to evaluate the interference detected by the interference detection unit in terms of the nature and magnitude of the interference, and to adapt communication control by the communication control device to the result of the evaluation of the interference.

Abstract: An early boot debug system includes a first memory subsystem that includes boot instructions and a processing system that is coupled to the first memory subsystem. The processing system includes a primary processing subsystem, and a secondary processing subsystem that is coupled to the primary processing subsystem and a second memory subsystem. The secondary processing subsystem copies the boot instructions from the first memory subsystem to the second memory subsystem and executes the boot instructions from the second memory subsystem during a boot operation. The secondary processing subsystem then detects a first event during the execution of the boot instructions and, in response, generates a first event information. The secondary processing subsystem stores the first event information in the second memory subsystem to be retrieved on-demand by an administrator.

Abstract: An apparatus includes one or more functional circuits, a debug circuit configured to implement one or more debug features for the one or more functional circuits, and a validation circuit. The validation circuit is configured to receive a request to access debug features, and to send an identification value corresponding to the apparatus. The validation circuit is further configured to receive a certificate generated by a server computer system, the certificate including encoded debug permissions, and to decode the debug permissions using the identification value. Using the decoded debug permissions, the validation circuit is further configured to enable one or more of the debug features.

Abstract: In an image-forming apparatus, a fixing device includes first and second fixing members; and a pressure modifying mechanism. The first and second fixing members form a nip. The pressure modifying mechanism modifies a nip pressure at the nip to one of a first nip pressure and a second nip pressure smaller than the first nip pressure. A controller performs: a converting process to convert print data into raster image data; an image-forming process to form a developer image on a sheet using the raster image data; and a fixing process to fix the developer image to the sheet with the fixing device at the first nip pressure. When a second converting process is not completed before a prescribed time following completion of a first fixing process has elapsed, the controller further performs a nip pressure reducing process to modify the nip pressure from the first to the second nip pressure.

Abstract: There is disclosed in one example a multi-core computing system configured to provide a hot-swappable CPU0, including: a first CPU in a first CPU socket and a second CPU in a second CPU socket; a switch including a first media interface to the first CPU socket and a second media interface to the second CPU socket; and one or more mediums including non-transitory instructions to detect a hot swap event of the first CPU, designate the second CPU as CPU0, determine that a new CPU has replaced the first CPU, operate the switch to communicatively couple the new CPU to a backup initialization code store via the first media interface, initialize the new CPU, and designate the new CPU as CPUN, wherein N?0.

Abstract: A method includes determining a first upload start timestamp and a first upload end timestamp of a video file from a client device to an object storage device. The method further includes monitoring an upload of the video file from the object storage device to a server-less framework to determine a second upload start timestamp and a second upload end timestamp of the video file. The method further includes determining, by a processing device, a latency of the upload in view of the first upload timestamp, the second upload timestamp, the first upload end timestamp, and the second upload end timestamp. The method further includes providing a latency adjustment instruction to the client device in view of the latency.

Abstract: An image forming apparatus includes a fixing device having a fixing belt assembly including a heater, a fixing belt, a heater temperature sensor, and a belt temperature sensor, and a pressure roller; a drive current sensor; and a life information acquisition portion. The heater temperature sensor detects the temperature of the heater. The belt temperature sensor detects the temperature of the fixing belt. The pressure roller presses against the fixing belt. The drive current sensor detects a drive current of a drive motor that drives the pressure roller. The life information acquisition portion acquires life information of the fixing belt assembly. A controller selects a failure prediction processing mode based on the detection result of the drive current sensor and selects a driving method based on the detection results of the temperature sensors and the acquisition result of the life information acquisition portion in each mode.

Abstract: A data processing system comprising: a host; and a memory system comprising a nonvolatile memory device and a controller suitable for controlling the nonvolatile memory device, wherein the controller comprises: a first reset circuitry suitable for loading firmware from the nonvolatile memory device to a volatile memory, and setting a reset default status; a second reset circuitry suitable for determining whether a reason for a reset request coincides with the reset default status, when the reset request is received from the host, and resetting the memory system; and a firmware load determination circuitry suitable for determining whether to reload the firmware by checking the reset default status.

Abstract: A method is provided. The method of resetting a system, comprising: receiving data from the electronic sub-system; determine if a non-hardware fault is detected; if a non-hardware fault is detected, then performing a software reset of the electronics sub-system; if no non-hardware fault has been detected, then determining if a hardware fault is detected; and if a hardware fault is detected, then performing a hardware reset of the system.

Abstract: A system and method for performing a test procedure on a system under test are provided. An actuation unit operatively coupled to the system under test is configured to perform at least one operation thereon. A visual recognition unit is configured to capture at least one image of the system under test in real-time. A test unit remotely interfaced with the system under test is configured to perform the test procedure. Using the test unit, the test procedure is retrieved from the memory, at least one control signal is output to the actuation unit for causing the at least one operation to be performed in real-time for testing the system under test in accordance with the one or more test instructions, and the at least one image of the system under test is monitored as the at least one operation is performed for validating the test procedure in real-time.

Abstract: Apparatus and methods for monitoring a wireless local area network (WLAN) to identify inoperative or degraded devices and restore network connectivity to end users. In one embodiment, the network includes one or more access points (APs) in data communication with a cable modem, which in turn communicates with managed network entities via a backhaul connection. Each AP is configured to provide connectivity to client devices, as well as monitor the operation of other network components including the cable modem, via logic indigenous to the AP, and invoke corrective action when failures or degraded performance is detected. In one variant, the logic operative to run on the AP includes both diagnostic and self-healing functionality, so as to enable at least partial automated diagnosis, localization, and recovery from faults, thereby obviating costly troubleshooting by the network operator or service personnel.

Abstract: A memory dispatcher, including an address decoder configured to decode a write address of received write data; a lockstep processor configured to generate, based on the decoded write address, primary and redundant memory write addresses and corresponding primary and redundant copies of the write data, if the decoded write address corresponds with a lockstep region of the memory; and a comparator coupled to the lockstep processor, and configured to compare the primary and redundant copies of the write data, and to compare the primary and redundant memory write addresses.

Abstract: Methods and systems for service integrated domain name servers are described. A method for service integrated domain name server processing includes receiving, by a requesting device, a service fully qualified domain name (FQDN) and an anycast Internet Protocol (IP) address for service integrated domain name servers, where each service integrated domain name server includes the anycast IP address and a unicast IP address. The requesting device queries domain name servers on the service integrated domain name servers with the anycast IP address to resolve the service FQDN. The requesting device receives the unicast IP address from a closest service integrated domain name server. The requesting device saves the unicast IP address, sends to a service server on the closest service integrated domain name server, a service request on the unicast IP address and receives from the service server, results for the service request.

Abstract: A system includes an updated network function and a consumer network function. The updated network function includes a recent update and is configured to register at a Network Repository Function (NRF) using a Network Function (profile (NF profile). The NF profile indicates a network function type (NF type) and a first priority associated with the update. The consumer network function is configured to: receive a message from a network component; determine to engage a service of a network function of the NF type based on the message; determine a desired priority for the service; and send a discovery request to the NRF in response to the message; receive a search result from the NRF in response to the discovery request. The search result has a list of candidate network functions of the NF type.

Abstract: SONiC (Software for Open Networking in the Cloud) is instantiated in a chassis-based networking switch device to enable control plane functionality for the line cards and backplane. The SONiC platform may be configured with a routing table and BGP (border gateway protocol) to provide routing capabilities for the application-specific integrated circuits (ASICs) operating on each respective line card. Ethernet ports are utilized within the chassis to enable the utilization of standardized networking protocols, such as protocols on the data link layer (layer 2) within the OSI (Open Systems Interconnection) model. The implementation of SONiC and standardized networking techniques creates a simplified and more proficient routing system in the chassis framework.

Abstract: An integrated circuit configured to execute program instructions can generate, based on a configuration, any combination of a notification message, a halt signal, or an interrupt signal for a condition detected in the integrated circuit. The detected condition can be an error condition or a non-error condition. The notification message for the condition may be written to memory accessible by a host processor. The non-error condition may be used by the host processor to monitor internal states of the integrated circuit. The halt signal may be used to stop the integrated circuit from executing the instructions.

Abstract: An incremental backup system that performs the following (not necessarily in the following order): (i) making a plurality of time-ordered journal entries; (ii) determining that a corruption condition exists; (iii) responsive to a corruption condition, constructing a first incremental mirror data set that reflects a backup data set and all journal entries up to a first corrupted journal entry which is the earliest in time journal entry, of the plurality of journal entries, that is a corrupted journal entry; (iv) responsive to a corruption condition, constructing a second incremental mirror data set that reflects the backup data set and all journal entries up to the first corrupted journal entry; and (v) checking for corruption in the first and second incremental mirror data sets to determine the latest uncorrupted version of the data set.

Abstract: A data storage device comprises a non-volatile semiconductor memory device and a solid-state drive controller communicatively coupled to the non-volatile semiconductor memory device, including a function level reset manager. The function level reset manager can receive a function level reset request from a host system, generate a function level reset bitmap based on the function level reset request, and broadcast the function level reset request to a command processing pipeline. The function level reset bitmap can indicate which functions are in a reset state. Further, the function level reset manager can determine which functions are in the reset state and instruct the command processing pipeline to cancel commands associated with the functions in the reset state.

Abstract: Techniques are disclosed relating to scheduling tasks for graphics processing. In one embodiment, a graphics unit is configured to render a frame of graphics data using a plurality of pass groups and the frame of graphics data includes a plurality of frame portions. In this embodiment, the graphics unit includes scheduling circuitry configured to receive a plurality of tasks, maintain pass group information for each of the plurality of tasks, and maintain relative age information for the plurality of frame portions. In this embodiment, the scheduling circuitry is configured to select a task for execution based on the pass group information and the age information. In some embodiments, the scheduling circuitry is configured to select tasks from an oldest frame portion and current pass group before selecting other tasks. This scheduling approach may result in efficient execution of various different types of graphics workloads.

Abstract: The technology disclosed herein that may enable a client of a distributed storage system to recover a storage session after a failure occurs. An example method may include: identifying a storage session of a distributed storage service, the storage session comprising session data that corresponds to a storage object of the distributed storage service; providing, by a processing device of a client, an indication that the client is recovering the storage session; and obtaining, by the client, the session data of the storage session from one or more devices that accessed the storage object of the distributed storage service.

Abstract: A system and method for identifying anomalies in indicators, such as key performance indicators (KPIs) of a telecom system are disclosed. The method can learn over time behavior of the indicator and can statistically identify what should be considered anomalous. Learning can be performed on a per indicator basis that each presents different statistical qualities. The method can associate the indicator to a profile, such as one of several statistical distributions and can operate accordingly. Association may be determined by the correlation of the indicator to statistical distribution. The method can identify correlations between indicators when identifying the statistical distribution and especially when the associated statistical distribution is an unidentified profile. The method can include comparison of actuals versus prediction and sending alerts when anomalies are found.

Abstract: A vehicle includes a plurality of controllers configured to control operation of at least one load and share information with each other; a communication module configured to perform communication between the at least one load and the plurality of controllers; and a plurality of connectors provided between the plurality of controllers, the at least one load, and the communication module, configured to connect the plurality of controllers, the at least one load, and the communication module. One of the plurality of controllers may transmit a preset number of times of communication signals to the other controller and the communication module when the information is not received for a predetermined time, store the number of times of reception of response signals as error information, and transmit the stored error information to the outside when receiving an error information transmission command from the outside.

Abstract: A circuit arrangement includes one or more input buffers disposed on a system-on-chip (SoC) and configured to receive and store streaming debug packets. One or more response buffers are also disposed on the SoC. A transaction control circuit is disposed on the SoC and is configured to process each debug packet in the one or more input buffers. The processing includes decoding an operation code in the debug packet, and determining from an address in the debug packet, an interface circuit of multiple interface circuits to access a storage circuit in a subsystem of multiple sub-systems on the SoC. The processing further includes issuing a request via the interface circuit to access the storage circuit according to the operation code, and storing responses and data received from the interface circuits in the one or more response buffers.

Abstract: The technology disclosed herein enables a data plane of a packet handler in a host to be changed while minimizing disruption to the operation of guests that are associated therewith. In a particular embodiment, the method provides, in a control plane of the packet handler, extracting state information about states of the data plane and pausing network traffic to the data plane. After pausing the network traffic to the data plane, the method provides applying changes to components of the data plane. After applying changes to the components of the data plane, the method provides restoring the states to the data plane using the state information and resuming the network traffic to the data plane.

Abstract: A data storage device includes a controller including a descriptor generation unit suitable for generating a descriptor and a memory controller suitable for generating a command based on the descriptor; and a nonvolatile memory device including a cell region, and suitable for reading first data from the cell region and buffering the first data in response to a first read command transmitted from the memory controller and outputting the first data to the controller in response to a first cache output command transmitted from the memory controller. The descriptor generation unit transmits an interrupt descriptor to the memory controller. The memory controller generates an interrupt to the descriptor generation unit based on the interrupt descriptor, and transmits the first cache output command to the nonvolatile memory device according to an instruction of the descriptor generation unit for the interrupt.

Abstract: A computer-implemented method includes receiving a template for creating a virtual machine (VM) instance; separating the template into a repeated portion and a unique portion; determining whether the repeated portion is stored in a cache; creating based on determining that the repeated portion is stored in the cache, the VM instance using the repeated portion stored in the cache; completing the unique portion of the VM instance to create a completed VM instance; and deploying the completed VM instance.

Abstract: An IEC 61850 Network Control Center (NCC) server is provided at a gateway intelligent electronic device (IED) of a Substation Automation (SA) system. The NCC server serves, via the MMS/TCP/IP part of IEC 61850, process data from substation Intelligent Electronic Devices IEDs to a NCC. The NCC server uses functional names for gateway Logical Nodes (LN) corresponding to substation LNs. The functional names are devoid of any reference to a substation IED related name of the substation LNs, but can be automatically translated to substation IED related names in case of changing SA communication and substation IED architecture. Thereby, functional names as defined by the substation section within a SCD file of the SA system are used for the communication link between the gateway IED and the NCC.

Abstract: A device and methods for wirelessly transferring farming data to and from an agricultural monitor. Certain embodiments also relate to specific methods used to change the boot order of a computing device that may be used to enable wireless data transfer.

Abstract: An electronic device with reliable restart function includes a central processing unit (CPU), a complex programmable logic device (CPLD), and a platform controller hub (PCH). The CPU also outputs a trigger signal when a serious error occurs in the electronic device. The CPLD obtains the trigger signal from the CPU, and delays the trigger signal for a first preset time. The PCH chip obtains the trigger signal delayed by the CPLD, and controls the electronic device to perform a system restart according to the trigger signal.

Abstract: A watchdog monitoring system having a watchdog integrated circuit and a microcontroller is provided. The microcontroller has a microprocessor, and a digital input/output device with an enable pin and a disable pin. A disable application in the microcontroller monitors the enable pin of the digital input-output device, and if the enable pin does not have a high logic state within a predetermined amount of time after a first time indicating that the microcontroller is malfunctioning, then the disable application generates a control message.

Abstract: A system for package management includes an interface and a processor. The interface is to receive an indication to install a package. The processor is to determine a configured package using a set local configuration properties and using the package and to launch, using a metascheduler, a set of sub schedulers to install a plurality of applications of the configured package.

Abstract: A method of obtaining information stored in registers of at least one processing module of a computer, each processing module including a management controller to read the information stored in the associated registers, and a programmable logic circuit to trigger a requested reset following a fatal error, the method including in the event of reception of a reset request by a programmable logic circuit of a processing module, suspending by the programmable logic circuit the triggering of the reset and alerting the associated management controller of the occurrence of a fatal error, and, if the associated management controller is capable thereof, reading by the associated management controller the information stored in associated and chosen registers then storing by the associated management controller the read information in a file, and authorizing said associated programmable logic circuit to trigger said requested reset.

Abstract: Systems and methods for a Dual Window Watchdog Timer (DWWDT) are described. In some embodiments, a method may include running a first counter in a first clock domain and a second counter in a second clock domain; generating an interrupt to a controller during a window open period, wherein the window open period begins in response to the first counter having reached a predetermined threshold; and at least one of: restarting the first counter if the controller restarts the second counter in response to the interrupt before the window open period ends; or issuing a system reset if the controller does not restart the second counter in response to the interrupt before the window open period ends.

Abstract: An arithmetic device and a control apparatus capable of executing a process according to an event occurring in one or more functional units connected through a communication circuit are provided. The arithmetic device configuring the control apparatus includes: a communication circuit for exchanging data with the functional units through the communication line; a processor for executing at least one of an arithmetic processing using data acquired from the functional units and a generation processing of data to be transmitted to the functional units; and a monitoring circuit connected to the communication circuit and the processor, and includes: a detection unit that detects an event occurring in the arithmetic device; a storage unit that stores a message associated with each event; and a start unit that gives an instruction to the communication circuit in accordance with the detected event to transmit a message associated with the detected event.

Abstract: Component information about a component of an image forming apparatus is acquired before the component is replaced, and the component information is held by a storage unit. This enables necessary component information to be output even in the case where the component has been replaced.

Abstract: A method and associated systems use DVFS performance-scaling technology to satisfy quality-of-service performance requirements when recovering a job that had been scheduled to run on a failed virtual machine. A Buffer Time specifies a duration of time remaining, at the time of failure, for the job to complete in order to satisfy the quality-of-service requirements. Depending on relative durations of time required to repair the failed virtual machine, to perform the job on an unsealed active-mode virtual machine, and to transfer the job to another virtual machine, the system determines whether to repair the failed virtual machine or to transfer the job. If the latter, the system then determines whether to select a destination virtual machine provisioned on a DVFS-compliant platform and, if so, the system scales the DVFS-compliant platform's performance to a level sufficient to complete the job within the Buffer Time.

Abstract: A method for creating a workflow using system administrator actions to resolve a system issue is provided. The method may include assigning a ticket to a category. The method may include capturing a first snapshot of a first system state of a machine before a system administrator begins a corrective action. The method may include capturing a second snapshot of a second system state of the machine after system administrator corrective action. The method may include creating a difference set based on a comparison of the first snapshot and the second snapshot. The method may include generating summaries of administrator action. The method may include dividing the summaries into groups of summaries. The method may include constructing a candidate workflow for each group. The method may include presenting the candidate workflow to a subject matter expert. The method may include storing the reviewed candidate workflow in a repository.

Abstract: A system and method provides for automated selection and installation of device interfaces based a location of a device or a time of day at the location of the device. A current space-time state of a digital device is determined and used to select image data corresponding to at least one of a plurality of alternative user interface images or interface sets.

Abstract: A method of monitoring I2C bus status using a Baseboard Management Controller (BMC) and a hardware watchdog (HW) circuit is provided. The method includes detecting, using the HW circuit, a failure of an I2C bus and determining if the HW circuit can auto reset I2C devices on the I2C bus. The method also includes, if it is determined that the HW circuit can auto reset the I2C devices on the I2C bus, resetting, using the HW circuit, the I2C devices, and if it is determined that the HW circuit cannot auto reset the I2C devices on the I2C bus, reporting, using the HW circuit, detected failure to the BMC. The method further includes processing, using the BMC, the detected failure.

Abstract: Approaches are described for enabling a host computing device to store credentials and other security information useful for recovering the state of the host computing device in a secure store, such as a trusted platform module (TPM) on the host computing device. When recovering the host computing device in the event of a failure (e.g., power outage, network failure, etc.), the host computing device can obtain the necessary credentials from the secure store and use those credentials to boot various services, restore the state of the host and perform various other functions. In addition, the secure store (e.g., TPM) may provide boot firmware measurement and remote attestation of the host computing devices to other devices on a network, such as when the recovering host needs to communicate with the other devices on the network.

Abstract: A communication apparatus comprises: a power supply; a communication unit configured to operate by using power from the power supply or a communication partner; an operation unit; a control unit configured to execute software for controlling processing of each unit of the communication apparatus, wherein the control unit starts processing to stop execution of the software if an operation to the operation unit is started while the control unit is executing the software; a power supply control unit configured to control power that is supplied to the control unit, in accordance with a state of as operation with respect to the operation unit; and a disabling unit configured to disable the communication unit, based on the state of the operation with respect to the operation unit and an execution state of the software.

Abstract: Data can be categorized into facts, information, hypothesis, and directives. Activities that generate certain categories of data based on other categories of data through the application of knowledge which can be categorized into classifications, assessments, resolutions, and enactments. Activities can be driven by a Classification-Assessment-Resolution-Enactment (CARE) control engine. The CARE control and these categorizations can be used to enhance a multitude of systems, for example diagnostic system, such as through historical record keeping, machine learning, and automation. Such a diagnostic system can include a system that forecasts computing system failures based on the application of knowledge to system vital signs such as thread or stack segment intensity and memory heap usage. These vital signs are facts that can be classified to produce information such as memory leaks, convoy effects, or other problems.

Abstract: For passive detection of live systems during controller failover in a distributed environment, a set of member systems is sorted according to heartbeat periods used by members in the set of member systems. An amount of elapsed time since a failure of a first controller system in the distributed environment is determined. From the sorted set, a first member system is selected due to a first heartbeat period of the first member system being a shortest heartbeat period in all heartbeat periods in the sorted set of member systems. Using a processor and a memory at a second controller system, a timeout period is computed. The timeout period is an amount of time remaining in the first heartbeat period after the amount of elapsed time. The first member system is removed from the sorted set after the timeout period expires and the first member system has not sent a heartbeat.

Abstract: Systems and methods for determining the state of health for a capacitor module are provided. In some embodiments, a method for monitoring the health of a capacitor module comprising an array of capacitors is provided. The method may include steps for disabling a charger coupled to an array of capacitors of the capacitor module, determining if the capacitor module is healthy based at least on operating values of the capacitor module, and enabling a write back mode for the memory module if the capacitor module is determined to be healthy.

Abstract: Embodiments generally relate to automatic recovery of a computing system. The present technology discloses techniques that can enable an automatic detection and recovery of a switch device from system malfunctions. According to some embodiments, a watchdog timer can detect switch system malfunctions and send out signals to reset a switch central processor unit. According to some embodiments, the switching functions can be maintained during a reset of the switch central processor unit.

Abstract: A system for monitoring a virtual machine executed on a host. The system includes a processor that receives an indication that a failure caused a storage device to be inaccessible to the virtual machine, the inaccessible storage device impacting an ability of the virtual machine to provide service, and applies a remedy to restore access to the storage device based on a type of the failure.

Abstract: A fault tolerant computer system having two virtual machines (VMs), each running on a separate host device, is connected over a network to one or more I/O devices. The system operates to monitor the health of one or more operational characteristics associated with each VM, and in the event that the health of both virtual machines dictates that one or the other of the VMs should be downgraded, but the system is not able to determine which VM should be downgraded and there is an imbalance in a monitored system operational characteristic, the system can defer downgrading one VM for a selected period of time during which the operational characteristic that is in imbalance is monitored. If the imbalance is resolved, the downgrade is cancelled, if an operational fault is confirmed prior to the expiration of the deferral period or if the deferral period expires, then one host is downgraded.

Abstract: A computer-implemented method includes running a software unit in an isolation container located on a software platform. The computer-implemented method further includes allocating an instance of a device function instantiated by the software platform to the software unit. The computer-implemented method further includes storing usage data associated with the instance to a memory region logically external to the isolation container, the usage data being generated by the software unit operating the device function. The computer-implemented method further includes detecting a failure of the software unit. The computer-implemented method further includes, responsive to detecting the failure, restarting the software unit and providing the software unit with a usage context, wherein the usage context comprises at least one of identifying information and the usage data associated with the instance stored in the memory region logically external to the isolation container.

Abstract: A computer-implemented method includes running a software unit in an isolation container located on a software platform. The computer-implemented method further includes allocating an instance of a device function instantiated by the software platform to the software unit. The computer-implemented method further includes storing usage data associated with the instance to a memory region logically external to the isolation container, the usage data being generated by the software unit operating the device function. The computer-implemented method further includes detecting a failure of the software unit. The computer-implemented method further includes, responsive to detecting the failure, restarting the software unit and providing the software unit with a usage context, wherein the usage context comprises at least one of identifying information and the usage data associated with the instance stored in the memory region logically external to the isolation container.

Abstract: A first monitoring control circuit unit monitors controlling operation of an engine control unit (ECU); when the occurrence frequency of an abnormality becomes the same as or larger than a predetermined threshold value, a first storage circuit stores that occurrence frequency and a first cutoff circuit de-energizes an intake valve opening degree control motor for an air-intake throttle so as to set the intake valve opening degree to a fixed intake valve opening degree; a second monitoring control means monitors controlling operation of a transmission control unit (TCU); when the occurrence frequency of an abnormality becomes the same as or larger than a predetermined threshold value, a second storage circuit stores that occurrence frequency and a second cutoff circuit de-energizes a gear-shifting electromagnet valve so as to set the transmission ratio to a fixed transmission ratio.