Data Processing System Error Or Fault Handling Patents (Class 714/100)
  • Patent number: 10225276
    Abstract: The present invention relates to methods, network devices, and machine-readable media for an integrated environment for a method of environment security validation through controlled computer network exploitation. A set of parameters is received from an operator over the network. Based on these parameters an attack campaign is performed on the environment. In the course of the campaign, vulnerable hardware and software in the attacked network are identified. In another scenario, vulnerable hardware and software are mitigated until vendors provide official patches.
    Type: Grant
    Filed: January 9, 2018
    Date of Patent: March 5, 2019
    Assignee: SCYTHE INC.
    Inventors: Bryson Bort, Ateeq Sharfuddin, Robert W. Winchester-Mauck, Benjamin L. Dagana, Larry M. White, Christopher M. Balles, Tiffany Williams, Tommy Chin, Sean McConnell
  • Patent number: 10216702
    Abstract: A machine generates and provides a digital impact matrix including a first matrix and, in some embodiments, a second matrix, the first matrix including a plurality of impacts that various digital technologies have on various organizational processes. In some embodiments, the first matrix includes a plurality of magnitudes of impacts, while the second matrix includes a plurality of business values of impact that the various digital technologies have on the various organizational processes. A user interface is provided to assign impact categorizations to the impacts and of the first matrix and the second matrix, if applicable, and to display a graphical representation of the digital impact matrix.
    Type: Grant
    Filed: November 14, 2016
    Date of Patent: February 26, 2019
    Assignee: Accenture Global Solutions Limited
    Inventors: Silke Lehmann, Ankur Saxena
  • Patent number: 10191798
    Abstract: Certain aspects of the present disclosure relate to selecting a deferral period after detecting an error in a received packet by an apparatus for wireless communications. The apparatus generally includes an interface configured to obtain a frame received over a medium, and a processing system configured to detect an occurrence of an error when processing the frame, determine an intended recipient of the frame based on information included in the frame, and select a deferral period, after detecting the occurrence of the error, during which the apparatus refrains from transmitting on the medium, wherein the selection is based, at least in part, on the determination.
    Type: Grant
    Filed: May 4, 2016
    Date of Patent: January 29, 2019
    Assignee: QUALCOMM Incorporated
    Inventor: Alfred Asterjadhi
  • Patent number: 10175748
    Abstract: A personal computer or other electronic device may be powered by an external power supply and may have a legacy ambient temperature sensor e.g. because a fan whose speed is controlled by a controller, uses as an input, inter alia, ambient air temperature received from the legacy temperature sensor which may be disposed adjacent the fan. A controller may be provided which limits the current based on ambient air temperature reading/s flowing out of the sensor thereby to optimize power consumption relative to conventional “worst-case-assumption based” control of the current, in which current supplied is limited, mindful of a pre-set worst-case temperature assessment, to an un-necessarily low level of current.
    Type: Grant
    Filed: January 5, 2017
    Date of Patent: January 8, 2019
    Assignee: NUVOTON TECHNOLOGY CORPORATION
    Inventor: Moshe Alon
  • Patent number: 10133562
    Abstract: Data is received that characterizes a score model. Thereafter, the score model is normalized by transforming it into a directed acyclic graph. The directed acyclic graph is then transformed into a structured rules language program. The structured rules language program is then transformed into a program using a concurrent, class-based, object-oriented computer programming language (e.g., JAVA, C, COBOL, etc.). Related apparatus, systems, techniques and articles are also described.
    Type: Grant
    Filed: October 31, 2016
    Date of Patent: November 20, 2018
    Assignee: FAIR ISAAC CORPORATION
    Inventors: Andrei R. Yershov, Andrew K. Holland
  • Patent number: 9996436
    Abstract: One or more techniques and/or computing devices are provided for communicating storage controller failures utilizing service processor traps. A first storage controller, of a first storage cluster, has a disaster recovery relationship with a second storage controller of a second storage cluster. The first storage controller comprise a first service processor configured to monitor health of the first storage controller. Responsive to identifying a failure of the first storage controller, the first service processor uses stored communication configuration of a second service processor of the second storage controller to send a service processor trap to the second service processor. In this way, the second service processor initiates a switchover operation by the second storage controller to provide clients with failover access to data previously available through the first storage controller before the failure.
    Type: Grant
    Filed: October 22, 2015
    Date of Patent: June 12, 2018
    Assignee: NetApp Inc.
    Inventors: Hrishikesh Keremane, Vijay Singh, David Andrew Allender
  • Patent number: 9843564
    Abstract: A method and system for securing data in a computer system provides the capability to secure information even when it leaves the boundaries of the organization using a data loss agent integrated with encryption software. A method for securing data in a computer system comprises detecting attempted connection or access to a data destination to which sensitive data may be written, determining an encryption status of the data destination, allowing the connection or access to the data destination when the data destination is encrypted, and taking action to secure the sensitive data when the data destination is not encrypted.
    Type: Grant
    Filed: November 17, 2014
    Date of Patent: December 12, 2017
    Assignee: McAfee, Inc.
    Inventors: Elad Zucker, Eran Werner, Mattias Weidhagen
  • Patent number: 9727398
    Abstract: A first control device includes: a switch device including a first port connected to a second control device among the plurality of control devices via a first channel and a second port connected to the second control device via a second channel and to which a processing device is connected; a detection unit that detects an error in the control devices; a first reset processing unit that performs a port reset of the first port included in the switch device; and a transmitting unit that transmits a reset instruction to the second control device; thereby propagation of an error occurred in a control device can be inhibited.
    Type: Grant
    Filed: October 27, 2014
    Date of Patent: August 8, 2017
    Assignee: FUJITSU LIMITED
    Inventor: Takashi Kidamura
  • Patent number: 9558110
    Abstract: A method of managing a rewritable mass memory subdivided into sectors within which data pages are recorded, and data periodically updated, where data erasure in a sector erases all previously written data therein. The method includes: writing pieces of data in a sector, each piece being associated with a first block containing at least one information for identifying the data piece, writing information data in an administrative block for managing the data of the sector concerned in the sector, each block being written among other data of the sector and being associated with a second block including one information piece and one check information piece, a block including a first part giving general indications and a second part including a counter being incremented at each writing of an administrative block in a new sector, each first block including a check number which is based on the corresponding administrative block counter.
    Type: Grant
    Filed: October 16, 2013
    Date of Patent: January 31, 2017
    Assignees: CONTINENTAL AUTOMOTIVE FRANCE, CONTINENTAL AUTOMOTIVE GMBH
    Inventors: Nicolas Boursier, Andreas Mehrwald
  • Patent number: 9485168
    Abstract: An apparatus and method routes data over network links based on a temperature of the network links. When the temperature of a link meets a first threshold a routing mechanism re-routes a portion of the network traffic over a lower temperature link to reduce the likelihood that the link will exceed a second threshold that necessitates that the link be throttled back or disabled. Re-routing data to cooler links allows the system to maintain the lowest possible temperature of the network links to gain optimal performance of the system. In the disclosed example, the network links include interconnect cable connections and backplane connections. A temperature of the network links is determined by monitoring a region of an integrated circuit near a line driver driving the network link.
    Type: Grant
    Filed: October 3, 2013
    Date of Patent: November 1, 2016
    Assignee: International Business Machines Corporation
    Inventors: Brett J. Reese, Gary R. Ricard, Jaimeson J. Saley
  • Patent number: 9477444
    Abstract: A control server receives information from detector agents associated with an application program being executed by a processor. The information, which is collected by the detector agents at runtime of the application, includes data with which the control server can generate a representation of the software architecture for the application. The control server compares the generated representation to representations of a set of known acceptable architectures. Based on the results of that comparison, the control server indicates whether the architecture of the application is a valid architecture. Recommendations for modifying the architecture of the application may be made in cases where the architecture is not deemed valid by the control server.
    Type: Grant
    Filed: December 30, 2014
    Date of Patent: October 25, 2016
    Assignee: CA, Inc.
    Inventors: Tony Shen, Kevin Liu
  • Patent number: 9459633
    Abstract: A thermal workload distribution controller receives, for each of multiple thermal controlled areas, at least one current thermal measurement from at least one separate thermostat node. The thermal workload distribution controller selects a particular thermal controlled area from among the multiple thermal controlled areas that is most optimal to receive additional heat based on the at least one current thermal measurement received for each of the thermal controlled areas. The thermal workload distribution controller distributes at least one workload to a server node associated with the particular thermal controlled area, wherein the heat dissipated by the server from executing the workload affects a thermal environment of the particular thermal controlled area.
    Type: Grant
    Filed: October 30, 2013
    Date of Patent: October 4, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Andrew Geissler, Michael C. Hollinger
  • Patent number: 9438541
    Abstract: The invention concerns a method for sending information about users assigned to work on tasks, wherein data sets comprising information about users and tasks the users are assigned to are stored in particular on a first server (101), wherein a request for information about a user is received, in particular via a receiver (API) of said first server (101), wherein said request comprises information about a predetermined task, wherein a test is performed, in particular by a processor (111) of said first server (101) to determine a data set comprising information about a user assigned to said predetermined task, wherein a reply is sent, in particular by a sender (API) of said first server (101), depending on the result of said test, wherein said reply comprises information about said user.
    Type: Grant
    Filed: March 28, 2012
    Date of Patent: September 6, 2016
    Assignee: Alcatel Lucent
    Inventor: Roman Sorokin
  • Patent number: 9348714
    Abstract: One or more techniques and/or systems are provided for load balancing between storage controllers. For example, a first storage controller and a second storage controller may be configured at a first storage site according to a high availability configuration, and may be configured as disaster recovery partners for a third storage controller and a fourth storage controller at a second storage site. If the first storage controller fails, the second storage controller provides failover operation for a first storage device. If a disaster occurs at the second storage site, the second storage controller provides switchover operation for a third storage device and a fourth storage device. Responsive to the first storage controller being restored, the third storage device may be reassigned from the second storage controller to the first storage controller for load balancing at the first storage site during disaster recovery of the second storage site.
    Type: Grant
    Filed: March 20, 2014
    Date of Patent: May 24, 2016
    Assignee: NetApp Inc.
    Inventors: Abhishek Jain, Chaitanya Patel, Deepan Natesan Seeralan, Linda Ann Riedle
  • Patent number: 9280411
    Abstract: A method for operating a controller includes receiving a command associated with at least one operation, determining a CPU channel path based on the received command, determining a unique job identifier based on the received command, and determining a state based on the received command. In addition, the method includes updating at least one data matrix based on the determined state, unique job identifier and CPU channel path and operating the controller based on the updated data matrix.
    Type: Grant
    Filed: February 23, 2015
    Date of Patent: March 8, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Brian D. Clark, Juan A. Coronado, Beth A. Peterson
  • Patent number: 9262173
    Abstract: A method and apparatus for detecting lock instructions and lock release instruction, as well as predicting critical sections is herein described. A lock instruction is detected with detection logic, which potentially resides in decode logic. A lock instruction entry associated with the lock instruction is stored/created. Address locations and values to be written to those address location of subsequent potential lock release instruction are compared to the address loaded from by the lock instruction and the value load by the lock instruction. If the addresses and values match, it is determined that the lock release instruction matches the lock instruction. A prediction entry stores a reference to the lock instruction, such as a last instruction pointer (LIP), and an associated value to represent the lock instruction is to be elided upon subsequent detection, if it is determined that the lock release instruction matches the lock instruction.
    Type: Grant
    Filed: January 13, 2012
    Date of Patent: February 16, 2016
    Assignee: Intel Corporation
    Inventors: Haitham Akkary, Ravi Rajwar, Srikanth T. Srinivasan
  • Patent number: 9229828
    Abstract: A mechanism is described for achieving high memory reliability, availability, and serviceability (RAS) according to one embodiment of the invention. A method of embodiments of the invention includes detecting a permanent failure of a first memory device of a plurality of memory devices of a first channel of a memory system at a computing system, and eliminating the first failure by merging a first error-correction code (ECC) locator device of the first channel with a second ECC locator device of a second channel, wherein merging is performed at the second channel.
    Type: Grant
    Filed: December 8, 2014
    Date of Patent: January 5, 2016
    Assignee: Intel Corporation
    Inventors: Dableena Das, Kai Cheng, Jonathan C. Jasper
  • Patent number: 9092215
    Abstract: A processor 4 is provided which supports a first instruction set specifying 32-bit architectural registers and a second instruction set specifying 64-bit architectural registers. Each of these instruction sets is presented with its own set of architectural registers for use. The first set of registers presented to the first instruction set has a one-to-one mapping to the second set of registers presented to this second instruction set. The registers which are provided in hardware are 64-bit registers. In some embodiments, when executing program instructions of the first instruction set, only the least significant portion of these 64-bit registers are accessed and manipulated with the remaining most significant portion of the registers being left unaltered.
    Type: Grant
    Filed: February 22, 2011
    Date of Patent: July 28, 2015
    Assignee: ARM Limited
    Inventors: Richard Roy Grisenthwaite, David James Seal
  • Patent number: 9021587
    Abstract: The subject disclosure is directed towards detecting software vulnerabilities in an isolated computing environment. In order to evaluate each input submission from an external computer, a plurality of tasks are automatically generated for execution on one or more computing units running within the isolated computing environment. Various configurations of the one or more computing units are defined in which each computing unit executes the plurality of tasks. A report is produced comprising results associated with such an execution.
    Type: Grant
    Filed: October 27, 2011
    Date of Patent: April 28, 2015
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Nitin Kumar Goel, Kenneth D. Johnson, Matthew Ryan Miller, Navin Narayan Pai, Grzegorz M. Wroblewski, Gregory Justice Riggs
  • Patent number: 9020779
    Abstract: A first of a plurality of data lanes of a first of a plurality of processor links is determined to have a weakest of base performance measurements for the plurality of data lanes. A switching data pattern is transmitted via a first set of the remainder processor links and a quiet data pattern is transmitted via a second set of the remainder processor links. If performance of the first data lane increases vis-à-vis the corresponding base performance measurement, the first set of remainder processor links is eliminated from the remainder processor links. If performance of the first data lanes decreases vis-à-vis the corresponding base performance measurement, the second set of remainder processor links is eliminated from the remainder processor links. The above operations are repeatedly executed until an aggressor processor link that is determined to decrease performance of the first of the plurality of data lanes is identified.
    Type: Grant
    Filed: October 25, 2011
    Date of Patent: April 28, 2015
    Assignee: International Business Machines Corporation
    Inventors: Robert W. Berry, Jr., Anand Haridass, Prasanna Jayaraman
  • Patent number: 8990817
    Abstract: Various systems and methods for automated error recovery in workflows. For example, one method involves receiving an operation indication. The operation indication indicates an operation that is to be performed using a multi-tier application system that includes first and second applications. The first and second applications are implemented using different tiers of the multi-tier application system. The method involves accessing dependency information that indicates first data dependencies between the first and the second applications. The method further involves determining outcome of execution of the operation, where the determining is based on the dependency information but does not include executing the operation.
    Type: Grant
    Filed: September 6, 2012
    Date of Patent: March 24, 2015
    Assignee: Symantec Corporation
    Inventors: Debasish Garai, Sumeet S. Kembhavi
  • Patent number: 8977729
    Abstract: Various system and method embodiments are disclosed that include using a first node to receive messages including error information from a plurality of client computers via a computer network. Recommendations for resolving errors associated with the error information are made available to the client computers via the computer network.
    Type: Grant
    Filed: March 15, 2006
    Date of Patent: March 10, 2015
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Joshua Hawkins, William Brothers, Phil A. Flocken, Jay Shaughnessy, Travis Scott Tripp
  • Patent number: 8972422
    Abstract: A method for managing log messages in a system includes identifying a log message having a data value, filtering a first data value from a historical log record for a first interval, predicting whether any particular system events should occur when the first data value is filtered from a received log record and identifying the corresponding system events, initiating a second interval while filtering the first data value from a received log record, determining whether any non-predicted system events have occurred, and removing the filter for the first data value responsive to determining that a non-predicted system event has occurred.
    Type: Grant
    Filed: November 25, 2013
    Date of Patent: March 3, 2015
    Assignee: International Business Machines Corporation
    Inventors: Eli M. Dow, Erin M. Farr, Douglas M. Zobre
  • Patent number: 8966503
    Abstract: The method includes monitoring a plurality of information handling systems. The method further includes receiving an anomalous event with respect to at least one information handling system of the plurality of information handling systems. In addition, the method includes performing, via at least one correlation handler, at least one correlation algorithm on the anomalous event. Further, the method includes, responsive to the performing, creating, via the correlation handler, at least one composite event. Additionally, the method includes sending the at least one composite event to an event handler. The method also includes issuing, via the event handler, an alert for the at least one composite event.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: February 24, 2015
    Assignee: Dell Software Inc.
    Inventors: Kelly Noel Dyer, David McAleer, Omair-Inam Abdul-Matin
  • Patent number: 8958429
    Abstract: In some embodiments, an apparatus includes a gateway device configured to be operatively coupled to a Fiber Channel switch by a first data port and a second data port. The gateway device is configured to designate the first data port as a primary data port and the second data port as a secondary data port. The gateway device is configured to associate a set of virtual ports with the first data port and not the second data port when in the first configuration. The gateway device is configured to associate the set of virtual ports with the second data port when in the second configuration. The gateway device moves from the first configuration to the second configuration when an error associated with the first data port is detected.
    Type: Grant
    Filed: December 22, 2010
    Date of Patent: February 17, 2015
    Assignee: Juniper Networks, Inc.
    Inventors: Amit Shukla, Suresh Boddapati
  • Patent number: 8942337
    Abstract: The accuracy of data processing operations in implantable medical devices is improved through reductions in errors associated with data acquisition, reading, and transmission. In one embodiment, two or more circuit modules of the device are operated at different clock speeds and a voting scheme is utilized to obtain a valid data value from one of the modules. The disclosure describes methods, devices and systems that utilize the voting schemes to eliminate errors induced by race conditions in obtaining the valid data values by obtaining a plurality of data samples during operation of the circuit modules at the different clock speeds and selecting from among the data samples the valid data value.
    Type: Grant
    Filed: April 25, 2012
    Date of Patent: January 27, 2015
    Assignee: Medtronic, Inc.
    Inventor: Robert A. Corey
  • Patent number: 8938409
    Abstract: A method analyzes a quality control strategy. A quality control rule can define quality control events and specifying a control limit for determining whether a quality control event passes or fails. The quality control rule and a number of patient samples tested between quality control events can be received. A first expected number of correctible errors when a quality control event fails can be computed based on the quality control rule and the number of patient samples tested between quality control events. A second expected number of final errors that are not correctible when a quality control event fails can be computed based on the quality control rule and the number of patient samples tested between quality control events. An assessment of the quality control rule can include the first expected number of correctible errors and the second expected number of final errors as separate values.
    Type: Grant
    Filed: April 4, 2014
    Date of Patent: January 20, 2015
    Assignee: Bio-Rad Laboratories, Inc.
    Inventors: Curtis Alan Parvin, John C. Yundt-Pacheco
  • Patent number: 8930325
    Abstract: According to one embodiment of the present invention, a system analyzes data in response to detecting occurrence of an event, and includes a computer system including at least one processor. The system maps fields between the data and a fingerprint definition identifying relevant fields of the data to produce a fingerprint for the data. The data is deleted after occurrence of the event. The produced fingerprint is stored in a data repository, and retrieved in response to detection of the event occurrence after the data has been deleted. The system analyzes the retrieved fingerprint to evaluate an impact of the event on corresponding deleted data. Embodiments of the present invention further include a method and computer program product for analyzing data in response to detecting occurrence of an event in substantially the same manner described above.
    Type: Grant
    Filed: February 15, 2012
    Date of Patent: January 6, 2015
    Assignee: International Business Machines Corporation
    Inventors: Kristen E. Cochrane, Ivan M. Milman, Martin Oberhofer, Donald A. Padilla
  • Patent number: 8930326
    Abstract: According to one embodiment of the present invention, a system analyzes data in response to detecting occurrence of an event, and includes a computer system including at least one processor. The system maps fields between the data and a fingerprint definition identifying relevant fields of the data to produce a fingerprint for the data. The data is deleted after occurrence of the event. The produced fingerprint is stored in a data repository, and retrieved in response to detection of the event occurrence after the data has been deleted. The system analyzes the retrieved fingerprint to evaluate an impact of the event on corresponding deleted data. Embodiments of the present invention further include a method and computer program product for analyzing data in response to detecting occurrence of an event in substantially the same manner described above.
    Type: Grant
    Filed: February 27, 2012
    Date of Patent: January 6, 2015
    Assignee: International Business Machines Corporation
    Inventors: Kristen E. Cochrane, Ivan M. Milman, Martin Oberhofer, Donald A. Padilla
  • Patent number: 8924333
    Abstract: An approach is provided for detecting an anomaly in a processing environment. The approach includes using a processor to obtain a series of values collected within a processing interval of the processor in the processing environment. The processor normalizes this first series of values to obtain a first series of normalized values. A second series of normalized values is generated by applying a predictive filter to the first series of normalized values. A comparison score is generated from the normalized values by comparing the first series of normalized values and the second series of normalized values. The approach then determines whether the comparison score represents an anomaly relative to at least one other comparison score derived from values collected within the processing interval.
    Type: Grant
    Filed: July 26, 2012
    Date of Patent: December 30, 2014
    Assignee: International Business Machines Corporation
    Inventor: Alain E. Biem
  • Patent number: 8918677
    Abstract: A report generator of a storage area network management application includes a data validation mechanism that validates data related to managed resources operating in a storage area network. The data validation mechanism obtains first and second data sets concerning first and second characteristics of a resource operating in the storage area network and applies at least one data validation test using data sets to detect inconsistencies in data in the first and second data sets associated with the resource operating in the storage area network. Values can be compared in different columns of the same or different reports to detect report integrity errors or data mining errors. The report generator provides a storage area network management report based on data of the first data set and the second data set that accounts for inconsistencies in data associated with the resource as detected by the at least one data validation test.
    Type: Grant
    Filed: September 30, 2004
    Date of Patent: December 23, 2014
    Assignee: EMC Corporation
    Inventors: Serge Marokhovsky, Christopher A. Chaulk, Yongmei Xu
  • Patent number: 8918371
    Abstract: Various of the disclosed embodiments provide systems and methods to compensate for certain event log errors. For example, when a system fails to record the occurrence of several events (a file closing, a file modification, a network socket opening, etc.) the disclosed embodiments may identify the discrepancy and provide a synthesized event sequence suitable to fulfill the purposes of the event log. In this manner, for example, a client may still be accurately billed for their use of a licensed software or system, even if their usage was punctuated with occasional failures to record their activity.
    Type: Grant
    Filed: May 27, 2014
    Date of Patent: December 23, 2014
    Assignee: Flexera Software LLC
    Inventors: Alexander Prikhodko, David Znidarsic
  • Patent number: 8914317
    Abstract: An approach is provided for detecting an anomaly in a processing environment. The approach includes using a processor to obtain a series of values collected within a processing interval of the processor in the processing environment. The processor normalizes this first series of values to obtain a first series of normalized values. A second series of normalized values is generated by applying a predictive filter to the first series of normalized values. A comparison score is generated from the normalized values by comparing the first series of normalized values and the second series of normalized values. The approach then determines whether the comparison score represents an anomaly relative to at least one other comparison score derived from values collected within the processing interval.
    Type: Grant
    Filed: June 28, 2012
    Date of Patent: December 16, 2014
    Assignee: International Business Machines Corporation
    Inventor: Alain E. Biem
  • Patent number: 8904352
    Abstract: Systems and methods consistent with the invention may include displaying, during debugging of source code having corresponding executable code, a screen including a first section, wherein a variable name included in the source code is displayed in a first format in the first section, receiving a user selection of the variable name, converting, by using a processor, the first format of the variable name to a second format in response to the received selection, wherein the variable name includes a plurality of characters and converting the first format of the variable name to the second format includes converting the characters to uppercase, searching for a corresponding variable name in the executable code, and displaying, on the display device, a second section including the corresponding variable name, wherein the variable name is displayed in a third format in the second section.
    Type: Grant
    Filed: June 23, 2010
    Date of Patent: December 2, 2014
    Assignee: SAP SE
    Inventors: Udo Klein, Daniel Hutzel
  • Patent number: 8904090
    Abstract: A flash memory and a method of writing data to a flash memory during garbage collection of the flash memory is provided. First, a garbage collection process on a victim block of flash memory may be initiated. A garbage collection process may comprise a plurality of garbage collection operation. A program command and corresponding program data may be received. After a first garbage collection operation has finished and a portion of flash data from the victim block has been written to a free block, a portion of the program data may be written to that free block. If data remains in the victim block, a second garbage collection operation may be performed.
    Type: Grant
    Filed: November 4, 2011
    Date of Patent: December 2, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung Hoon Baek, Won Moon Cheon
  • Patent number: 8897713
    Abstract: A system, method, and computer program product for wireless network monitoring. Some particular features of various embodiments include notification via mobile phones (or other wireless devices) of outages in the wireless environment, an automated incident log, a web page to enter the resolution of an outage, a contact list containing personnel who could potential be contacted during an outage, and pop up messages that occur when an outage is detected.
    Type: Grant
    Filed: March 15, 2005
    Date of Patent: November 25, 2014
    Assignee: Hewlett-Packard Development Company, L. P.
    Inventors: Douglas E. Luffman, Fred F. Moore, III
  • Patent number: 8893139
    Abstract: A method and system for achieving time-awareness in the highly available, fault-tolerant execution of components in a distributed computing system, without requiring the writer of these components to explicitly write code (such as entity beans or database transactions) to make component state persistent. It is achieved by converting the intrinsically non-deterministic behavior of the distributed system to a deterministic behavior, thus enabling state recovery to be achieved by advantageously efficient checkpoint-replay techniques. The system is deterministic by repeating the execution of the receiving component by processing the messages in the same order as their associated timestamps and time-aware by allowing adjustment of message execution based on time.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: November 18, 2014
    Assignee: International Business Machines Corporation
    Inventors: Robert E. Strom, Chitra Dorai, Huining Feng, Wei Zheng
  • Patent number: 8886832
    Abstract: A data communications system has a plurality of nodes connected by a plurality of links. A subset of the links and nodes forms a worker path for carrying worker data through the communications system, and a further subset of links and nodes provides a protection path for carrying other data in the absence of a fault in the worker path and for providing an alternative path for the worker data in the event of a fault in the worker path. The alternative path is predetermined prior to the detection of a fault in the worker path.
    Type: Grant
    Filed: May 17, 2010
    Date of Patent: November 11, 2014
    Assignee: Ericsson AB
    Inventors: Diego Caviglia, Francesco Lazzeri, Giovanni Fiaschi, Mario Molinari
  • Patent number: 8886582
    Abstract: A system for detecting and locating failures that occur in a complex system includes elements (CAP, MODVAL, MODDP, MODFD) for detecting and locating a failure affecting at least one sub-system of the complex system. The system also includes an element (MODPD) for making a decision on any action to be taken in the event of such detection. A rocket engine can be monitored with this system.
    Type: Grant
    Filed: February 17, 2011
    Date of Patent: November 11, 2014
    Assignee: SNECMA
    Inventors: Serge Le Gonidec, Pierre Bornert, Alban Lemaitre
  • Patent number: 8869173
    Abstract: A method and system for adaptive processing of alert messages exchanged between applications is disclosed. The system may include a diagnostic engine coupled to a plurality of applications. A plurality of application alert messages may be monitored to determine if the alerts exceed a predetermined threshold. If a threshold number of alert messages is exceeded, an interface status based on a diagnostic code for the interface may be determined. A query value for the interface may be adjusted. Based on the amount of the increase in the alert messages, different actions may be indicated. An administrator for the application interface or for equipment associated with the interface may be notified for servicing the equipment.
    Type: Grant
    Filed: October 2, 2012
    Date of Patent: October 21, 2014
    Assignee: AT&T Intellectual Property I, L.P.
    Inventors: Zhiqiang Qian, Paritosh Bajpay, Jackson Liu, Michael John Zinnikas
  • Patent number: 8863130
    Abstract: A system initiates multiple instances of a concurrent computing process, establishes a communication channel among the multiple instances, initiates execution of a computational job on the multiple instances, detects an interrupt request on one of the multiple instances, and terminates execution of the computational job while maintaining communication among the multiple instances via the communication channel.
    Type: Grant
    Filed: June 26, 2012
    Date of Patent: October 14, 2014
    Assignee: The MathWorks, Inc.
    Inventors: Edric Ellis, Jocelyn Luke Martin
  • Patent number: 8843680
    Abstract: Each communication path between controllers and a plurality of storage devices has a plurality of expanders coupled in series. In order to shorten the time during which the communication path is not used for I/O, either (A) the length of time for which I/O suppression is set for the communication path is shortened, or (B) the overall time it takes for processing other than I/O processing is shortened. In the (A), a determination as to whether or not the coupling between the expanders has been disconnected is made for the I/O-suppressed communication path, and in a case where the result of this determination is negative, a discover process is carried out after releasing the I/O suppression with respect to this communication path. In the (B), the number of command issue times of updating routing control information of the expander is reduced.
    Type: Grant
    Filed: May 10, 2013
    Date of Patent: September 23, 2014
    Assignee: Hitachi, Ltd.
    Inventors: Yoshifumi Mimata, Yoshihiro Oikawa
  • Patent number: 8839257
    Abstract: Command sequencing may be provided. Upon receiving a plurality of action requests, an ordered queue comprising at least some of the plurality of actions may be created. The actions may then be performed in the queue's order.
    Type: Grant
    Filed: November 22, 2011
    Date of Patent: September 16, 2014
    Assignee: Microsoft Corporation
    Inventors: Andrey Lukyanov, Rajmohan Rajagopalan, Shane Brady
  • Patent number: 8811155
    Abstract: The disclosed embodiments relate to a system and method for compensating for a satellite gateway failure. There is provided a system comprising a first satellite gateway, and a second satellite gateway (14) coupled to the first satellite gateway and configured to automatically redistribute transponders assigned to the first satellite gateway to create a new transponder allocation if the first satellite gateway fails.
    Type: Grant
    Filed: October 26, 2005
    Date of Patent: August 19, 2014
    Assignee: Thomson Licensing
    Inventors: Barry Jay Weber, Gary Robert Gutknecht
  • Patent number: 8806179
    Abstract: A non-quiescing key setting facility is provided that enables manipulation of storage keys to be performed without quiescing operations of other processors of a multiprocessor system. With this facility, a storage key, which is accessible by a plurality of processors of the multiprocessor system, is updated absent a quiesce of operations of the plurality of processors. Since the storage key is updated absent quiescing of other operations, the storage key may be observed by a processor as having one value at the start of an operation performed by the processor and a second value at the end of the operation. A mechanism is provided to enable the operation to continue, avoiding a fatal exception.
    Type: Grant
    Filed: December 15, 2009
    Date of Patent: August 12, 2014
    Assignee: International Business Machines Corporation
    Inventors: Dan F. Greiner, Christian Jacobi, Chung-Lung K. Shum, Timothy J. Slegel
  • Patent number: 8793514
    Abstract: According to one embodiment, a server system includes a motherboard partition that includes a motherboard and at least one processor coupled to the motherboard, with each processor being coupled to a memory. The server system also includes a storage partition that includes the memory, and a power circuit being capable of supplying current to the motherboard partition and the storage partition independently, the power circuit including at least two redundant power supplies in parallel in the power circuit, with each redundant power supply being capable of providing an amount of current necessary to operate the server system, and the motherboard partition is adapted to run a server OS. In another embodiment, an active cluster system may include two server systems, with the motherboard partition from each server system being capable of communicating with the other server system's storage partition even if power is removed from the other system's motherboard partition.
    Type: Grant
    Filed: March 22, 2011
    Date of Patent: July 29, 2014
    Assignee: International Business Machines Corporation
    Inventor: Joseph W. Dain
  • Patent number: 8768642
    Abstract: The present invention systems and methods facilitate configuration of functional components included in a remotely located integrated circuit die. In one exemplary implementation, a die functional component reconfiguration request process is engaged in wherein a system requests a reconfiguration code from a remote centralized resource. A reconfiguration code production process is executed in which a request for a reconfiguration code and a permission indicator are received, validity of permission indicator is analyzed, and a reconfiguration code is provided if the permission indicator is valid. A die functional component configuration process is performed on the die when an appropriate reconfiguration code is received by the die. The functional component configuration process includes directing alteration of a functional component configuration. Workflow is diverted from disabled functional components to enabled functional components.
    Type: Grant
    Filed: December 18, 2003
    Date of Patent: July 1, 2014
    Assignee: Nvidia Corporation
    Inventors: Michael B. Diamond, John S. Montrym, James M. Van Dyke, Michael B. Nagy, Sean J. Treichler
  • Patent number: 8762126
    Abstract: Analyzing simulated operation of a computer including loading user-defined dynamically linked analysis libraries that each include specifications of events to be traced for analysis, including: executing, in separate hardware threads, one trace buffer handler for each analysis library, and associating, with each trace buffer handler, one or more analysis functions; translating static binary instructions for the simulated computer into binary instructions for the executing computer, including: inserting, into the translation, implementing code for each specification of an event to be traced and inserting, into the translation for each static instruction, a memory address of a separate static instruction buffer; executing the translation, including executing the implementing code and generating, in a trace buffer, one or more trace records for each specified event; and processing the trace buffer, including calling analysis functions and associating by the analysis functions through the separate static instruct
    Type: Grant
    Filed: January 5, 2011
    Date of Patent: June 24, 2014
    Assignee: International Business Machines Corporation
    Inventors: Patrick J. Bohrer, Ahmed Gheith, James L. Peterson
  • Patent number: 8762301
    Abstract: An exemplary embodiment includes a diagnostic which can identify the source, or “root cause” of variability of process and process control parameters. A plurality of correlations is provided, each representing a possible cause of variation. One of the correlations is identified as the most likely root cause of variation. The remaining possible root causes are also listed, in sequence, from most likely to least likely. The method applies to both normal and abnormal operating conditions.
    Type: Grant
    Filed: October 12, 2011
    Date of Patent: June 24, 2014
    Assignee: Metso Automation USA Inc.
    Inventor: George Charles Buckbee, Jr.
  • Patent number: 8763015
    Abstract: Event management techniques for use in a computer system comprising an event generating component generating at least one event and an event handling component to apply one or more business process rules in response to the event. In one embodiment of the invention, an event generation component provides to an event handling component not only notification of an event but also context information about the event, in the same communication. The context information may provide all the information necessary for the event handling component to apply one or more business policy rules to determine how to handle the event. In some implementations having multiple event handling components of different types, the event generating component may be configured to provide notification of events to the event handling components in a specified order. In some implementations, multiple event handling components may be joined in a logical pool, sharing responsibility for handling events.
    Type: Grant
    Filed: September 30, 2008
    Date of Patent: June 24, 2014
    Assignee: EMC Corporation
    Inventors: Frank S. Caccavale, Sridhar Villapakkam, Ajit Bhagwat, Luc Van Brabant, Frederic Corniquet