Abstract: The reliability of output data is enhanced, and the frequency of stopping arithmetic devices is reduced. A redundant system includes an input device; a plurality of arithmetic devices that receive input data from the input device; and an output device that receives output data output from the arithmetic devices, the redundant system causing the arithmetic devices to perform the same processing. Each of the arithmetic devices includes: a first communication unit that acquires the input data from the input device; and a second communication unit that sends the input data acquired by the first communication unit to other arithmetic device and receives the input data acquired by the other arithmetic device from the other arithmetic device.

Abstract: An apparatus with circuit redundancy includes a set of parallel arithmetic logic units (ALUs), a redundant parallel ALU, input data shifting logic that is coupled to the set of parallel ALUs and that is operatively coupled to the redundant parallel ALU. The input data shifting logic shifts input data for a defective ALU, in a first direction, to a neighboring ALU in the set. When the neighboring ALU is the last or end ALU in the set, the shifting logic continues to shift the input data for the end ALU that is not defective, to the redundant parallel ALU. The redundant parallel ALU then operates for the defective ALU. Output data shifting logic is coupled to an output of the parallel redundant ALU and all other ALU outputs to shift the output data in a second and opposite direction than the input shifting logic, to realign output of data for continued processing, including for storage or for further processing by other circuitry.