Error Avoidance, E.g., Error Spreading Countermeasures, Fault Avoidance, Etc. (epo) Patents (Class 714/E11.144)
  • Patent number: 8732296
    Abstract: A system, method, and computer program product are provided for redirecting internet relay chat (IRC) traffic identified utilizing a port-independent algorithm and controlling IRC based malware. In use, IRC traffic communicated via a network is identified utilizing a port-independent algorithm. Furthermore, the IRC traffic is redirected to a honeypot.
    Type: Grant
    Filed: May 6, 2009
    Date of Patent: May 20, 2014
    Assignee: McAfee, Inc.
    Inventors: Vinoo Thomas, Nitin Jyoti, Cedric Cochin, Rachit Mathur
  • Publication number: 20140101492
    Abstract: Systems, methods, and other embodiments associated with adaptively determining a preventive maintenance schedule based on historical system operation are described. The prognostic parameter values are continuously partitioned into a number of operating states based on observed maintenance costs associated with the prognostic parameter values. The operating states range from absolutely healthy, one or more degrees of degradation, to fully degraded. A system cost function is used as the discriminant function. The system cost function is an expected maintenance cost when a given preventive maintenance (PM) schedule is adopted. The system cost function calculates the expected cost based on the observed cost of operation in each of the operating states and a probability of the computing system being in each of the operating states as determined by the PM schedule. The PM schedule that minimizes the cost function is determined to be the optimal PM schedule.
    Type: Application
    Filed: October 9, 2012
    Publication date: April 10, 2014
    Applicant: ORACLE INTERNATIONAL CORPORATION
    Inventors: Yuri LANGER, Aleksey URMANOV, Anton BOUGAEV
  • Publication number: 20140089746
    Abstract: A request is received by a first computer. The first computer delegates the first request to a second computer. The second computer attempts to process the first request and identifies an imminent fault as a result of the attempt. The second computer sends a message to the first computer indicating an imminent fault as a result of the attempted processing of the first request. The first computer sends a message to a third computer indicating that a second request matching the first request should not be processed.
    Type: Application
    Filed: September 27, 2012
    Publication date: March 27, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: INTERNATIONAL BUSINESS MACHINES CORPORATON
  • Publication number: 20140089743
    Abstract: A method includes, in a host that stores data in a storage device, detecting an event that is indicative, statistically and not deterministically, of an imminent power shutdown in the host. A notification is sent to the storage device responsively to the detected event, so as to cause the storage device to initiate preparatory action for the imminent power shutdown.
    Type: Application
    Filed: September 27, 2012
    Publication date: March 27, 2014
    Applicant: APPLE INC.
    Inventors: Avraham Poza Meir, Shai Ojalvo, Moshe Neerman
  • Publication number: 20140089726
    Abstract: Examples disclosed herein relate to determining whether a right to use memory modules in a reliability mode has been acquired. Examples include determining whether the right to use a plurality of memory modules in a reliability mode has been acquired, if a performance mode is selected for operation of the plurality of memory modules.
    Type: Application
    Filed: September 27, 2012
    Publication date: March 27, 2014
    Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
    Inventor: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
  • Publication number: 20130111279
    Abstract: A method includes generating a replacement default read threshold at least partially based on a default read threshold and on an updated read threshold. The method also includes sending the replacement default read threshold to the memory.
    Type: Application
    Filed: November 2, 2011
    Publication date: May 2, 2013
    Applicant: SANDISK TECHNOLOGIES INC.
    Inventors: SEUNGJUNE JEON, STEVEN CHENG
  • Publication number: 20130097464
    Abstract: Embodiments associate software applications with computing resources based on failure correlation information and an anti-affinity rule. An anti-affinity rule indicates that a first software application is to be separated from a second software application during execution. A management device determines failure correlations between a first computing resource that is associated with the first software application and a plurality of computing resources other than the first computing resource. The management device selects the computing resource that corresponds to the lowest failure correlation and associates the second software application with the selected computing resource based on the anti-affinity rule.
    Type: Application
    Filed: October 13, 2011
    Publication date: April 18, 2013
    Applicant: VMWARE, INC.
    Inventors: Irfan AHMAD, Anne Marie HOLLER, Mustafa UYSAL
  • Publication number: 20130097454
    Abstract: An electronic device capable of communicating with a plurality of servers includes a storage unit, a vibration unit, a control unit, and a communication unit. The storage unit stores a vibration threshold value. The vibration sensor senses a vibration magnitude of the electronic device. The control unit generates control signals and transmits the control signals to the servers via the communication unit to direct the servers to take certain actions to protect data when the vibration magnitude sensed by the vibration sensor is equal to or greater than the vibration threshold value.
    Type: Application
    Filed: November 25, 2011
    Publication date: April 18, 2013
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventor: CHAO-TSUNG FAN
  • Publication number: 20130047041
    Abstract: A content provider computing device that transmits content to receivers at scheduled air times receives information regarding conditions relating to the transmissions. The computing device also receives data regarding content that a receiver will record. The computing device evaluates the information and compares it with the data to determine that there is a risk of interrupted transmission. As a result, the computing device transmits the content to the receiver prior to the scheduled air time. The conditions may include weather conditions, power outage conditions, and/or any other conditions that may affect transmission. In various implementations, the computing device may include content controls prior to transmission that prevent the content from being accessed prior to specified times. In some cases, the content control may prevent all access. In other cases, the content control may prevent some kinds of access to the instance of content prior to particular times and allow others.
    Type: Application
    Filed: August 15, 2011
    Publication date: February 21, 2013
    Applicant: EchoStar Technologies L.L.C
    Inventor: Mi Chen
  • Publication number: 20130031425
    Abstract: This disclosure describes methods, systems and software that can be used to calculate the estimated mean time to data loss for a particular configuration of a disk group. For example, a system can be used to evaluate a plurality of configurations, and/or to select (and/or allow a user to select) an optimal configuration of the disk group, based, in some cases, on the relative estimated mean times to data loss of the various configurations. This can allow, if desired, the configuration of the disk group to minimize the likelihood of data loss in the disk group.
    Type: Application
    Filed: October 8, 2012
    Publication date: January 31, 2013
    Applicant: Oracle International Corporation
    Inventor: Radek Vingralek
  • Publication number: 20120216068
    Abstract: An application can specify reliability values via a communication path between the application and the registers. Application reliability could increase if the application itself could specify the timeout and retry values. For instance, some errors might be prevented if the timeout value is lengthened by a short amount. A longer timeout value would result in slower performance because the memory component could not be accessed during the timeout period. However, resolving errors in memory devices would prevent unrecoverable error indicators from being returned to the application, which would in turn limit application and system crashes.
    Type: Application
    Filed: April 27, 2012
    Publication date: August 23, 2012
    Applicant: International Business Machines Corporation
    Inventors: Jay W. Carman, Anshuman Khandual, Jyotindra Patel
  • Publication number: 20120216091
    Abstract: A method of testing a target electronic device implemented in a configurable integrated circuit device includes receiving a baseline design for the target electronic device in a hardware description language, establishing a fault model for the particular configurable integrated circuit device, synthesizing the fault model in the hardware description language, embedding the synthesized fault model into the baseline design to create a modified baseline design in the hardware description language which enables one or more targeted signals to be selectively corrupted, creating a fault model enabled target device on the particular configurable integrated circuit device using the modified baseline design, performing a number of fault injection experiments on the fault model enabled target device, wherein each fault injection experiment includes causing at least one of the one or more targeted signals to be corrupted within the fault model enabled target device.
    Type: Application
    Filed: September 21, 2011
    Publication date: August 23, 2012
    Applicant: Ansaldo STS USA, Inc.
    Inventors: Kevin Joseph Blostic, James Jacob Riling, Adam Edward Szymkowiak, Todd Anthony DeLong, Joseph William Reutzel, Anthony Pietro Mancini, II
  • Publication number: 20120192010
    Abstract: A method for data isolation while sharing information by a plurality of emulated users for evaluating a performance of a server executing an application may include creating a master profile for use by the plurality of emulated users. The master profile may be configured to hold shared user related configuration information shared by the emulated users. The method may also include creating script profiles configured for a specific emulated user of the emulated users. A non-transitory computer readable medium and system are also disclosed.
    Type: Application
    Filed: January 25, 2011
    Publication date: July 26, 2012
    Inventors: Svetlana ARONOV, Sagi MONZA, Michal BARAK, Arnon MATHIAS
  • Publication number: 20120137194
    Abstract: A method of performing forward error correction with configurable latency, where a configurable latency algorithm evaluates a target Bit Error Rate (BER) against an actual BER and adjusts the size of a configurable buffer such that the target BER may be achieved when utilizing the smallest buffer size possible. When errors are corrected without the utilization of each of the configurable buffer locations, the algorithm reduces the size of the buffer by y buffer locations; the algorithm may continue to successively reduce the size of said buffer until the minimum number of buffer locations are utilized to achieve the target BER. If the buffer locations have been reduced such that the buffer size is too small and the target BER cannot be achieved, the algorithm may increase the size of the buffer until the minimum number of buffer locations are utilized to achieve the target BER.
    Type: Application
    Filed: November 26, 2010
    Publication date: May 31, 2012
    Applicant: Avalon Microelectronics, Inc.
    Inventors: Wally Haas, Chuck Rumbolt
  • Patent number: 8190763
    Abstract: A method of detecting and isolating a fault includes collecting information regarding utilization of a resource of a device. The method further includes predicting the fault based on the information and modifying operation of the device in response to the fault.
    Type: Grant
    Filed: January 10, 2008
    Date of Patent: May 29, 2012
    Assignee: AT&T Intellectual Property I, LP
    Inventors: Raghvendra Savoor, Zhi Li, Jian Li, Arvind Ramdas Mallya
  • Publication number: 20120131389
    Abstract: Methods and systems for cross-layer forgiveness exploitation include executing one or more applications using a processing platform that includes a first reliable processing core and at least one additional processing core having a lower reliability than the first processing core, modifying application execution according to one or more best-effort techniques to improve performance, and controlling parameters associated with the processing platform and the best-effort layer that control performance and error rate such that performance is maximized in a region of low hardware-software interference.
    Type: Application
    Filed: November 18, 2011
    Publication date: May 24, 2012
    Applicant: NEC Laboratories America, Inc.
    Inventors: Srimat Chakradhar, Hyungmin Cho, Anand Raghunathan
  • Publication number: 20120023374
    Abstract: The embodiments provide a failure diagnosis method for a main memory in an information processing device equipped with a write-back cache. According to the method, an application program stored in the main memory is divided by the storage size of write-back cache, and the regions are stored in advance. Then, a read signal from the main memory to the write-back cache is detected. It is determined whether the region corresponding to the read signal has yet to be diagnosed. If the region has yet to be diagnosed, a command to diagnose failure of the region is issued. If a write signal (write back) to a particular region is detected during the diagnosis of the particular region, the diagnosis of the particular region is stopped. Thus, the failure diagnosis of the main memory is executed in parallel with the execution of the application program.
    Type: Application
    Filed: February 11, 2011
    Publication date: January 26, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Naoya OHNISHI, Hiroshi Nakatani, Yoshito Sameda
  • Publication number: 20110302456
    Abstract: A current measurement unit measuring power supply currents each consumed in a plurality of circuit blocks of which at least one of the circuit blocks includes a processor, and outputting the measurement result as the power supply current values. A selection unit selecting at least one of the power supply current values according to selection information, A trace buffer sequentially holding the power supply current values being selected by the selection unit together with execution information of the processor, and sequentially outputting the held information. By selecting the power supply current values of the circuit blocks required for debugging according to the selection information, the number of external terminals of a semiconductor integrated circuit required for the debugging which includes tracing the power supply current values may be reduced. As a result, a chip size of the semiconductor integrated circuit with a debug function may be reduced.
    Type: Application
    Filed: January 26, 2011
    Publication date: December 8, 2011
    Applicant: FUJITSU SEMICONDUCTOR LIMITED
    Inventors: Takashi Sato, Toshiaki Saruwatari, Ken Ryu
  • Publication number: 20110296242
    Abstract: A method, system, and computer usable program product for energy-efficient soft error failure detection and masking are provided in the illustrative embodiments. A soft error is injected to occur during execution of a set of instructions. If an output of the execution of the set of instructions is incorrect, a record is made of the instruction that was affected by the injected soft error and led to the incorrect result. This identified instruction is designated as vulnerable to the soft error. Several soft errors are injected with different input data sets over several executions of the same set of instructions, and a probability of each instruction in the instruction set is computed, the probability of an instruction accounting for the vulnerability of the execution of the instruction sets to errors that affect the instruction. A report including several probabilities of instruction vulnerabilities is produced.
    Type: Application
    Filed: May 27, 2010
    Publication date: December 1, 2011
    Inventors: ELMOOTAZBELLAH NABIL ELNOZAHY, MARK WILLIAM STEPHENSON
  • Publication number: 20110296249
    Abstract: There is provided a computer-implemented method for selecting from a plurality of full configurations of a storage system an operational configuration for executing an application. An exemplary method comprises obtaining application performance data for the application on each of a plurality of test configurations. The exemplary method also comprises obtaining benchmark performance data with respect to execution of a benchmark on the plurality of full configurations, one or more degraded configurations of the full configurations and the plurality of test configurations. The exemplary method additionally comprises estimating a metric for executing the application on each of the plurality of full configurations based on the application performance data and the benchmark performance data. The operational configuration may be selected from among the plurality full configurations based on the metric.
    Type: Application
    Filed: May 26, 2010
    Publication date: December 1, 2011
    Inventors: Arif A. Merchant, Ludmila Cherkasova
  • Publication number: 20110296228
    Abstract: A method, system, and computer usable program product for tolerating soft errors by selective duplication are provided in the illustrative embodiments. An application executing in a data processing system, selects an instruction that has to be protected from soft errors. The instruction is marked for duplication such that the instruction is duplicated during execution of the instruction. The marked instruction is sent for execution to a hardware front end.
    Type: Application
    Filed: May 27, 2010
    Publication date: December 1, 2011
    Applicant: International Business Machines Corporation
    Inventors: ELMOOTAZBELLAH NABIL ELNOZAHY, Mark William Stephenson
  • Publication number: 20110271163
    Abstract: A method for adapting error protection in a communication network includes: a step of determining periods of time that are homogeneous as regards the distribution law of losses over the network, a step of classifying the homogeneous periods of time into at least two classes, on the basis of information representing losses over the network and/or representing a corresponding level of protection, during these periods of time, a step of determining a probability of alternation between two of said classes, and a step of selecting a protection strategy on the basis of said probability of alternation. A method of detecting transition between two states of a communication network corresponding to different loss rates of sent data includes: a step of determining a probability of transition, and a step of determining the existence of a transition on the basis of said probability.
    Type: Application
    Filed: April 4, 2011
    Publication date: November 3, 2011
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: HERVÉ LE FLOCH, FRÉDÉRIC MAZE, ERIC NASSOR
  • Publication number: 20110225462
    Abstract: An operations management apparatus which acquires performance information for each of a plurality of performance items from a plurality of controlled units and manages operation of the controlled units includes a correlation model generation unit which derives a correlation function between a first series of performance information that indicates time series variation about a first element and a second series of performance information that indicates time series variation about a second element, generates a correlation model between the first element and the second element based on the correlation function, and obtains the correlation model for each element pair of the performance information, and a correlation change analysis unit which analyzes a change in the correlation model based on the performance information acquired newly which has not been used for generation of the correlation model.
    Type: Application
    Filed: May 23, 2011
    Publication date: September 15, 2011
    Inventor: KIYOSHI KATO
  • Publication number: 20110214112
    Abstract: Embodiments relate to systems and methods for generating predictive diagnostics via a package update manager. A physical or virtual client machine can host a set of installed software packages, including operating system, application, and/or other software. A package manager tracks the set of installed packages and updates available for the installed set. A notification tool, in conjunction with the package manager, can monitor the user's selection of package update options, and compare those updates to a diagnostic database, a current state of the client machine, and/or other resources. Based on those determinations, the notification tool can generate notifications to the user advising them of potential conflicts, faults, or other conditions that may arise due to, or may surround, the prospective package update. The notification can permit the user to continue or terminate selected updates, before those updates are attempted and cause potential conflicts.
    Type: Application
    Filed: February 26, 2010
    Publication date: September 1, 2011
    Inventors: Seth Kelby Vidal, James Antill
  • Publication number: 20110214005
    Abstract: Systems and methods for reducing risk of service interruptions for one or more virtual machines (VMs) in a computing environment are provided. The method comprises computing a placement scheme for placing at least one VM on one or more hosts according to a set of placement constraints defined for the VM, wherein the set of placement constraints comprises at least one availability constraint defined for the VM, wherein the availability constraint designates a N resiliency level, wherein N corresponds to number of host failures that may occur before the services provided by the VM are interrupted.
    Type: Application
    Filed: March 1, 2010
    Publication date: September 1, 2011
    Applicant: International Business Machines Corporation
    Inventors: Ofer Biran, Erez Hadad, Elliot K. Kolodner, Dean H. Lorenz, Yosef Moati
  • Publication number: 20110214021
    Abstract: Embodiments relate to systems and methods for systems and methods for initiating software repairs in conjunction with software package updates. A physical or virtual client machine can host a set of installed software packages, including operating system, application, and/or other software. A package manager tracks the set of installed packages and updates available for the installed set. A notification tool, in conjunction with the package manager, can monitor the user's selection of package update options, and compare those updates to a diagnostic database, current state of the client machine, or other resources. Based on those determinations, the notification tool can generate one or more potential software repair actions to correct or avoid potential conflicts, faults, or other conditions that may arise due to, or may surround, the prospective package update.
    Type: Application
    Filed: February 26, 2010
    Publication date: September 1, 2011
    Inventors: Seth Kelby VIDAL, James Antill
  • Publication number: 20110214018
    Abstract: Embodiments relate to systems and methods for diagnostic notification via a package update manager. A physical or virtual client machine can host a set of installed software packages, including operating system, application, and/or other software. A package manager tracks the set of installed packages and updates available for the installed set. A notification tool, in conjunction with the package manager, can monitor the user's selection of package update options, and compare those updates to a diagnostic database and/or current state of the client machine. Based on those determinations, the notification tool can generate notifications to the user advising them of potential conflicts, faults, or other conditions that may arise due to, or may surround, the prospective package update. The notification can permit the user to continue or terminate selected updates, and the notification tool can re-analyze any potential faults after an update is completed.
    Type: Application
    Filed: February 26, 2010
    Publication date: September 1, 2011
    Inventors: Seth Kelby VIDAL, James Antill
  • Publication number: 20110179311
    Abstract: In some embodiments a request is received to perform an error injection or a memory migration, a mode is entered that blocks requests from agents other than a current processor core or thread, the error is injected or the memory is migrated, and the mode that blocks requests from the agents other than the current processor core or thread is exited. Other embodiments are described and claimed.
    Type: Application
    Filed: December 17, 2010
    Publication date: July 21, 2011
    Inventors: Murugasamy K. Nachimuthu, Mohan J. Kumar, Sarathy Jayakumar, Chung-Chi Wang
  • Publication number: 20110167316
    Abstract: The present disclosure relates to a method for interleaving a stream of input data blocks, the method comprising steps of: subdividing a block into sub-blocks of fixed size in number of data rows and data columns, the sub-blocks being distributed in the block in rows of sub-blocks and in columns of sub-blocks, transferring the data contained in the block into a first memory, while respecting the order of the data in the input stream, transferring the data contained in the block by row of sub-blocks, into a second memory in which the data of each sub-block is accessible from the address of the sub-block, transferring the data of each sub-block by column of sub-blocks, from the second memory into a third memory, by putting back the data of each sub-block in data rows and columns, and transferring the data by data column from the third memory into an output stream.
    Type: Application
    Filed: January 5, 2011
    Publication date: July 7, 2011
    Applicant: STMICROELECTRONICS (GRENOBLE 2) SAS
    Inventor: Laurent Paumier
  • Publication number: 20110145666
    Abstract: Scan architectures are commonly used to test digital circuitry in integrated circuits. The present disclosure describes a method of adapting conventional scan architectures into a low power scan architecture. The low power scan architecture maintains the test time of conventional scan architectures, while requiring significantly less operational power than conventional scan architectures. The low power scan architecture is advantageous to IC/die manufacturers since it allows a larger number of circuits (such as DSP or CPU core circuits) embedded in an IC/die to be tested in parallel without consuming too much power within the IC/die. Since the low power scan architecture reduces test power consumption, it is possible to simultaneously test more die on a wafer than previously possible using conventional scan architectures. This allows wafer test times to be reduced which reduces the manufacturing cost of each die on the wafer.
    Type: Application
    Filed: February 21, 2011
    Publication date: June 16, 2011
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Lee D. Whetsel
  • Publication number: 20110145663
    Abstract: Various read level control apparatuses and methods are provided. In various embodiments, the read level control apparatuses may include an error control code (ECC) decoding unit for ECC decoding data read from a storage unit, and a monitoring unit for monitoring a bit error rate (BER) based on the ECC decoded data and the read data. The apparatus may additionally include an error determination unit for determining an error rate of the read data based on the monitored BER, and a level control unit for controlling a read level of the storage unit based on the error rate.
    Type: Application
    Filed: January 5, 2011
    Publication date: June 16, 2011
    Inventors: Jun Jin Kong, Sung Chung Park, Dongku Kang, Dong Hyuk Chae, Seung Jae Lee, Nam Phil Jo, Seung-Hwan Song
  • Publication number: 20110119530
    Abstract: A computer system includes a plurality of computer processor dependent nodes and a plurality of computer processor antecedent nodes. Each node includes a severity value relating to an operational state of the node. A dependent node and an antecedent node pair include a significance value relating to a criticality that the antecedent node has to its paired dependent node. The antecedent node comprises a relevance value, wherein the relevance value is a function of the severity value of the antecedent node and the significance value for the antecedent node and the dependent node. The relevance value is used to determine an impact that the antecedent node has on the paired dependent node.
    Type: Application
    Filed: November 17, 2009
    Publication date: May 19, 2011
    Applicant: Computer Associates Think, Inc.
    Inventor: Peter Anthony Lazzaro
  • Publication number: 20110113293
    Abstract: A data reception device that receives scrambled and transmission data as received data and that descrambles and outputs the data after adjusting the timing with the transmitter has a descramble circuit 10 detect timing adjustment data included in a timing adjustment data set that adjusts the timing with the transmitter in the data which the descramble circuit 10 has not descrambled, and comprises an LFSR suspending signal generation circuit 9 that outputs a required number of LFSR suspending signals, after first normal timing adjustment data has been received, at the output timing of data received thereafter so as to simulate a situation as if a desired number of timing adjustment data included in the timing adjustment data set were received.
    Type: Application
    Filed: November 3, 2010
    Publication date: May 12, 2011
    Inventor: Motoshige IKEDA
  • Publication number: 20110099454
    Abstract: A method of encoding a binary source message u, by calculating x:=Au, calculating y:=B?x, resolving the equation Dp=y for p, and incorporating u and p to produce an encoded binary message v, where A is a matrix formed only of permutation sub matrices, B? is a matrix formed only of circulant permutation sub matrices, and D is a matrix of the form D = ( T 0 … 0 0 0 T … 0 0 … … … … … 0 0 … T 0 I I … I I ) where T is a two-diagonal, circulant sub matrix, and I is an identity sub matrix.
    Type: Application
    Filed: January 6, 2011
    Publication date: April 28, 2011
    Applicant: LSI CORPORATION
    Inventors: Sergey Gribok, Alexander Andreev, Igor Vikhliantsev
  • Publication number: 20110078524
    Abstract: Scan architectures are commonly used to test digital circuitry in integrated circuits. The present invention describes a method of adapting conventional scan architectures into a low power scan architecture. The low power scan architecture maintains the test time of conventional scan architectures, while requiring significantly less operational power than conventional scan architectures. The low power scan architecture is advantageous to IC/die manufacturers since it allows a larger number of circuits (such as DSP or CPU core circuits) embedded in an IC/die to be tested in parallel without consuming too much power within the IC/die. Since the low power scan architecture reduces test power consumption, it is possible to simultaneously test more die on a wafer than previously possible using conventional scan architectures. This allows wafer test times to be reduced which reduces the manufacturing cost of each die on the wafer.
    Type: Application
    Filed: December 7, 2010
    Publication date: March 31, 2011
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Jayashree Saxena, Lee D. Whetsel
  • Publication number: 20110066915
    Abstract: Communication frames transmitted over a communication network may have different QoS requirements for each communication session. The required BER for different types of communication session is selected based at least in part on the required QoS for that communication session. When frames are received, the QoS level associated with the frame is determined Based at least in part on the QoS level, the frames are routed toward the destination over a path that provides BER protection commensurate with the required QoS. Prior to transmission to the destination, the processed frames are multiplexed together into a single stream of segment. On the receiving side, the stream of segments is divided in accordance with the QoS level associated with the segments and the segments are routed over a path that is selected, at least in part, on the QoS level. Over this selected path, the original frames are restored and then provided to the destination node.
    Type: Application
    Filed: August 11, 2010
    Publication date: March 17, 2011
    Inventor: Ram Arye
  • Publication number: 20110055632
    Abstract: Results of field testing of portions of a distributed system such as a Broadband Communications System from a testing device to a controller which downloads programmed test protocols and sequences thereof to the separate testing device over a wired or wireless link and thereafter can be used to control the testing device as well as display test results and provide analysis of the test results and suggest procedures to technical personnel. The controller then can transmit the test data to a central facility or distribution hub in substantially real-time together with work performance data where full technical analysis can be performed. The test data and results of analysis can then be distributed as desired such as to a management analysis facility to support improvement of efficiency of the system and the operation thereof.
    Type: Application
    Filed: August 31, 2009
    Publication date: March 3, 2011
    Inventor: Dennis A. Zimmerman
  • Publication number: 20110004792
    Abstract: A system for chaotic sequence spread spectrum communications includes a transmitter (402) for transmitting information symbols using a chaotic sequence of chips generated at the transmitter, the information symbols having a duration of transmission based on a threshold symbol energy value and the chips. The system also includes a receiver (404) for extracting the information symbols from the transmitted signal using a chaotic sequence of chips generated at the receiver and the threshold symbol energy value. In the system, the chips generated at the transmitter and the receiver are identical and synchronized in time, where the duration of transmission of the information symbols in the carrier is a total duration of a selected number of the chips used for transmitting, and where the number of the chips is selected for the information symbols to provide a total chip energy greater than or equal to the threshold symbol energy value.
    Type: Application
    Filed: July 1, 2009
    Publication date: January 6, 2011
    Applicant: Harris Corporation
    Inventors: Alan J. Michaels, David B. Chester
  • Publication number: 20100318848
    Abstract: This invention relates to automatically establishing a connection between a testing and/or debugging interface to an integrated circuit and a connector of an apparatus, the connector being connectable to a testing and/or debugging apparatus configured to communicate with the testing and/or debugging interface via the connector in a testing and/or debugging mode of the apparatus and connectable to an accessory apparatus to be used in a normal operation mode of the apparatus, if the testing and/or debugging apparatus is connected to the connector, thereby establishing the testing and/or debugging mode of the apparatus.
    Type: Application
    Filed: June 15, 2009
    Publication date: December 16, 2010
    Inventors: Zhigang Yang, Marko Winblad, Rolf Kühnis
  • Publication number: 20100313063
    Abstract: An aspect of the present invention mitigates reduction in availability level during maintenance of nodes in a cluster. In one embodiment, on receiving an indication that a maintenance activity is to be performed on the cluster, a scaling out of the cluster is first performed to add some nodes having the maintenance activity already performed, followed by a scaling in of the cluster to remove some of the nodes in the cluster which do not yet have the maintenance activity performed. The scaling out is performed before any scaling in of the cluster such that the number of nodes available in the cluster after the scaling in is not less than the number of nodes in the cluster at the time of receiving the indication. Accordingly, the reduction in availability level (which is based on the number of nodes available) is mitigated.
    Type: Application
    Filed: June 3, 2009
    Publication date: December 9, 2010
    Applicant: Oracle International Corporation
    Inventors: Hariprasad Nellitheertha Venkataraja, Vijay Srinivas Agneeswaran
  • Publication number: 20100306597
    Abstract: Methods for automatically identifying and classifying a crisis state occurring in a system having a plurality of computer resources. Signals are received from a device that collects the signals from each computer resource in the system. For each epoch, an epoch fingerprint is generated. Upon detecting a performance crisis within the system, a crisis fingerprint is generated consisting of at least one epoch fingerprint. The technology is able to identify that a performance crisis has previously occurred within the datacenter if a generated crisis fingerprint favorably matches any of the model crisis fingerprints stored in a database. The technology may also predict that a crisis is about to occur.
    Type: Application
    Filed: May 28, 2009
    Publication date: December 2, 2010
    Applicant: MICROSOFT CORPORATION
    Inventors: Moises Goldszmidt, Peter Bodik
  • Publication number: 20100306598
    Abstract: Operating computer memory in a computer including dynamically monitoring, by a predictive failure analysis (‘PFA’) module, correctable memory errors and memory temperature and managing cooling resources in the computer in dependence upon the correctable memory errors and memory temperature.
    Type: Application
    Filed: June 2, 2009
    Publication date: December 2, 2010
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jerry D. Ackaret, Robert M. Dunn, Anna H. Siskind, Wilson E. Smith
  • Publication number: 20100306595
    Abstract: A scenario creating apparatus which creates a scenario for verifying operation of an information processing system in which a plurality of servers including a database server are connected, includes a collector that collects messages transmitted and received between the plurality of servers, when operation of the information processing system is being verified by a terminal apparatus that performs verification of operation; an association unit that associates the collected messages with each other; a sorter that sorts work models in ascending order of time at which access is made to the database server, the work models each being a group of the associated messages; and a scenario creating unit that creates the scenario on the basis of the sorted work models.
    Type: Application
    Filed: June 1, 2010
    Publication date: December 2, 2010
    Applicant: FUJITSU LIMITED
    Inventors: Noriaki Murata, Tamami Sugasaka, Ken Yokoyama, Kazuhiro Ikemoto, Yasuo Kubota, Junichi Sakaguchi, Naoki Akaboshi, Taiji Sasage, Syogo Hayashi
  • Publication number: 20100287413
    Abstract: Techniques are generally described for addressing computation errors via coordinated computation on two computing platforms are disclosed. In some embodiments, one or more cuts may be taken of a computation to observe variables, and the observations may be analyzed to detect errors. Corrections may be created for the detected errors. The disclosed techniques may be employed in power and/or energy minimization/reduction, and debugging, among other goals. Other embodiments may be disclosed and/or claimed.
    Type: Application
    Filed: May 11, 2009
    Publication date: November 11, 2010
    Inventor: Miodrag Potkonjak
  • Publication number: 20100275094
    Abstract: In a nonvolatile memory device of the present application, when data of each write unit is read from a nonvolatile memory, an all-clear detector detects whether the read data is already cleared, and a control portion judges whether a flag is already written into a written flag area of the data that has been descrambled by a descrambler and then corrected by an error detection and correction portion. Using a scramble pattern that is generated by a scramble pattern generator and corresponds to the written flag area, a predetermined bit pattern is scrambled to a state that differs from the cleared state.
    Type: Application
    Filed: April 27, 2010
    Publication date: October 28, 2010
    Applicant: PANASONIC CORPORATION
    Inventor: Toshiyuki HONDA
  • Publication number: 20100268993
    Abstract: A method and system of disablement of an exception generating operation of a client system are disclosed. In an embodiment, a method is disclosed in which a snapshot of a client system is acquired. An execution of the client system is recorded, and a system wide exception is intercepted before it causes a client system crash. The execution of the client system is replayed from the snapshot of the client system, and an operation that generates the system wide exception is disabled.
    Type: Application
    Filed: April 15, 2009
    Publication date: October 21, 2010
    Applicant: VMWARE, INC.
    Inventors: Ajay CHAUDHARI, Laxmisha NAGARAJ
  • Publication number: 20100251040
    Abstract: A method and apparatus for evaluating and optimizing a signaling system is described. A pattern of test information is generated in a transmit circuit of the system and is transmitted to a receive circuit. A similar pattern of information is generated in the receive circuit and used as a reference. The receive circuit compares the patterns. Any differences between the patterns are observable. In one embodiment, a linear feedback shift register (LFSR) is implemented to produce patterns. An embodiment of the present disclosure may be practiced with various types of signaling systems, including those with single-ended signals and those with differential signals. An embodiment of the present disclosure may be applied to systems communicating a single bit of information on a single conductor at a given time and to systems communicating multiple bits of information on a single conductor simultaneously.
    Type: Application
    Filed: June 14, 2010
    Publication date: September 30, 2010
    Applicant: RAMBUS INC.
    Inventors: Jared Zerbe, Pak Shing Chau, William Franklin Stonecypher
  • Publication number: 20100251058
    Abstract: A method for transmitting a packet from a transmitter to a receiver in a wireless communication system begins by building a packet by a transport format combination (TFC) selection process, and the packet is transmitted from the transmitter to the receiver. If the transmitter receives an indication that the packet was not successfully received at the receiver, the packet is retransmitted via a hybrid automatic repeat request (HARQ) procedure. If the HARQ procedure did not successfully transmit the packet, then the packet is retransmitted via a retransmission management (RM) procedure. If the RM procedure did not successfully transmit the packet, then the packet is discarded by the transmitter.
    Type: Application
    Filed: June 10, 2010
    Publication date: September 30, 2010
    Applicant: INTERDIGITAL TECHNOLOGY CORPORATION
    Inventors: Arty Chandra, Narayan Parappil Menon, Stephen E. Terry, Junsung Lim
  • Publication number: 20100223502
    Abstract: A system and method are disclosed for generating triggers within a hardware emulator. The system allows for dynamic reconfiguration of the trigger generation scheme during emulation. In one aspect, input probe signals are received on an address port to a memory from an integrated circuit within the emulator. The memory outputs from a data port, data, which is addressed, at least in part, by the input probe signals. The data output from the data port may be sent through further combinatorial logic or directly connected to a logic analyzer and represents trigger information. In another aspect, the trigger generation scheme may be reconfigured dynamically during emulation. For example, where the memory is a dual-port RAM, an emulation host can write to the memory to perform the reconfiguration.
    Type: Application
    Filed: May 10, 2010
    Publication date: September 2, 2010
    Inventors: Gregoire Brunot, Charles Selvidge
  • Publication number: 20100218044
    Abstract: A method and system of supporting and testing equipment distant from the support system are provided. The method includes the steps of forming a communications link between the equipment and the support system, using the support system to measure performance of the equipment and to provide a set of performance data, providing library data relating to the equipment, comparing the performance data with the library data and analysing the compared data whereby to provide a performance diagnosis of the equipment, all in a substantially continuous real time operation.
    Type: Application
    Filed: June 5, 2008
    Publication date: August 26, 2010
    Applicant: Astrium Limited
    Inventors: Terence Alfred Roblett, Graham Anthony Ward