For Interfaces, Buses (epo) Patents (Class 714/E11.201)
  • Patent number: 11836500
    Abstract: A method may include during a Pre-Extensible Firmware Interface Initialization phase of a BIOS, receiving a mailbox command from a management controller of an information handling system, the mailbox command including information regarding a driver image stored in computer-readable media associated with the BIOS, the information including uniquely-identifying information for the driver image. The method may also include, during a Driver Execution Environment phase of the BIOS, locating the driver image stored in the computer-readable media, verifying the driver image based on the information from the mailbox command, extracting the driver image from the computer-readable media in response to verifying the driver image, and causing a driver stored within the driver image to load and execute during BIOS execution.
    Type: Grant
    Filed: May 6, 2022
    Date of Patent: December 5, 2023
    Assignee: Dell Products L.P.
    Inventors: Shekar Babu Suryanarayana, Ibrahim Sayyed, Jagadish Babu Jonnada
  • Patent number: 11422722
    Abstract: A controller of a storage device is described for handling communications with a host device. In some examples, the storage device includes a wide port comprising a plurality of phys. The wide port is configured to receive, via a first phy of the plurality of phys, a signal. The controller is configured to select, based on a respective power factor associated with each respective phy of the plurality of phys and a respective performance factor associated with each respective phy of the plurality of phys, a second phy of the plurality of phys to utilize for performing an operation associated with the received signal. In such examples, the wide port is further configured to perform, using the second phy, the operation associated with the received signal.
    Type: Grant
    Filed: July 14, 2020
    Date of Patent: August 23, 2022
    Assignee: Western Digital Technologies, Inc.
    Inventors: Darin Edward Gerhart, Nicholas Edward Ortmeier
  • Publication number: 20130191692
    Abstract: An approach is disclosed for performing initialization operations for a graphics processing unit (GPU). The approach includes detecting errors while performing one or more initialization operations. Further, the approach includes releasing a holdoff on a communication link that couples the GPU to a memory bridge and causing debug output to be displayed to a user that indicates the error.
    Type: Application
    Filed: January 24, 2012
    Publication date: July 25, 2013
    Inventors: Lincoln GARLICK, Saket JAMKAR, Steven MUELLER
  • Publication number: 20130139005
    Abstract: A Universal Serial Bus (USB) testing apparatus includes a Central Processing Unit (CPU); a Southbridge; a Baseboard Management Controller (BMC), connected with the Southbridge via USB. The BMC determines if a test starts or finishes, generates a first instruction of creating a virtual control computer when determining the test starts, creates a control module and a comparing module in a memory unit which are running to become the virtual control computer, and connects the memory unit with the BMC according to the first instruction. The control module sends control data to the CPU. The comparing module obtains feedback data from the CPU and compares the control data with the obtained data to determine if the control data is consistent with the obtained data, thereby determining whether the USB is working normally.
    Type: Application
    Filed: December 14, 2011
    Publication date: May 30, 2013
    Applicants: HON HAI PRECISION INDUSTRY CO., LTD., HONG FU JIN PRECISION INDUSTRY (ShenZhen) CO., LTD.
    Inventor: YU-GANG ZHANG
  • Publication number: 20100223425
    Abstract: A system and associated method for monitoring the execution of software on one or more computers by receiving traffic from within the monitored computer(s). The monitoring may take place passively, such that the operation of the monitored computer or computers is completely unaffected by the monitoring. More intensive monitoring, such as maintenance of a shadow copy of the RAM of the monitored computer, may be initiated upon recognition of a pattern in the data received from the monitored computer. The execution of software on the monitored computer may be halted by the monitoring module. The monitoring module may also read from or write to the memories of the monitored computer.
    Type: Application
    Filed: February 27, 2009
    Publication date: September 2, 2010
    Applicant: SCIENCE APPLICATIONS INTERNATIONAL CORPORATION
    Inventors: John Lippincott MEAGHER, Sergio NIRENBERG
  • Patent number: 7702862
    Abstract: A processing system includes a processing circuit having one or more buses, a memory interface unit to control access by the processing circuit to a memory, and a metrics module. The metrics module includes one or more metrics registers and a metrics controller to monitor one or more operations selected from memory interface unit operations and bus operations, and to store metrics information corresponding to the monitored operations in the metrics registers. The monitored operations can include memory access operations, arbitration operations, bus operations, and the like. The metrics information can be analyzed to provide a basis for improving performance of a program that is executed on the processing system.
    Type: Grant
    Filed: February 8, 2007
    Date of Patent: April 20, 2010
    Assignee: Analog Devices, Inc.
    Inventors: Moinul I. Syed, Richard A. Gentile, Gregory T. Koker