Performance Evaluation By Tracing Or Monitoring (epo) Patents (Class 714/E11.2)
  • Patent number: 10534691
    Abstract: An apparatus, for a first loop included in a program code, determines whether an inner loop is included in the first loop. When the inner loop is included in the first loop, the apparatus determines whether a processing code other than the inner loop is included in the first loop. When both the inner loop and the processing code other than the inner loop are included in the first loop or when no inner loop is included in the first loop, the apparatus adds a performance measurement code for conducting performance measurement of the first loop to the program code.
    Type: Grant
    Filed: January 17, 2018
    Date of Patent: January 14, 2020
    Assignee: FUJITSU LIMITED
    Inventor: Tomotake Nakamura
  • Patent number: 10466986
    Abstract: A tracing controller may utilize a binary execution trace mechanism to trace execution of compiled application machine code. The tracing controller may initiate hardware tracing to gather control-flow hardware traces of a method executing on a processor configured to generate hardware tracing information. The controller may generate a profile based on the hardware tracing information and initiate re-compiling or re-optimizing of the method in response to determining that the new profile differs from the previous profile. The controller may repeatedly profile and re-optimize a method until profiles for the method stabilize. Profiling and hardware tracing of an application may be selectively enabled or disabled allowing the controller to respond to later phase changes in application execution by re-optimizing, thereby potentially improving overall application performance.
    Type: Grant
    Filed: May 31, 2018
    Date of Patent: November 5, 2019
    Assignee: Oracle International Corporation
    Inventors: Ilknur Cansu Kaynak Kocberber, Mario Wolczko, Thomas Wuerthinger
  • Patent number: 10440037
    Abstract: Detecting a malware attack includes monitoring an event log of a first device, wherein the event log identifies events indicating that the first device is likely compromised, determining an expected rate of log entries during a time window, identifying that an actual rate of log entries during the time window satisfies a threshold, determining, in response to the identifying, that the first device is a compromised device, and performing an action in response to determining that the first device is a compromised device.
    Type: Grant
    Filed: March 31, 2017
    Date of Patent: October 8, 2019
    Assignee: McAfee, LLC
    Inventors: Peter Thayer, Gabriel G. Infante-Lopez, Leandro J. Ferrado, Alejandro Houspanossian
  • Patent number: 10416974
    Abstract: A monitoring system monitors processing of incoming messages by an application, and logs data related to performance of the application. The application includes a plurality of checkpoints, and the monitoring system logs data upon each message traversing the checkpoints in the application. The monitoring system is configured to dynamically modify checkpoints within the application based on latency detection of portions of the application, resulting in improved granularity/resolution of the data collected from congested portions of the application, and reducing the performance penalty of the monitoring system from portions of the application that are not congested.
    Type: Grant
    Filed: October 6, 2017
    Date of Patent: September 17, 2019
    Assignee: Chicago Mercantile Exchange Inc.
    Inventors: Kyle Dennis Kavanagh, José Antonio Acuña-Rohter, David Michael Wong
  • Patent number: 10387218
    Abstract: Provided are techniques for lock profiling tool to identify code bottlenecks. A lock spin duration for a lock is determined. It is determined that the lock spin duration is greater than a lock trace threshold. The lock spin duration is classified into a time duration bucket. It is determining whether the lock is found in a list of locks for the time duration bucket. In response to determining that the lock is found in the list of locks, a lock count for the lock is incremented by one. In response to determining that the lock is not found in the list of locks, an entry for the lock is added in the list of locks for the time duration bucket and the lock count for the lock is initialized to one. A total spin duration time for the lock is updated by the lock spin duration.
    Type: Grant
    Filed: November 14, 2016
    Date of Patent: August 20, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Trung N. Nguyen, Louis A. Rasor
  • Patent number: 10318250
    Abstract: The disclosed computer-implemented method for locating functions for later interception may include (i) identifying a function to be intercepted during an execution of a file that comprises an instance of the function, (ii) procuring, from a description of the function, a string that, when located in any given file within a set of files, indicates a location of the function within the given file, (iii) scanning the file to identify a location of the string within the file, (iv) determining, based on the location of the string within the file, a location of the instance of the function within the file, and (v) intercepting a call made by a process during the execution of the file to the instance of the function based on having located the instance of the function within the file. Various other methods, systems, and computer-readable media are also disclosed.
    Type: Grant
    Filed: March 17, 2017
    Date of Patent: June 11, 2019
    Assignee: Symantec Corporation
    Inventors: Peter Ferrie, Vishal Saxena
  • Patent number: 10310826
    Abstract: Technologies for automatic reordering of sparse matrices include a computing device to determine a distributivity of an expression defined in a code region of a program code. The expression is determined to be distributive if semantics of the expression are unaffected by a reordering of an input/output of the expression. The computing device performs inter-dependent array analysis on the expression to determine one or more clusters of inter-dependent arrays of the expression, wherein each array of a cluster of the one or more clusters is inter-dependent on each other array of the cluster, and performs bi-directional data flow analysis on the code region by iterative backward and forward propagation of reorderable arrays through expressions in the code region based on the one or more clusters of the inter-dependent arrays. The backward propagation is based on a backward transfer function and the forward propagation is based on a forward transfer function.
    Type: Grant
    Filed: November 19, 2015
    Date of Patent: June 4, 2019
    Assignee: Intel Corporation
    Inventors: Hongbo Rong, Jongsoo Park, Todd A. Anderson
  • Patent number: 10279257
    Abstract: A narrative includes a number of serially connected narrative segments combined by a director or editor in a defined sequence to tell a story. A number of different narrative segments are available to the director or editor. A content delivery editor provides editors and directors with the ability to augment a narrative with additional narrative segments that provide alternate perspectives, views, or insights to the consumer. Such allows conveyance of the same narrative to the consumer using a number of plots or perspectives. Branch points in the narrative provide the consumer the opportunity to follow a storyline they find interesting. Each consumer follows a “personalized” path through the narrative. The director or editor may influence selection at branch points by providing priming stimuli prior to presentation of a prompt to select a branch and by optionally providing target stimuli during presentation of the prompt to select a branch.
    Type: Grant
    Filed: January 12, 2016
    Date of Patent: May 7, 2019
    Assignee: PODOP, INC.
    Inventor: Adrian Sack
  • Patent number: 10169269
    Abstract: A method may comprise identifying a signal indicating real-time mode operation for a guest operating system (OS) and directly routing an interrupt for a first processor to the guest OS while the guest OS is running without causing a transition from execution by the guest OS to execution by a host system. Other embodiments are disclosed and claimed.
    Type: Grant
    Filed: December 27, 2016
    Date of Patent: January 1, 2019
    Assignee: INTEL CORPORATION
    Inventors: James A. Coleman, Scott M. Oehrlein
  • Patent number: 10127025
    Abstract: Techniques for optimizing program code through property merging are described. In an embodiment, a compiler identifies, from a plurality of properties of a particular data object that are referenced by the program code, one or more candidate sets of properties that are eligible for merging. For a respective candidate set of properties of the one or more candidate set of properties, the compiler determines whether to merge different properties of the particular data object that belong to the respective candidate set of properties. After determining to merge the different properties, a particular data structure is generated, within the memory of a computing device, that stores the different properties of the particular data object that belong to the respective candidate set.
    Type: Grant
    Filed: July 22, 2015
    Date of Patent: November 13, 2018
    Assignee: Oracle International Corporation
    Inventors: Martin Sevenich, Sungpack Hong, Hassan Chafi
  • Patent number: 10055762
    Abstract: The deep application crawling technique described herein crawls one or more applications, commonly referred to as “apps”, in order to extract information inside of them. This can involve crawling and extracting static data that are embedded within apps or resource files that are associated with the apps. The technique can also crawl and extract dynamic data that apps download from the Internet or display to the user on demand, in order to extract data. This extracted static and/or data can then be used by another application or an engine to perform various functions. For example, the technique can use the extracted data to provide search results in response to a user query entered into a search engine. Alternately, the extracted static and/or dynamic data can be used by an advertisement engine to select application-specific advertisements. Or the data can be used by a recommendation engine to make recommendations for goods/services.
    Type: Grant
    Filed: March 12, 2015
    Date of Patent: August 21, 2018
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
    Inventors: Jie Liu, Suman Kumar Nath, Jitendra D. Padhye, Lenin Ravindranath Sivalingam
  • Patent number: 10007782
    Abstract: One embodiment of the present invention provides system for facilitating replacement of a system function in an application with a customized function. During operation, the system shifts an existing load command in a file of an application to accommodate an additional load command. The system also adds the additional load command to the file. The additional load command identifies additional instructions that change a pointer of the application from a value that points to a system function to another value that points to a customized function.
    Type: Grant
    Filed: May 9, 2017
    Date of Patent: June 26, 2018
    Assignee: VMWARE, INC.
    Inventors: Manish Jawa, Haim Tebeka, Craig Newell
  • Patent number: 9940173
    Abstract: A system includes a plurality of computers configured to process a computer program in parallel by executing a plurality of processes, respectively, in parallel, each process of the plurality of processes including at least one thread, and each of the plurality of computers including a first memory and a first processor coupled to the first memory and configured to execute the plurality of processes, respectively, and a management device configured to control the plurality of computers, the control device including a second memory, and a second processor coupled to the second memory, and based on parallelization rate, memory busy rate, operation number difference and processing time difference, execute an adjusting of a number of the threads included in at least one process of the plurality of processes.
    Type: Grant
    Filed: April 4, 2016
    Date of Patent: April 10, 2018
    Assignee: FUJITSU LIMITED
    Inventor: Toshiya Naito
  • Patent number: 9875142
    Abstract: A system and method schedules jobs in a cluster of compute nodes. A job with an unknown resource requirement profile is received. The job includes a plurality of tasks. Execution of some of the plurality of tasks is scheduled on compute nodes of the cluster with differing capability profiles. Timing information regarding execution time of the scheduled tasks is received. A resource requirement profile for the job is inferred based on the received timing information and the differing capability profiles. Execution of remaining tasks of the job is scheduled on the compute nodes of the cluster using the resource requirement profile.
    Type: Grant
    Filed: March 22, 2013
    Date of Patent: January 23, 2018
    Assignee: PALO ALTO RESEARCH CENTER INCORPORATED
    Inventors: Christian Fritz, Shekhar Gupta, Johan de Kleer, Robert R. Price
  • Patent number: 9851959
    Abstract: Herein disclosed is an optimization for a compiler, the optimization configured to assign numeric values, or semantic fingerprints, to portions of code, and to combine these fingerprints to arrive at fingerprints for larger and larger portions of code. The fingerprints can be provided to various consumers such as code redundancy optimization modules and copyright violation and malware/virus identification modules. The fingerprints can also be used to cluster similar code, and then code within each cluster can be merged. Merger can include creating a single merged portion of code including the same portions of code from the original portions of code plus control flow and new arguments to account for differences between the original portions of code. The original portions of code can be replaced with wrappers that use new arguments to call to the merged portion of code.
    Type: Grant
    Filed: August 22, 2016
    Date of Patent: December 26, 2017
    Assignee: QUALCOMM Innovation Center, Inc.
    Inventor: Tobias Edler Von Koch
  • Patent number: 9836193
    Abstract: A method includes analyzing, on a first computing device, data from second computing device(s) of user interaction with a user interface of an application previously executed on the second computing device(s). The data corresponds to events caused by the user interaction with the user interface of the application. The first computing device generates representation(s) of the analyzed data and outputs the representation(s) of the user interaction. Another method includes capturing and logging, by a computing device, events caused by user interaction with a user interface of an application when the application is executed on the computing device. In response to a trigger, data comprising the captured and logged events is sent toward another computing device. Another method includes instrumenting a measurement library into an application to create an instrumented version of the application, and sending the instrumented application to computing device(s).
    Type: Grant
    Filed: August 16, 2013
    Date of Patent: December 5, 2017
    Assignee: International Business Machines Corporation
    Inventors: Joseph W. Ligman, Marco Pistoia, John Ponzo, Gegi Thomas
  • Patent number: 9836289
    Abstract: In order to improve the efficiency in development of RTOS-mounted application, there is to provide a compiler of creating executable code for running application of calling and using the resource of the RTOS as object on a target device, including an RTOS setting information optimization unit of receiving system configuration information and a compile unit of receiving application source code. The RTOS setting information optimization unit creates RTOS resource creating information including attribute information of usable objects, based on the system configuration information. The compile unit creates the RTOS setting information including a list of the objects actually used, from the analysis result of the RTOS resource creating information and the application source code and the RTOS setting information optimization unit optimizes the above based on the system configuration information.
    Type: Grant
    Filed: September 14, 2016
    Date of Patent: December 5, 2017
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Kenta Kanda, Atsushi Fujioka, Takuro Uchida
  • Patent number: 9823998
    Abstract: A method (and system) for trace recovery includes retrieving a code listing from a memory and performing a static analysis on the retrieved code listing. Based on the static analysis, profiling instructions are inserted in the code.
    Type: Grant
    Filed: December 2, 2015
    Date of Patent: November 21, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Pietro Ferrara, Marco Pistoia, Omer Tripp, Eunho Yang
  • Patent number: 9811400
    Abstract: Novel tools and techniques for tracing application execution and performance. Some of the tools provide a framework for monitoring the execution and/or performance of applications in an execution chain. In some cases, the framework can accomplish this monitoring with a few simple calls to an application programming interface on an application server. In other cases, the framework can provide for the passing of traceability data in protocol-specific headers of existing inter-application (and/or intra-application) communication protocols.
    Type: Grant
    Filed: December 16, 2015
    Date of Patent: November 7, 2017
    Assignee: Qwest Communications International Inc.
    Inventors: Igor I. Malkiman, Chauncey G. Powis, Tyson Matthew Bunch
  • Patent number: 9703667
    Abstract: A method comprising: counting each occurrence of a hardware event by a Performance Monitoring Counter of a hardware processor during the execution of a target program code; orderly and continuously storing in a buffer of a Taken Branch Trace (TBT) Facility of said hardware processor a predefined TBT size of last taken branches of said target program code during its execution; every time said counting equals a sampling rate, triggering sampling of said buffer, to receive a TBT comprising current said predefined TBT size of last taken branches; constructing a full branch trace for each said TBT based on said target program code; extracting a predefined Chopped Branch Trace (CBT) size of last branches from each said full branch trace, to receive a chopped branch trace for said each TBT; and incrementally storing each said chopped branch trace to generate an edge profile of said target program code.
    Type: Grant
    Filed: February 22, 2015
    Date of Patent: July 11, 2017
    Assignee: International Business Machines Corporation
    Inventors: Grigori Chtrasberg, Moshe Klausner, Nitzan Peleg, Yaakov Yaari
  • Patent number: 9665355
    Abstract: An example method includes modifying, prior to run time, an executable file of an application to cause an operating system loader to load additional code using a dynamically-linked library. Modifying the executable file includes determining whether the executable file includes sufficient unused space to accommodate a load command, and adding the load command to the executable file when the executable file includes sufficient unused space by: shifting, in the executable file, an existing load command that does not contain dependency information to make space for the load command; or identifying unused space outside of a data portion of the executable file that can be removed to accommodate the load command. The additional code, when executed by a processor, causes the processor to change a pointer in a table that indicates an address of an imported function implementing a system call so the pointer indicates an address of a customized function.
    Type: Grant
    Filed: August 14, 2015
    Date of Patent: May 30, 2017
    Assignee: VMware, Inc.
    Inventors: Manish Jawa, Haim Tebeka, Craig F. Newell
  • Patent number: 9652367
    Abstract: The present disclosure involves systems, software, and computer implemented methods for testing applications on multiple system landscapes. In one example, a method may include identifying instructions to test a plurality of system landscapes, executing a test of a first system landscape from the plurality of system landscapes, validating a response received from the first system landscape by a user associated with the testing, executing tests of at least a subset of the remaining plurality of system landscapes which includes sending requests including the predefined input to the entry point of each of the subset of the remaining plurality of system landscapes, receiving responses from the subset of the remaining plurality of system landscapes, and comparing each received response to the validated response from the first system landscape, and in response to the comparison, generating a result set of the comparison of each received response to the validated response.
    Type: Grant
    Filed: October 21, 2015
    Date of Patent: May 16, 2017
    Assignee: SAP Portals Israel Ltd.
    Inventor: Vitaly Vainer
  • Patent number: 9594703
    Abstract: A method may comprise identifying a signal indicating real-time mode operation for a guest operating system (OS) and directly routing an interrupt for a first processor to the guest OS while the guest OS is running without causing a transition from execution by the guest OS to execution by a host system. Other embodiments are disclosed and claimed.
    Type: Grant
    Filed: March 29, 2012
    Date of Patent: March 14, 2017
    Assignee: INTEL CORPORATION
    Inventors: James A. Coleman, Scott M. Oehrlein
  • Patent number: 9535815
    Abstract: A system, method, and computer program product are provided for collecting trace information based on a computational workload. The method includes the steps of compiling source code to generate a program, launching a workload to be executed by the parallel processing unit, collecting one or more records of trace information associated with a plurality of threads configured to execute the program, and correlating the one or more records to one or more corresponding instructions included in the source code. Each record in the one or more records includes at least a value of a program counter and a scheduler state of the thread.
    Type: Grant
    Filed: June 4, 2014
    Date of Patent: January 3, 2017
    Assignee: NVIDIA Corporation
    Inventors: Gregory Paul Smith, Lars Siegfried Nyland
  • Patent number: 9524225
    Abstract: Methods and systems for dynamically providing application analytic information are provided herein. The method includes inserting instrumentation points into an application file via an application analytic service and dynamically determining desired instrumentation points from which to collect application analytic data. The method also includes receiving, at the application analytic service, the application analytic data corresponding to the desired instrumentation points and analyzing the application analytic data to generate application analytic information. The method further includes sending the application analytic information to a client computing device.
    Type: Grant
    Filed: March 26, 2012
    Date of Patent: December 20, 2016
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Lenin Ravindranath Sivalingam, Jitendra Padhye, Ian Obermiller, Ratul Mahajan, Sharad Agarwal, Ronnie Ira Chaiken, Shahin Shayandeh, Christopher M. Moore, Sirius Kuttiyan
  • Patent number: 9471342
    Abstract: A technique for register mapping in a virtual system includes preparing a register pool that includes a plurality of registers for mapping. A mapping table is prepared that has a register identifier (ID) and information related to each of a plurality of parameters that express an operational state of the virtual system for each of the registers. At the time a register access request is issued by a hardware thread, the register ID for an access target and information related to each of the plurality of parameters that express the operational state during operation is acquired. One of the registers, for which the acquired register ID and information related to each of the plurality of parameters match the register ID and information for each of the plurality of parameters within the mapping table, is set as a mapped register to be accessed per the register access request.
    Type: Grant
    Filed: March 26, 2013
    Date of Patent: October 18, 2016
    Assignee: International Business Machines Corporation
    Inventors: Masanori Mitsugi, Hiroyuki Tanaka, Nobuyoshi Tanaka
  • Patent number: 9465719
    Abstract: Systems and methods are disclosed for providing a representation of a stack trace. An example method includes identifying an element in a stack trace. The stack trace is generated based on an occurrence of an event during execution of an application. The method also includes determining whether the element has an associated annotation. The annotation is an indication to translate the element's name from a first language to a second language. The method further includes in response to determining that the element in the stack trace has the associated annotation, obtaining the element's translated name and updating the stack trace to include the element's translated name, which is in the second language.
    Type: Grant
    Filed: August 12, 2014
    Date of Patent: October 11, 2016
    Assignee: Red Hat, Inc.
    Inventors: Radoslav Husar, Jiri Pechanec
  • Patent number: 9448910
    Abstract: An improved method for identifying trace data relating to a particular virtual machine from trace data acquired by a tracer node. The method is executed in a computing environment including at least one processing node and a tracer node for acquiring a trace of access to a memory apparatus thereof. The method includes the steps of: starting recording of trace data containing information of the trace of the access to the memory apparatus of the tracer node; storing, in response to migration of the particular virtual machine from a given processing node to the tracer node, information identifying a physical address of the memory apparatus of the tracer node, the physical address being assigned to the particular virtual machine; and identifying the trace data relating to the particular virtual machine from the trace data, using the assigned physical address of the memory apparatus of the tracer node.
    Type: Grant
    Filed: March 24, 2014
    Date of Patent: September 20, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Seiji Munetoh
  • Patent number: 9442818
    Abstract: In one embodiment, a method is performed on a computer system comprising computer hardware. The method includes inserting, at an instrumentation point of a target program, an event generator comprising an instrumentation identifier. The method further includes registering the instrumentation identifier in instrumentation records. The instrumentation records link the instrumentation identifier to a dynamically variable event handler. In addition, the method includes, responsive to an event generated by the event generator, receiving a callback comprising the instrumentation identifier. Further, the method includes, using the instrumentation identifier, identifying in the instrumentation records the dynamically variable event handler. Additionally, the method includes invoking the dynamically variable event handler. Also, the method includes collecting data related to execution of the target program using the invoked dynamically variable event handler.
    Type: Grant
    Filed: January 21, 2014
    Date of Patent: September 13, 2016
    Assignee: Dell Software Inc.
    Inventors: Douglas Doe, Christine Feldmann, Daniel Ivanisevic
  • Patent number: 9430254
    Abstract: A technique for register mapping in a virtual system includes preparing a register pool that includes a plurality of registers for mapping. A mapping table is prepared that has a register identifier (ID) and information related to each of a plurality of parameters that express an operational state of the virtual system for each of the registers. At the time a register access request is issued by a hardware thread, the register ID for an access target and information related to each of the plurality of parameters that express the operational state during operation is acquired. One of the registers, for which the acquired register ID and information related to each of the plurality of parameters match the register ID and information for each of the plurality of parameters within the mapping table, is set as a mapped register to be accessed per the register access request.
    Type: Grant
    Filed: December 26, 2012
    Date of Patent: August 30, 2016
    Assignee: International Business Machines Corporation
    Inventors: Masanori Mitsugi, Hiroyuki Tanaka, Nobuyoshi Tanaka
  • Patent number: 9348566
    Abstract: A system and method for improving the performance of all applications are disclosed. Production profile data may be collected about each application while the application is executing. The production profile data may be converted into symbolized profiles and stored in a database. The symbolized profiles may be aggregated into a single aggregated profile. This aggregated profile may be used as a compilation input when compiling new versions of an application's binary to improve the application's performance for observed application behavior.
    Type: Grant
    Filed: January 2, 2014
    Date of Patent: May 24, 2016
    Assignee: GOOGLE INC.
    Inventors: Tipp Moseley, Dehao Chen, Xinliang David Li
  • Patent number: 9182960
    Abstract: A loop distribution group detection program for causing a computer to execute a process including, converting a loop distribution target program into a test program having a cache miss measurement instruction, by dividing a loop in the loop distribution target program into plural distribution loops based on a loop distribution specification parameter, sequentially executing the test program while varying the loop distribution specification parameter, extracting loop distribution candidates, for which the number of cache misses exceeds a reference value, as a first loop distribution candidate group, and extracting loop distribution candidates with not exceeding the reference value, as a second loop distribution candidate group, and excluding loop distributions from execution target candidates for the test program, by comparing a loop distribution based on the loop distribution specification parameter with loop distributions of the loop distribution candidates in the first loop distribution candidate group.
    Type: Grant
    Filed: January 23, 2015
    Date of Patent: November 10, 2015
    Assignee: FUJITSU LIMITED
    Inventor: Masaki Arai
  • Publication number: 20140068346
    Abstract: During a debug mode of operation of a data processor, it is determined at the data processor that a watchpoint event has occurred, and in response, an operating condition of a trace FIFO that stores trace information not yet communicated to a debugger is changed. For example, the occurrence of a FIFO flush watchpoint results in trace information being flushed from the trace FIFO before the trace information has been communicated to a trace analyzer.
    Type: Application
    Filed: August 29, 2012
    Publication date: March 6, 2014
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Jeffrey W. Scott, William C. Moyer
  • Publication number: 20130198572
    Abstract: A method of managing code-tracing data in a target program is described. The method comprises the steps of: identifying when an exception occurs in the target program; accessing a stack trace of a call stack to identify a module in the target program that threw the exception; and activating code-tracing at a high detail level in that module.
    Type: Application
    Filed: January 31, 2012
    Publication date: August 1, 2013
    Applicant: NCR CORPORATION
    Inventor: Richard Han
  • Publication number: 20130159780
    Abstract: An apparatus, processor, and method for synchronizing trace data. A processor includes multiple cores, and each core operates at a different local clock frequency. A global clock is distributed to each core, and a timestamp is generated using the global clock and the local clock. The timestamp and a local clock saturation value are included in each trace entry, and the local clock saturation value is equal to the ratio between the local clock and the global clock. The trace entries from separate cores are time-correlated in a post-processing phase based on the timestamp and local clock saturation values.
    Type: Application
    Filed: December 16, 2011
    Publication date: June 20, 2013
    Inventors: Ryan D. Bedwell, Elizabeth M. Cooper, Eric M. Rentschler
  • Publication number: 20130067285
    Abstract: A system and method for generating a triage dump of useful memory data from a computer that encounters an error while executing one or more software programs. The computer system may identify data values within the triage dump that are characteristic of personal data. To protect the privacy of the software user the personal data may be poisoned by overwriting the data values with overwrite values. The overwrite values used to poison the data values may be predetermined, based on the data values themselves, or chosen at random. The triage dump may be sent to an external server to associated with the developer of the one or more software programs for analysis. When overwrite values are dynamically selected, the specific overwrite values used may be sent to the server in connection with a triage dump.
    Type: Application
    Filed: September 12, 2011
    Publication date: March 14, 2013
    Applicant: Microsoft Corporation
    Inventors: Miklos Szegedi, Ryan S. Kivett, Gregory W. Nichols, Mikhail Basilyan, Jen-Lung Chiu, Genghis Karimov
  • Publication number: 20130055033
    Abstract: Hardware-assisted program tracing is facilitated by a processor that includes a root instruction address register, a program trace signature computation unit and a call signature register. When a program instruction having an address matching the root instruction address register is executed, a program trace signature is captured in the call signature register and capture of branch history is commenced. By accumulating different values of the call signature register, for example in response to an interrupt generated when the root instruction is executed, software that performs program tracing can obtain signatures of all of the multiple execution paths that lead to the root instruction, which is also specified by software in order to set different root instructions for program tracing. In an alternative implementation, a storage for multiple call signatures is provided in the processor and read at once by the software.
    Type: Application
    Filed: November 21, 2011
    Publication date: February 28, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Giles R. Frazier, David S. Levitan, Brian R. Mestan, Mauricio J. Serrano
  • Publication number: 20130042142
    Abstract: An integrated circuit 2 includes one or more transaction masters 8, 10, 12, 4 for issuing data transactions via interconnect circuitry 20. Debug access port circuitry is configured to respond to debug commands received from a debug controller 6 to generate barrier transactions which are issued to the interconnect circuitry. The interconnect circuitry responds to the received barrier transactions by constraining a relative ordering of at least some of the data transactions as they pass through the interconnect circuitry.
    Type: Application
    Filed: August 2, 2012
    Publication date: February 14, 2013
    Applicant: ARM Limited
    Inventors: Sheshadri KALKUNTE, Michael John Williams
  • Publication number: 20130031424
    Abstract: Processes, computer-readable media, and machines are disclosed for reducing a likelihood that active functional components fail in a computing system. An active monitoring component receives metrics associated with different active functional components of a computing system. The different active functional components contribute to different functionalities of the system. Based at least in part on the metrics associated with a particular active functional component, the active monitoring component determines that the particular active functional component has reached a likelihood of failure but has not failed. In response to determining that the particular active functional component has reached the likelihood of failure but has not failed, the active monitoring component causes a set of actions that are predicted to reduce the likelihood of failure.
    Type: Application
    Filed: July 27, 2011
    Publication date: January 31, 2013
    Applicant: ORACLE INTERNATIONAL CORPORATION
    Inventors: Deepti Srivastava, Andrew Ingham, Cheng-Lu Hsu, Wilson Wai Shun Chan
  • Publication number: 20130007532
    Abstract: A system includes one or more processors; one or more trace debug circuits configured to monitor one or more of instruction, data, and watchpoint buses of the one or more processors, and record information determined from said monitoring; and a sequence processing unit configured to provide a control signal to a trace debug circuit of the one or more trace debug circuits, wherein in response to the control signal, the trace debug circuit controls one or more of said monitoring and recording, and a system on a chip comprises the one or more processors, the one or more trace debug circuits, and the sequence processing unit.
    Type: Application
    Filed: June 28, 2011
    Publication date: January 3, 2013
    Inventors: Gary L. Miller, Mark Maiolani, William C. Moyer
  • Publication number: 20130007533
    Abstract: A system includes a processor configured to execute a first interrupt; an interrupt controller, coupled to the processor, and configured to store one or more pending interrupts; and a sequence processing unit, coupled to the processor and the interrupt controller, and configured to receive an identifier of the first interrupt, receive an identifier corresponding to each of the one or more pending interrupts, and provide trigger information to a state condition logic in response to one or more of the identifiers of the one or more pending interrupts and the identifier of the first interrupt, wherein the trigger information is used to determine a trace or debug action responsive to the trigger information.
    Type: Application
    Filed: June 28, 2011
    Publication date: January 3, 2013
    Inventors: Gary L. Miller, Mark Maiolani, William C. Moyer
  • Publication number: 20130007536
    Abstract: Methods and systems are provided for analyzing parallelism of program code. According to a method, the sequential execution of the program code is simulated so as to trace the execution procedure of the program code, and parallelism of the program code is analyzed based on the result of the trace to the execution procedure of the program code. Execution information of the program code is collected by simulating the sequential execution of the program code, and parallelism of the program code is analyzed based on the collected execution information, so as to allow programmers to perform parallel task partitioning of the program code with respect to a multi-core architecture more effectively, thus increasing the efficiency of parallel software development.
    Type: Application
    Filed: September 13, 2012
    Publication date: January 3, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Bo FENG, Rong YAN, Kun WANG, Hua Yong WANG
  • Publication number: 20130007534
    Abstract: Embodiments of the present invention provide a method, system and computer program product for trace capture of successfully completed transactions for trace debugging of failed transactions. In an embodiment of the invention, a method for trace capture of successfully completed transactions for trace debugging of failed transactions is provided. The method includes storing entries in a log with information pertaining to successfully completed transactions in a transaction processing system executing in memory of a host server, detecting a failed transaction in the transaction processing system, generating a trace for the failed transaction, and providing with the generated trace an entry from the log with information pertaining to a successful completion of the failed transaction.
    Type: Application
    Filed: June 29, 2011
    Publication date: January 3, 2013
    Applicant: International Business Machines Corporation
    Inventor: Darren R. Beard
  • Publication number: 20120324290
    Abstract: An approach is provided to trace a software program running in a multi-nodal complex computing environment. A trace request is sent from a requestor node to the nodes with the trace request associated with the software program and also associated with a transaction identifier. The software program is executed on the nodes. While the program is executing, trace data entries resulting from the execution of the software program are logged at the respective nodes with each trace data entry being associated with the transaction identifier. A log request is subsequently sent from the requestor node to the other nodes. The resulting trace data is then received by the requestor node from the target nodes and logged in a transaction based log. The transaction-based log is then provided to a user of the requestor node.
    Type: Application
    Filed: June 20, 2011
    Publication date: December 20, 2012
    Applicant: International Business Machines Corporation
    Inventors: James Newman Chen, Christopher Verton Lenfest
  • Publication number: 20120297254
    Abstract: On demand tracing of application code execution includes: during the execution of the application code, writing trace statements to a circular trace buffer (at a selected and potentially variable detail level); determining whether a pre-defined trigger event has occurred; in response to determining that the trigger event has occurred, outputting one or more trace statements in the circular trace buffer according to pre-defined trace parameters; determining whether a trigger end event has occurred; and in response to determining that the trigger end event has occurred, terminating the outputting of the trace statements. The trigger event and the trigger end event may be defined by names of application code variables, values for the variables, and operators to be used. The trigger end event may further be defined by a time duration for which trace statements are to be outputted, or a number of trace statements to be outputted.
    Type: Application
    Filed: May 19, 2011
    Publication date: November 22, 2012
    Applicant: International Business Machines Corporation
    Inventor: Hassan A. SHAZLY
  • Publication number: 20120272101
    Abstract: A server testing system is used for testing servers of a server system and includes a power source, switches, a connection device, a controlling device, and a display device. Each switch is connected to the power source and the controlling device. The controlling device is connected to the connection device and the display device. The controlling device controls each switch to connect a corresponding server to the power source. When receiving a feedback signal from a server, the connection device sends a status signal to the controlling device. The status signal triggers the controlling device to control a corresponding switch to disconnect and then connect the server to the power source. The controlling module controls the switches to turn each server on and off for a predetermined number of times and controls the display device to display a warning when a server is not working normally.
    Type: Application
    Filed: July 21, 2011
    Publication date: October 25, 2012
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventor: MU-CHENG CHI
  • Publication number: 20120198285
    Abstract: In one embodiment, a computer program product for first time data capture includes a computer readable storage medium having computer readable program code embodied therewith. The computer readable program code is configured to run jobs on a systems complex (sysplex), to trace the jobs running on the sysplex, to monitor each of the jobs running on the sysplex for an unexpected action by any of the jobs, and to store information relating to each unexpected action performed by any of the jobs into an entry of a data store. In another embodiment, a method includes running jobs on a sysplex, tracing the jobs running on the sysplex, monitoring each of the jobs running on the sysplex for an unexpected action by any of the jobs, and storing information relating to each unexpected action performed by any of the jobs into an entry of a data store.
    Type: Application
    Filed: January 31, 2011
    Publication date: August 2, 2012
    Applicant: International Business Machines Corporation
    Inventors: Arthur J. Bariska, JR., Marc A. Martin, Thaiese N. Trader
  • Publication number: 20120185735
    Abstract: A method of determining a root cause of a performance problem is provided. The method comprises analyzing a plurality of performance indicators/metrics in a first time period and determining that at least one performance indicators/metric is exhibiting abnormal behavior. The method further comprises analyzing the plurality of performance indicators/metrics over a second time period, the second time period is longer than the first time period, and determining trend information for each performance indicators/metric over the second time period. The method further comprises correlating the trend information for each performance indicators/metric with performance problem information stored in a knowledge base, identifying a potential cause of the abnormal behavior based on the correlation, and alerting a user of the potential cause.
    Type: Application
    Filed: January 19, 2011
    Publication date: July 19, 2012
    Applicant: ORACLE INTERNATIONAL CORPORATION
    Inventors: Govinda Raj Sambamurthy, Raji Sankar, Rahul Goyal, Ashwin Kumar Karkala
  • Publication number: 20120179936
    Abstract: Generation of diagnostic information of a computer-implemented system is made early so that the data is closer to the causation of errors or for performance analysis. At least one selected activity of the system is monitored from initiation of the activity, and the monitoring is for successful completion. Early collection of diagnostic information is provided by comparing the time of the activity without successful completion to an initial trigger, where the initial trigger is less than the time period for a time-out for the activity. If the time of the activity without successful completion exceeds the initial trigger, diagnostic information is collected and an initial dump of the diagnostic information is taken. In one example, a notification that the dump of diagnostic information has been taken is directed to the host or diagnostic terminal.
    Type: Application
    Filed: January 7, 2011
    Publication date: July 12, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: JOEL L. MASSER, DAVID C. REED, MAX D. SMITH
  • Publication number: 20120124428
    Abstract: A system and method for evaluating programmable device systems captures, categorizes, indexes, manipulates and stores generated embedded trace generated information in an enterprise database. Use cases may be executed on an ETM enabled processor, ETM trace data may be captured, and captured trace data may be manipulated and stored in the enterprise database. The data collected from numerous use cases over multiple executions may be used to generate a differential comparison. The differential comparison may be used to interpret and predict bottlenecks, bugs and irregularities within the programmable device.
    Type: Application
    Filed: November 17, 2010
    Publication date: May 17, 2012
    Inventors: Thomas M. ZENG, Richard A. STEWART