Using Procedure Or Function Call Graph Patents (Class 717/133)
  • Patent number: 8479166
    Abstract: Detecting locking discipline violations on shared resources. For example, a method of detecting locking discipline violations of shared resources of a computing platform, by a testing process to be executed concurrently with one or more other processes on said computing platform, the testing process comprising: locking a shared resource of said computing platform; reading a value of the shared resource; locally storing the value of the shared resource; rereading the value of the shared resource after a predefined time period; and generating a locking discipline violation report if the value of said shared resource as reread by said rereading is different from the value of said resource as locally stored by said locally storing.
    Type: Grant
    Filed: August 25, 2008
    Date of Patent: July 2, 2013
    Assignee: International Business Machines Corporation
    Inventors: Yarden Nir-Buchbinder, Orna Raz-Pelleg, Rachel Tzoref, Shmuel Ur, Aviad Zlotnick
  • Patent number: 8473928
    Abstract: In one embodiment, a method for call graph analysis is provided. The method includes determining a plurality of nodes in a call graph. The plurality of nodes represent resource consumption of functions of a software program executed in a software system. A simplification factor is determined. A first set of nodes in the plurality of nodes is then eliminated based on exclusive values for the plurality of nodes, inclusive values for the plurality of nodes, and the simplification factor. An inclusive value for a node is a first amount of resources consumed by the node and any descendent nodes of that node. An exclusive value for the node is a second amount of resources consumed by the node. A simplified call graph is output including a second set of nodes in the plurality of nodes. The second set of nodes does not include the eliminated first set of nodes.
    Type: Grant
    Filed: April 19, 2010
    Date of Patent: June 25, 2013
    Assignee: SAP AG
    Inventors: Cheolman Park, Chan Young
  • Patent number: 8464221
    Abstract: A system and method for identifying a root cause of a wait in a computer system are provided. Given the identity of a thread of interest and time window, a longest wait period for the thread of interest within the time window is identified. The longest wait period is used as a starting node to generate a ready tree by walking backwards through the data in a system trace to construct a tree of readying events that ready threads for running on a processor. A potentially anomalous chain of events is automatically identified and highlighted in the ready tree. A visualization of the ready tree is presented to a user so that the user can explore the events in the tree and annotate the automatically generated tree to aid in problem diagnosis.
    Type: Grant
    Filed: June 16, 2009
    Date of Patent: June 11, 2013
    Assignee: Microsoft Corporation
    Inventors: Alice X. Zheng, Trishul A Chilimbi, Shuo-Hsien Hsiao, Danyel A. Fisher, David M. Andrzejewski
  • Patent number: 8448140
    Abstract: An execution time estimation device includes a program partitioning section that extracts partial programs partitioned by a conditional branch instruction or a function call instruction from a target program, a partial program execution time estimation calculating section that calculates the execution time of each of the partial programs to associate the leading instruction and the end instruction of each of the partial programs, and the calculated execution time with one another, a branch history information generating section that generates a branch history bit sequence which is a sequence of the true-false of the conditional branch instruction of when the target program is executed, an execution trace reproducing section that generates the execution sequences of the partial programs based on the branch history bit sequence, and an execution time estimation calculating section that adds the execution time of the partial programs based on the execution sequences of the partial programs.
    Type: Grant
    Filed: June 23, 2009
    Date of Patent: May 21, 2013
    Assignee: Tokyo Institute of Technology
    Inventors: Tsuyoshi Isshiki, Hiroaki Kunieda, Naoto Kobayashi
  • Patent number: 8434070
    Abstract: Systems and methods are provided for creating a data structure associated with a software application that is based on at least one framework. According to the method, source code and at least one configuration file of the software application is analyzed by at least one framework-specific processor so as to determine entry point information indicating entry points in the source code, request attribute access information indicating where attributes attached to a request data structure are read and written, and forward information indicating forwards performed by the software application. A data structure for a static analysis engine is created based on this information. The data structure includes a list of synthetic methods that model framework-related behavior of the software application, and a list of entry points indicating the synthetic methods and/or application methods of the software application that can be invoked by the framework.
    Type: Grant
    Filed: October 26, 2010
    Date of Patent: April 30, 2013
    Assignee: International Business Machines Corporation
    Inventors: Shay Artzi, Ryan Berg, John T. Peyton, Jr., Marco Pistoia, Manu Sridharan, Robert Wiener
  • Patent number: 8434065
    Abstract: A method for enhancing functionality of an automated testing tool. Embodiments of the present invention provide for dynamically adjusting a date in an automated testing tool. System time in a system time format is adjusted according to a date offset. Embodiments of the present invention provide a method of formatting a date in an automated testing tool. System time in a system time format is accessed, wherein the system time comprises a current date and a current time. The date is formatted according to a predetermined date format. Embodiments of the present invention provide a method of regulating access to variables of an automated testing tool. An electronic document of the automated testing tool is populated with at least one variable and at least one value corresponding to the variable. In response to a request to access the variable, access to the variable and the value is provided.
    Type: Grant
    Filed: February 18, 2009
    Date of Patent: April 30, 2013
    Assignee: Oracle International Corporation
    Inventor: Venkata Subbarao Vorungati
  • Patent number: 8429633
    Abstract: Embodiments of the invention describe systems and methods for application level management of virtual address space. A static analysis application can model and analyze a large and complex source code listing to determine whether it has vulnerabilities without exhausting the virtual memory resources provided to it by the operating system. In one embodiment of the invention, the method includes analyzing the source code listing to create a call graph model to represent the expected sequences of routine calls as a result of the inherent control flow of the source code listing. The method also includes monitoring the amount of virtual memory resources consumed by the dynamic state, and swapping out to a storage medium a portion of the dynamic state. The method includes reusing the virtual memory resources corresponding to the swapped out portion of the dynamic state to continue analyzing the source code listing.
    Type: Grant
    Filed: November 21, 2008
    Date of Patent: April 23, 2013
    Assignee: International Business Machines Corporation
    Inventors: Richard Title, Benjamin Greenwald, John Peyton
  • Patent number: 8429616
    Abstract: Various embodiments include at least one of systems, methods, and software to receive input configuring tests within a computing environment to expose users to standard application or website experiences or test experiences. In some embodiments, multiple tests may be configured to run orthogonally within user experiences without affecting the results of one another. Some such embodiments preserve the ability to execute certain tests in a non-orthogonal manner while other tests are allowed to execute orthogonally.
    Type: Grant
    Filed: March 19, 2010
    Date of Patent: April 23, 2013
    Assignee: eBay Inc.
    Inventors: Jasdeep Singh Sahni, Anil Madan, Deepak Seetharam Nadig, Po Cheung, Bhavesh Mistry, John Bodine, Michael Lo
  • Patent number: 8429613
    Abstract: Various technologies and techniques are disclosed for providing stepping and state viewing in a debugger application. A start and end breakpoint are assigned. Source code execution begins, and upon reaching the start breakpoint, a logging feature begins storing one or more values that may be impacted upon execution of code between the start breakpoint and an end breakpoint. More lines of source code are executed until the end breakpoint is reached. When the end breakpoint is reached, the debugger is put into break mode. While in break mode, a playback feature is provided to allow a user to play back a path of execution that occurred between the start breakpoint and the end breakpoint. The playback feature uses at least some of the values that were stored with the logging feature to show how each referenced variable changed in value.
    Type: Grant
    Filed: October 31, 2006
    Date of Patent: April 23, 2013
    Assignee: Microsoft Corporation
    Inventor: Douglas J. Rosen
  • Patent number: 8423974
    Abstract: Disclosed herein are systems, computer-implemented methods, and computer-readable storage media for obfuscating a function call. The method receives a computer program having an annotated function and determines prolog instructions for setting up a stack frame of the annotated function and epilog instructions for tearing down the stack frame. The method places a first portion of the prolog instructions in the computer program preceding a jump to the annotated function and a second portion of the prolog instructions at a beginning of the annotated function. The method places a first portion of the epilog instructions at an end of the annotated function and a second portion of the epilog instructions in the computer program after the jump. Executing the first and second portions of the prolog instructions together sets up the stack frame. Executing the first and the second portions of the epilog instructions together tears down the stack frame.
    Type: Grant
    Filed: August 12, 2009
    Date of Patent: April 16, 2013
    Assignee: Apple Inc.
    Inventors: Gideon M. Myles, Julien Lerouge, Tanya Michelle Lattner, Augustin J. Farrugia
  • Patent number: 8418145
    Abstract: Methods are classified as simple or complex. Complex methods are modified to add a tracer. Methods classified as simple are not modified to add a tracer. There are many different standards that can be used within the spirit of the present invention to classify methods as simple or complex. In one embodiment, a method is complex if it meets three criteria: (1) the method has an access level of public or package; (2) the method is non-synthetic and (3) the method calls at least one other method. Methods that do not satisfy all three criteria are classified as simple methods.
    Type: Grant
    Filed: November 3, 2003
    Date of Patent: April 9, 2013
    Assignee: CA, Inc.
    Inventors: Lewis K. Cirne, John B. Bley, Daryl L. Puryear
  • Patent number: 8418149
    Abstract: A method and computer program product for monitoring the chronological order in which one or more portions of a first instance of a computer program are executed, thus generating a first data file. The chronological order in which one or more portions of a second instance of the computer program are executed is monitored, thus generating a second data file. The first and second data files are compared.
    Type: Grant
    Filed: December 28, 2006
    Date of Patent: April 9, 2013
    Assignee: International Business Machines Corporation
    Inventor: Kirk J. Krauss
  • Patent number: 8407676
    Abstract: A device (100) for managing a plurality of software items, the device (100) comprising an analysis unit (103) adapted for analyzing a functional correlation between the plurality of software items, and a grouping unit (105) adapted for grouping functionally correlated ones of the plurality of software items together in a common memory space.
    Type: Grant
    Filed: June 18, 2008
    Date of Patent: March 26, 2013
    Assignee: NXP B.V.
    Inventor: Bart Jansseune
  • Patent number: 8407677
    Abstract: A technique for the dynamic instrumentation of a running software system. One or more callable instrumentation functions are accessible in a first memory space associated with the software system. The one or more callable instrumentation functions are adapted to probe an operation of the software system and return data regarding the probed operation. Probed operation environment information needed by the one or more instrumentation functions is provided to a second memory space associated with the software system. First memory space addresses associated with the probed operation environment information are determined from a resource that is accessible in the second memory space. A probe handler is generated that includes calls to the one or more instrumentation functions with references to the first memory space addresses. The probe handler is callable as part of the probed operation.
    Type: Grant
    Filed: February 7, 2011
    Date of Patent: March 26, 2013
    Assignee: International Business Machines Corporation
    Inventor: Akulavenkatavara Pradadarao
  • Patent number: 8402450
    Abstract: A high level programming language provides a map transformation that takes a data parallel algorithm and a set of one or more input indexable types as arguments. The map transformation applies the data parallel algorithm to the set of input indexable types to generate an output indexable type, and returns the output indexable type. The map transformation may be used to fuse one or more data parallel algorithms with another data parallel algorithm.
    Type: Grant
    Filed: November 17, 2010
    Date of Patent: March 19, 2013
    Assignee: Microsoft Corporation
    Inventors: Paul F. Ringseth, Yosseff Levanoni, Weirong Zhu
  • Patent number: 8402444
    Abstract: An analysis engine is described for performing static analysis using CEGAR loop functionality, using a combination of forward and backward validation-phase trace analyses. The analysis engine includes a number of features. For example: (1) the analysis engine can operate on blocks of program statements of different adjustable sizes; (2) the analysis engine can identify a subtrace of the trace and perform analysis on that subtrace (rather than the full trace); (3) the analysis engine can form a pyramid of state conditions and extract predicates based on the pyramid and/or from auxiliary source(s); (4) the analysis engine can generate predicates using an increasingly-aggressive series of available discovery techniques; (5) the analysis engine can selectively concretize procedure calls associated with the trace on an as-needed basis and perform other refinements; and (6) the analysis engine can add additional verification targets in the course of its analysis, etc.
    Type: Grant
    Filed: October 9, 2009
    Date of Patent: March 19, 2013
    Assignee: Microsoft Corporation
    Inventors: Thomas J. Ball, Eleonora O. Bounimova, Vladimir A. Levin, Rahul Kumar
  • Patent number: 8387012
    Abstract: In and for software projects, arrangements for permitting a user to understand how the spatial locality of a function call may have changed with respect to any changes in a function definition. This permits an analysis of different workflows which use the same function, wherein the definition of the function may have changed. To the extent that there might be corresponding changes in the workflows which use such a function, the user will readily develop an idea of why some workflows changed and some did not. The invention method and apparatus determine and display deltas (changes) between different versions of a file where the function call occurs.
    Type: Grant
    Filed: December 8, 2008
    Date of Patent: February 26, 2013
    Assignee: International Business Machines Corporation
    Inventor: Pavan L. Advani
  • Patent number: 8387020
    Abstract: One embodiment of the present invention provides a system that verifies that a program method has been implemented for a program written in a dynamic programming language. During operation, the system receives a user request to check for an implementation of a program method (or method) that is called in the program. The system uses information in this user request to generate a testing method that determines whether a class associated with the method responds to a specific request. This testing method is executed at run-time to verify that the method is implemented for the program.
    Type: Grant
    Filed: July 25, 2007
    Date of Patent: February 26, 2013
    Assignee: Google Inc.
    Inventors: David MacLachlan, Thomas E. Van Lenten
  • Patent number: 8381196
    Abstract: A system, method, and computer program for analyzing code execution and software performance characteristics are disclosed. Samples of executing code may be taken based on any of a number of various triggers. For example, samples may be triggered based on function calls, such as malloc calls. Alternatively, samples may be triggered based on occurrence of a specified event. Code execution is graphically displayed such that certain patterns may be easily identified. Multiple redundant function calls and areas of code having excessively deep function calls can be readily spotted. Such areas represent opportunities for performance optimization.
    Type: Grant
    Filed: April 16, 2010
    Date of Patent: February 19, 2013
    Assignee: Apple Inc.
    Inventors: Christina E. Warren, Sanjay K. Patel, Nathan Slingerland
  • Patent number: 8375367
    Abstract: In tracking a deadlock caused by at least one application, a computing system is communicatively coupled to a computing device, wherein the computing device has the at least one application. A source code line in the at least one application is identified, wherein the at least one application includes a plurality of source code lines. A deadlock identifier is generated by the computing system and the computing system transmits a first response to the application, wherein first response includes the deadlock identifier. The deadlock identifier is extracted from the first response, the source code line is captured, and a second response is transmitted to the computer system by the application. The second response includes the source code line and the deadlock identifier.
    Type: Grant
    Filed: August 6, 2009
    Date of Patent: February 12, 2013
    Assignee: International Business Machines Corporation
    Inventor: Mario Ds Briggs
  • Patent number: 8359588
    Abstract: A method of reducing inter-task latency for software comprising a sequence of instructions including a synchronous remote procedure call to be executed on a multiprocessor system comprising a calling processor and at least one remote engine. The method comprises the steps of: inputting the software; inputting a runtime resource description describing a runtime environment of the multiprocessor system; identifying the synchronous remote procedure call in the sequence of instructions; replacing the synchronous remote procedure call in the sequence of instructions with an initiation instruction and a wait instruction to generate a substitute sequence of instructions; reordering the substitute sequence of instructions with reference to the runtime resource description and the dependencies to generate a reordered sequence of instructions; and outputting the reordered sequence of instructions.
    Type: Grant
    Filed: November 25, 2009
    Date of Patent: January 22, 2013
    Assignee: Arm Limited
    Inventor: Alastair David Reid
  • Patent number: 8359584
    Abstract: A system and method for debugging a computer program by using a call graph. A call graph that represents trace events during execution of a debuggee program may be used as input to a system that enables a user to debug the debuggee program. Mechanisms facilitate conditionally forming clusters of event nodes, a cluster indicative of multiple event nodes corresponding to an execution of a source language statement. During a debugging session, in response to a command to perform a step operation, the nodes of a cluster are processed together so that a step corresponds to multiple events if the multiple events correspond to a single source language statement. A mechanism for inspecting variables is provided. Variable values may be selectively propagated and provided based on the call graph and a static control flow analysis of the debuggee program.
    Type: Grant
    Filed: December 18, 2009
    Date of Patent: January 22, 2013
    Assignee: Microsoft Corporation
    Inventors: Abhijit Rao, Steven J. Steiner
  • Patent number: 8356290
    Abstract: System and method for converting a class oriented data flow program to a structure oriented data flow program. A first data flow program is received, where the first data flow program is an object oriented program comprising instances of one or more classes, and wherein the first data flow program is executable to perform a first function. The first data flow program is automatically converted to a second data flow program, where the second data flow program does not include the instances of the one or more classes, and where the second data flow program is executable to perform the first function. The second data flow program is stored on a computer memory, where the second data flow program is configured to be deployed to a device, e.g., a programmable hardware element, and where the second data flow program is executable on the device to perform the first function.
    Type: Grant
    Filed: April 27, 2009
    Date of Patent: January 15, 2013
    Assignee: National Instruments Corporation
    Inventors: Stephen R. Mercer, Akash B. Bhakta, Matthew E. Novacek
  • Patent number: 8352907
    Abstract: A software application recreation in a computing environment is provided. One embodiment involves analyzing program execution trace data of a software application, and using the analysis results in recreating an executable version of the software application from data traced at significant points during the software application execution. Recreating an executable version of the software application involves creating white space code to simulate the software application execution timing by replacing business logic code of the software application with white space code in the recreated executable version. The recreated executable version of the software application programmatically behaves essentially similarly to the software application.
    Type: Grant
    Filed: August 10, 2009
    Date of Patent: January 8, 2013
    Assignee: International Business Machines Corporation
    Inventors: Paul Kettley, Ian J. Mitchell
  • Patent number: 8352913
    Abstract: A component name manager operates within an integrated development environment to assist developers in creating dynamic websites and Internet applications. The component name manager identifies an input field displayed on a graphical user interface of an object-oriented software development environment. The input field uses a fully-qualified name of a software component for accessing to access instructions and data associated with the software component and located at an application server. In response to receiving an input associated with the input field, the component name manager displays a list of qualified names of software components available for use in the object-oriented software development environment. Each of the qualified names identifies a path for accessing a corresponding software component. The component name manager can resolve fully qualified names by accessing one or more of an application file, an administrator interface, project level mappings, and global level preference mappings.
    Type: Grant
    Filed: August 7, 2009
    Date of Patent: January 8, 2013
    Assignee: Adobe Systems Incorporated
    Inventors: Kiran Sakhare, Bhakti Pingale
  • Patent number: 8347273
    Abstract: A specification of a routine name of a root of a call tree and a specification of a desired depth of call tree tracing are obtained. Upon entering a given routine in a program, a determination is made whether the given routine is the root. Responsive to determining that the given one of the routines is the root, trace information for the routine forming the root is output. Furthermore, upon entering a given one of the routines called, directly or indirectly, by the routine forming the root, a determination is made whether the given one of the routines called, directly or indirectly, by the routine forming the root of the call tree is within the desired depth from the routine forming the root of the call tree; and if this is the case, trace information is output for given one of the routines called, directly or indirectly, by the routine forming the root of the call tree.
    Type: Grant
    Filed: October 9, 2008
    Date of Patent: January 1, 2013
    Assignee: International Business Machines Corporation
    Inventors: Prashanth K. Nageshappa, Prasanna K. Kalle, Venkataraghavan Lakshminarayanachar
  • Patent number: 8347272
    Abstract: A method of analyzing program source code prepared for a multithreading platform comprises analyzing a targeted source code set to extract a set of characteristic information for each wait operation; analyzing the targeted source code set to extract a set of characteristic information for each notification call to an application programming interface of the multithreading platform; identifying a one-way branching correspondence with a wait operation for each notification call by comparing the extracted set of characteristic information for the notification operation and the extracted set of characteristic information for each wait operation with a set of predefined asynchronous operation correspondence pattern information for notification and wait functions implemented by the application programming interface; extracting a set of information for each identified one-way branching correspondence; and storing the extracted set of information for each identified one-way branching correspondence in a data store.
    Type: Grant
    Filed: July 23, 2008
    Date of Patent: January 1, 2013
    Assignee: International Business Machines Corporation
    Inventors: Naoki Sugawara, Tadashi Yamamoto
  • Patent number: 8321845
    Abstract: Embodiments of the present invention address deficiencies of the art in respect to XPATH expression debugging and provide a novel and non-obvious method, system and apparatus for an XPATH expression debugging framework. In an embodiment of the invention, an XPATH expression debugging method can include receiving an XPATH input expression, parsing the XPATH input expression to produce a group of sub-expressions, and ordering the sub-expressions in a model for the XPATH input expression. Thereafter, in response to a selection of one of the sub-expressions in the model, a result set can be produced for the sub-expression.
    Type: Grant
    Filed: October 13, 2006
    Date of Patent: November 27, 2012
    Assignee: International Business Machines Corporation
    Inventors: William G. O'Farrell, Mariano Consens, John Wen Sheng Liu
  • Patent number: 8316355
    Abstract: Methods and systems are provided for analyzing parallelism of program code. According to a method, the sequential execution of the program code is simulated so as to trace the execution procedure of the program code, and parallelism of the program code is analyzed based on the result of the trace to the execution procedure of the program code. Execution information of the program code is collected by simulating the sequential execution of the program code, and parallelism of the program code is analyzed based on the collected execution information, so as to allow programmers to perform parallel task partitioning of the program code with respect to a multi-core architecture more effectively, thus increasing the efficiency of parallel software development.
    Type: Grant
    Filed: June 18, 2008
    Date of Patent: November 20, 2012
    Assignee: International Business Machines Corporation
    Inventors: Bo Feng, Rong Yan, Kun Wang, Hua Yong Wang
  • Patent number: 8312413
    Abstract: A background process is used to install at least one system hook for message interception of integrated circuit chip layout display software. A call message is intercepted through the system hook, and, responsive to the call message, current layout coordinates are read from the integrated circuit chip layout display software. A representation of the current layout coordinates is entered into tool control software configured to control a physical tool for analyzing integrated circuits, and the physical tool is controlled with the tool control software, based on the representation of the current layout coordinates. In an “inverse” approach, a background process is used to install at least one system hook for message interception of tool control software configured to control a physical tool for analyzing integrated circuits, and a call message is intercepted through the system hook. Responsive to the call message, current coordinates are read from the tool control software.
    Type: Grant
    Filed: January 22, 2010
    Date of Patent: November 13, 2012
    Assignee: International Business Machines Corporation
    Inventors: Franco Stellari, Peilin Song
  • Patent number: 8307435
    Abstract: The execution of a software application is diverted to detect software object corruption in the software application. Software objects used by the software application are identified and their pointers are inspected. One or more tests are applied to pointers pointing to the virtual method tables of the software objects, addresses (or pointers) in the virtual method tables, and memory attributes or content of the memory buffer identified by the addresses for inconsistencies that indicate corruption. A determination of whether the software objects are corrupted is made based on the outcome of the tests. If software object corruption is detected, proper corrective actions are applied to prevent malicious exploitation of the corruption.
    Type: Grant
    Filed: February 18, 2010
    Date of Patent: November 6, 2012
    Assignee: Symantec Corporation
    Inventors: Uriel Mann, Nishant Doshi
  • Patent number: 8307353
    Abstract: A system and method are provided for inlining across protection domain boundaries with a system virtual machine. A protection domain comprises a unique combination of a privilege level and a memory address space. The system virtual machine interprets or dynamically compiles not only application code executing under guest operating systems, but also the guest operating systems. For a program call that crosses a protection domain boundary, the virtual machine assembles an intermediate representation (IR) graph that spans the boundary. Region nodes corresponding to code on both sides of the call are enhanced with information identifying the applicable protection domains. The IR is optimized and used to generate instructions in a native ISA (Instruction Set Architecture) of the virtual machine. Individual instructions reveal the protection domain in which they are to operate, and instructions corresponding to different domains may be interleaved.
    Type: Grant
    Filed: August 12, 2008
    Date of Patent: November 6, 2012
    Assignee: Oracle America, Inc.
    Inventors: Gregory M. Wright, Christopher A. Vick, Mario I. Wolczko
  • Publication number: 20120254841
    Abstract: A computer-implemented method of finding portions of a computer program exhibiting irregular performance can include detecting an entry into a function of a computer program under test indicating a current execution of the function and, responsive to detecting an exit from the function, determining a count of a computing resource utilized by the function during the current execution of the function. The count of the computing resource can be compared with a count range determined according to at least one prior execution of the function. The function can be selectively represented within a call graph as a plurality of nodes according to the comparing.
    Type: Application
    Filed: June 18, 2012
    Publication date: October 4, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: KIRK J. KRAUSS
  • Patent number: 8281296
    Abstract: A system and method are provided for inlining a program call between processes executing under separate ISAs (Instruction Set Architectures) within a system virtual machine. The system virtual machine hosts any number of virtual operating system instances, each of which may execute any number of applications. The system virtual machine interprets or dynamically compiles not only application code executing under virtual operating systems, but also the virtual operating systems. For a program call that crosses ISA boundaries, the virtual machine assembles an intermediate representation (IR) graph that spans the boundary. Region nodes corresponding to code on both sides of the call are enhanced with information identifying the virtual ISA of the code. The IR is optimized and used to generate instructions in a native ISA (Instruction Set Architecture) of the virtual machine. Individual instructions are configured and executed (or emulated) to perform as they would within the virtual ISA.
    Type: Grant
    Filed: August 12, 2008
    Date of Patent: October 2, 2012
    Assignee: Oracle America, Inc.
    Inventors: Christopher A. Vick, Gregory M. Wright, Mario I. Wolczko
  • Patent number: 8276120
    Abstract: The exemplary embodiment is for an architecture integrated in a generic System on Chip (SoC) and consisting of reconfigurable coprocessors for executing nested program loops performed in a functional unit array in parallel. The data arrays are accessed from one or more system inputs and from an embedded memory array in parallel. The processed data arrays are sent back to the memory array or to system outputs and enable the acceleration of nested loops. The coprocessors are connected either synchronously or using asynchronous first in first out memories (FIFOs), forming a globally asynchronous locally synchronous system and each coprocessor can be programmed by tagging and rewriting the nested loops in the original program and produces a coprocessor configuration per each nested loop group, which is replaced in the original code with coprocessor input/output operations and control.
    Type: Grant
    Filed: October 8, 2008
    Date of Patent: September 25, 2012
    Assignee: Coreworks, S.A.
    Inventors: Jose Teixeira De Sousa, Victor Manuel Goncalves Martins, Nuno Calado Correia Lourenco, Alexandre Miguel Dias Santos, Nelson Goncalo Do Rosario Ribeiro
  • Patent number: 8276125
    Abstract: A computer implemented method, data processing system, and computer program product for automatic discovery of the Java classloader delegation hierarchy. One or more classloaders are instrumented with byte code instrumentation code such that a delegation event is received each time a classloader delegates a resource finding method to a parent classloader of the classloader. From each delegation event received, the classloader that generated the delegation event and a parent classloader to which the classloader directly delegates the resource finding method is determined. Based on the delegation events received, the classloaders to which a current classloader in the one or more classloaders can directly delegate are determined. The order of delegation to the classloaders may then be determined.
    Type: Grant
    Filed: December 4, 2007
    Date of Patent: September 25, 2012
    Assignee: International Business Machines Corporation
    Inventors: Nan Fan, Allan Bradley Winslow, Ting Bin Wu, Jean Xu Yu
  • Patent number: 8271956
    Abstract: A method, system and program product for dynamically adjusting trace buffer capacity based on execution history. The method includes receiving, by a module configured to trace, a plurality of traces pertaining to one or more trace events generated during execution of a program being traced, the trace events generated including panel data and sequence data. The method further includes determining, using trace data captured from the plurality of traces received, whether or not a path for a trace event is a new path. If the path for the trace event is determined to be a new path, the method includes dynamically adjusting, by the module, an initial size of a trace buffer configured to store the trace data captured, such that, the module increases the initial size of the trace buffer upon making a determination that the trace event is a new trace event based on execution history.
    Type: Grant
    Filed: February 7, 2008
    Date of Patent: September 18, 2012
    Assignee: International Business Machines Corporation
    Inventors: Michael J. Howland, Paul E. Rogers
  • Patent number: 8266600
    Abstract: A technique for model checking of multi-threaded software is herein disclosed which advantageously can be used to verify correctness properties expressed using temporal logic, e.g., linear time temporal logic and branching time temporal logic. The model checking problem of a concurrent system is decomposed into a plurality of model checking problems on individual threads of the multi-threaded software.
    Type: Grant
    Filed: March 24, 2006
    Date of Patent: September 11, 2012
    Assignee: NEC Laboratories America, Inc.
    Inventors: Vineet Kahlon, Aarti Gupta
  • Patent number: 8255554
    Abstract: Techniques for composing an application resource model in a data stream processing system are disclosed. The application resource model may be used to understand what resources will be consumed by an application when executed by the data stream processing system. For example, a method for composing an application resource model for a data stream processing system comprises the following steps. One or more operator-level metrics are obtained from an execution of a data stream processing application in accordance with a first configuration. The application is executed by one or more nodes of the data stream processing system, and the application is comprised of one or more processing elements that are comprised of one or more operators. One or more operator-level resource functions are generated based on the obtained one or more operator-level metrics. A processing element-level resource function is generated based on the one or more generated operator-level resource functions.
    Type: Grant
    Filed: May 14, 2009
    Date of Patent: August 28, 2012
    Assignee: International Business Machines Corporation
    Inventors: Henrique Andrade, Bugra Gedik, Sujay Sunil Parekh, Kun-Lung Wu, Xiaolan Zhang
  • Patent number: 8250579
    Abstract: One embodiment may estimate the processing time of tasks requested by an application by maintaining a state-model for the application. The state model may include states that represent the tasks requested by the application, with each state including the average run-time of each task. In another embodiment, a state model may estimate which task is likely to be requested for processing after the current task is completed by providing edges in the state model connecting the states. Each edge in the state model may track the number of times the application transitions from one task to the next. Over time, data may be gathered representing the percentage of time that each edge is from a state node. Given this information, the scheduler may estimate the CPU cost of the next task based on the current state, the most likely transition, and the cost of the predicted next task.
    Type: Grant
    Filed: June 27, 2008
    Date of Patent: August 21, 2012
    Assignee: Oracle America, Inc.
    Inventors: Seth Proctor, David Jurgens, James Megquier
  • Patent number: 8230437
    Abstract: A method of detecting deadlock in a multithreading program is provided. An invocation graph is constructed having a single root and a plurality of nodes corresponding to one or more functions written in code of the multithreading program. A resource graph is computed in accordance with one or more resource sets in effect at each node of the invocation graph. It is determined whether cycles exist between two or more nodes of the resource graph. A cycle is an indication of deadlock in the multithreading program.
    Type: Grant
    Filed: March 27, 2008
    Date of Patent: July 24, 2012
    Assignee: International Business Machines Corporation
    Inventor: George B. Leeman, Jr.
  • Patent number: 8230477
    Abstract: The present invention relates to methodologies for combining policy analysis and static analysis of code and thereafter determining whether the permissions granted by the policy to the code and to the subjects executing it are appropriate. In particular, this involves the verification that too many permissions have not been granted (wherein this would be a violation of the Principle of Least Privilege), and that the permissions being granted are sufficient to execute the code without run-time authorization failures, thus resulting in the failure of the program to execute.
    Type: Grant
    Filed: February 21, 2007
    Date of Patent: July 24, 2012
    Assignee: International Business Machines Corporation
    Inventors: Paolina Centonze, Marco Pistoia
  • Patent number: 8214807
    Abstract: Methods, systems, and products are provided for code path tracking. Embodiments include identifying an instrumented trace point in software code to be path tracked; identifying a function executed at the instrumented trace point in the software code; identifying parameters for the function executed at the instrumented trace point; and recording a description of the function, the parameters, and the result of the execution of the function using the parameters.
    Type: Grant
    Filed: January 10, 2007
    Date of Patent: July 3, 2012
    Assignee: International Business Machines Corporation
    Inventors: Robert J. Bestgen, Robert D. Driesch, Jr., Wei Hu, Shantan Kethireddy, Edward J. Miller, Andrew P. Passe, Ulrich Thiemann
  • Patent number: 8214819
    Abstract: Function calls for a program are sampled to determine call counts in the program. The call counts are determined based on sampled function calls collected during sampling intervals.
    Type: Grant
    Filed: July 9, 2004
    Date of Patent: July 3, 2012
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: David Mosberger
  • Publication number: 20120110557
    Abstract: A server device is configured to receive a request to identify a manner in which changed code propagates within an application; generate a group of blocks that correspond to code associated with a parent function corresponding to the application and which includes the changed code; perform an intra-procedural analysis on the group of blocks to identify a block that is affected by the changed code included within an epicenter block; perform an inter-procedural analysis on functions associated with the block, where, when performing the inter-procedural analysis, the server device is to generate another group of blocks associated with the functions, and identify another block that is affected by the changed code included within the epicenter block; and present, for display, information associated with the block or the other block that enables the application to be tested based on the block or the other block.
    Type: Application
    Filed: October 28, 2010
    Publication date: May 3, 2012
    Applicant: JUNIPER NETWORKS, INC.
    Inventors: Abhishek SINGH, Sachin VASUDEVA
  • Patent number: 8171449
    Abstract: A software tool is provided to analyze static source code. Source Code files are selected to define the project work space. A class and a method in the class are selected from said selected source code files. The tool generates a Call Tree as an ordered recursive sequence of all method calls in different classes or their instances that are invoked by said selected method in said selected class. A Sequence Diagram is generated from said Call Tree. The tool remembers all updates to the Call Tree used to generate the Sequence Diagram. This information is used when a generated Sequence Diagram is impacted due to changes made to any source code file included in the project.
    Type: Grant
    Filed: January 7, 2009
    Date of Patent: May 1, 2012
    Assignee: International Business Machines Corporation
    Inventors: Kapil Bhandari, Divya Bharti, Kallol Pal
  • Publication number: 20120102471
    Abstract: Systems and methods are provided for creating a data structure associated with a software application that is based on at least one framework. According to the method, source code and at least one configuration file of the software application is analyzed by at least one framework-specific processor so as to determine entry point information indicating entry points in the source code, request attribute access information indicating where attributes attached to a request data structure are read and written, and forward information indicating forwards performed by the software application. A data structure for a static analysis engine is created based on this information. The data structure includes a list of synthetic methods that model framework-related behavior of the software application, and a list of entry points indicating the synthetic methods and/or application methods of the software application that can be invoked by the framework.
    Type: Application
    Filed: October 26, 2010
    Publication date: April 26, 2012
    Applicant: International Business Machines Corporation
    Inventors: Shay ARTZI, Ryan BERG, John T. PEYTON, JR., Marco PISTOIA, Manu SRIDHARAN, Robert WIENER
  • Patent number: 8166464
    Abstract: Analyzing and detecting soft hang program errors may lead to suggestions for either curing the programming errors at runtime or refactoring the source code. For instance, responsive function invocation patterns and blocking function invocation patterns may be used to detect soft hang program errors in a source code file. Deductive database rules may be compiled from the responsive and blocking function invocation patterns to find matching function invocations in a call graph.
    Type: Grant
    Filed: June 27, 2008
    Date of Patent: April 24, 2012
    Assignee: Microsoft Corporation
    Inventors: Haoxiang Lin, Xi Wang, Zhenyu Guo, Xuezheng Liu, Zheng Zhang
  • Publication number: 20120089966
    Abstract: A two-pass technique for instrumenting an application is disclosed. One pass may be performed statically by analyzing the application and inserting probes while the application is not running. Another pass may be performed dynamically by analyzing data collected by the probes while the application runs to derive metrics for the probes. One or more metrics for each probe may be analyzed to determine whether to dynamically modify the probe. By dynamically modifying the probe, the application does not need to be shut down. Dynamically modifying the probe could include removing the probe from the application or moving the probe to another component (e.g., method) in the application, as examples. For example, the probe might be moved to a component that is either up or down the call graph from the component that the probe is presently in.
    Type: Application
    Filed: October 12, 2010
    Publication date: April 12, 2012
    Applicant: COMPUTER ASSOCIATES THINK, INC.
    Inventors: David Brooke Martin, Marco Gagliardi, Mark Jacob Addleman
  • Patent number: 8156479
    Abstract: A system and method for monitoring dynamic scopes in a runtime environment is disclosed. The system and method utilizes an algorithm which may be applied to both synchronous and asynchronous invocations. The method comprises determining an initial scope of a source component, the initial scope being a scope of the source component upon providing a synchronous call to invoke a target component. The scope declaration specified by the target component is determined. A resultant scope present upon invocation of the target component is then determined. The resultant scope is determined based on the initial scope of the source component and the scope declaration specified by the target component. A record is stored in a centralized location identifying the resultant scope, and the target component as a participant in the resultant scope.
    Type: Grant
    Filed: December 7, 2007
    Date of Patent: April 10, 2012
    Assignee: International Business Machines Corporation
    Inventors: Pamela H. Fong, Chendong Zou, Robert C. Chen, Edwin V. Sapugay