Electrically Conducting, Semi-conducting, Or Semi-insulating Host Material Patents (Class 977/784)
  • Patent number: 8058673
    Abstract: A biosensor using a nanodot and a method of manufacturing the same are provided. A silicon nanowire can be formed by a CMOS process to reduce manufacturing costs. In addition, an electrically charged nanodot is coupled to a target molecule to be detected, in order to readily change conductivity of the silicon nanowire, thereby making it possible to implement a biosensor capable of providing good sensitivity and being manufactured at a low cost.
    Type: Grant
    Filed: September 29, 2008
    Date of Patent: November 15, 2011
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Tae Youb Kim, Chil Seong Ah, Chang Geun Ahn, Han Young Yu, Jong Heon Yang, Moon Gyu Jang
  • Patent number: 7947542
    Abstract: A method for making a thin film transistor, the method comprising the steps of: (a) providing a carbon nanotube array and an insulating substrate; (b) pulling out a carbon nanotube film from the carbon nanotube array by using a tool; (c) placing at least one carbon nanotube film on a surface of the insulating substrate, to form a carbon nanotube layer thereon; (d) forming a source electrode and a drain electrode; wherein the source electrode and the drain electrode being spaced therebetween, and electrically connected to the carbon nanotube layer; and (e) covering the carbon nanotube layer with an insulating layer, and a gate electrode being located on the insulating layer.
    Type: Grant
    Filed: April 2, 2009
    Date of Patent: May 24, 2011
    Assignees: Tsinghua University, Hon Hai Precision Industry Co., Ltd.
    Inventors: Kai Liu, Kai-Li Jiang, Shou-Shan Fan
  • Patent number: 7935276
    Abstract: The present invention relates to novel composites that incorporate carbon nanospheres into a polymeric material. The polymeric material can be any polymer or polymerizable material compatible with graphitic materials. The carbon nanospheres are hollow, graphitic nanoparticles. The carbon nanospheres can be manufactured from a carbon precursor using templating catalytic nanoparticles. The unique size, shape, and electrical properties of the carbon nanospheres impart beneficial properties to the composites incorporating these nanomaterials.
    Type: Grant
    Filed: December 20, 2006
    Date of Patent: May 3, 2011
    Assignee: Headwaters Technology Innovation LLC
    Inventors: Bing Zhou, Cheng Zhang, Martin Fransson, Raymond B. Balée
  • Publication number: 20110095238
    Abstract: The present invention relates to novel composites that incorporate carbon nanospheres into a polymeric material. The polymeric material can be any polymer or polymerizable material compatible with graphitic materials. The carbon nanospheres are hollow, graphitic nanoparticles. The carbon nanospheres can be manufactured from a carbon precursor using templating catalytic nanoparticles. The unique size, shape, and electrical properties of the carbon nanospheres impart beneficial properties to the composites incorporating these nanomaterials.
    Type: Application
    Filed: January 6, 2011
    Publication date: April 28, 2011
    Applicant: HEADWATERS TECHNOLOGY INNOVATION, LLC.
    Inventors: Bing Zhou, Cheng Zhang, Martin Fransson, Raymond B. Balée
  • Patent number: 7857907
    Abstract: The present invention relates to a method for forming a layered structure with silicon nanocrystals. In one embodiment, the method comprises the steps of: (i) forming a first conductive layer on a substrate, (ii) forming a silicon-rich dielectric layer on the first conductive layer, and (iii) laser-annealing at least the silicon-rich dielectric layer to induce silicon-rich aggregation to form a plurality of silicon nanocrystals in the silicon-rich dielectric layer. The silicon-rich dielectric layer is one of a silicon-rich oxide film having a refractive index in the range of about 1.4 to 2.3, or a silicon-rich nitride film having a refractive index in the range of about 1.7 to 2.3. The layered structure with silicon nanocrystals in a silicon-rich dielectric layer is usable in a solar cell, a photodetector, a touch panel, a non-volatile memory device as storage node, and a liquid crystal display.
    Type: Grant
    Filed: January 25, 2007
    Date of Patent: December 28, 2010
    Assignee: AU Optronics Corporation
    Inventors: An-Thung Cho, Chih-Wei Chao, Chia-Tien Peng, Wan-Yi Liu, Ming-Wei Sun
  • Patent number: 7843061
    Abstract: The electrodes (7) and the contact zones (15) are structured in a film of a transparent conductive oxide (TCO), deposited on a transparent support (1) possibly coated with an intermediate film (3), while being separated by dielectric spaces (9) formed by nano fissures (11) obtained by UV radiation and passing through the TCO film. A protective film (13) can coat the electrodes (7) and the dielectric spaces (9).
    Type: Grant
    Filed: November 30, 2004
    Date of Patent: November 30, 2010
    Assignee: Asulab S.A.
    Inventors: Gian-Carlo Poli, Joachim Grupp, Pierre-Yves Baroni
  • Patent number: 7812376
    Abstract: Provided are a nonvolatile memory device and methods of fabricating and operating the same. The memory device may include a substrate, at least a first and a second electrode on the substrate to be spaced a distance from each other, a conductive nanotube between the first and second electrodes and selectively coming into contact with the first electrode or the second electrode due to an electrostatic force and a support supporting the conductive nanotube. The memory device may be an erasable nonvolatile memory device which may retain information even when no power is supplied and may ensure relatively high operating speed and relatively high integration density. Because the memory device writes and erases information in units of bits, the memory device may be applied to a large number of fields.
    Type: Grant
    Filed: November 3, 2006
    Date of Patent: October 12, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jin-Gyoo Yoo, Soo-Il Lee
  • Patent number: 7795677
    Abstract: Field-effect transistors (FETs) having nanowire channels are provided. In one aspect, a FET is provided. The FET comprises a substrate having a silicon-on-insulator (SOI) layer which is divided into at least two sections electrically isolated from one another, one section included in a source region and the other section included in a drain region; a channel region connecting the source region and the drain region and including at least one nanowire; an epitaxial semiconductor material, grown from the SOI layer, covering the nanowire and attaching the nanowire to each section of the SOI layer; and a gate over the channel region.
    Type: Grant
    Filed: September 5, 2007
    Date of Patent: September 14, 2010
    Assignee: International Business Machines Corporation
    Inventors: Sarunya Bangsaruntip, Guy Moshe Cohen, Katherine Lynn Saenger
  • Patent number: 7776425
    Abstract: A non-vacuum-based, non-collodial chemistry-based method of synthesizing metal nanoparticles and nanoparticle-nanostructured material composites obtained by that method. An embodiment of the method of this invention for fabricating a nanoparticle-nanostructured material composite and synthesizing nanoparticles includes preparing a nanostructured/nanotextured material, and, contacting the nanostructured/nanotextured material with a solution. Nanoparticles are synthesized on the nanostructured/nanotextured material as a result of the contact. The method of the present invention can be utilized to fabricate SPR and SERS substrates for sensing and detection. Additional systems based on this approach (e.g., surface plasmon resonance absorption and alloying sensors and nanocatalysts) are described.
    Type: Grant
    Filed: January 21, 2004
    Date of Patent: August 17, 2010
    Assignee: The Penn State Research Foundation
    Inventors: Ali Kaan Kalkan, Stephen J. Fonash
  • Patent number: 7749407
    Abstract: There is provided a transparent conductor including conductive nanoparticles and at least one of (a) a fluorinated acid polymer and (b) a semiconductive polymer doped with a fluorinated acid polymer. The nanoparticles are carbon nanoparticles, metal nanoparticles, or combinations thereof. The carbon and metal nanoparticles are selected from nanotubes, fullerenes, and nanofibers. The acid polymers are fluorinated or highly fluorinated and have acidic groups including carboxylic acid groups, sulfonic acid groups, sulfonimide groups, phosphoric acid groups, phosphonic acid groups, and combinations thereof. The semiconductive polymers comprise homopolymers and copolymers derived from monomers selected from substituted and unsubstituted thiophenes, pyrroles, anilines, and cyclic heteroaromatics, and combinations of those. The compositions may be used in organic electronic devices (OLEDs).
    Type: Grant
    Filed: June 28, 2006
    Date of Patent: July 6, 2010
    Assignee: E.I. du Pont de Nemours and Company
    Inventors: Che-Hsiung Hsu, Hjalti Skulason
  • Patent number: 7741416
    Abstract: The present invention relates to colloidal photonic crystals using colloidal nanoparticles and a method for the preparation thereof, wherein by adding a viscoelastic material into a solution containing the colloidal nanoparticles when preparing the colloidal photonic crystals, a uniform volume contraction occurs due to the elasticity of the viscoelastic material even when a nonuniform volume contraction occurs while drying a dispersion medium in the colloidal solution. Thus, it is possible to prepare 2 or 3 dimensional colloidal photonic crystals of large scale with no defects in less time.
    Type: Grant
    Filed: November 6, 2006
    Date of Patent: June 22, 2010
    Assignee: LG Chem, Ltd.
    Inventors: Young-jun Hong, Sang-hyuk Im
  • Patent number: 7732237
    Abstract: A method of forming an optically active region on a silicon substrate includes the steps of epitaxially growing a silicon buffer layer on the silicon substrate and epitaxially growing a SiGe cladding layer having a plurality of arrays of quantum dots disposed therein, the quantum dots being formed from a compound semiconductor material having a lattice mismatch with the silicon buffer layer. The optically active region may be incorporated into devices such as light emitting diodes, laser diodes, and photodetectors.
    Type: Grant
    Filed: June 27, 2005
    Date of Patent: June 8, 2010
    Assignee: The Regents of the University of California
    Inventor: Ya-Hong Xie
  • Patent number: 7718552
    Abstract: A method and device of nanostructured titania that is crack free. A method in accordance with the present invention comprises depositing a Ti film on a surface, depositing a masking layer on the Ti film, etching said masking layer to expose a limited region of the Ti film, the limited region being of an area less than a threshold area, oxidizing the exposed limited region of the Th.ucsbi film, and annealing the exposed limited region of the Ti film.
    Type: Grant
    Filed: April 4, 2006
    Date of Patent: May 18, 2010
    Assignee: The Regents of the University of California
    Inventors: Zuruzi Abu Samah, Noel C. MacDonald, Marcus Ward, Martin Moskovits, Andrei Kolmakov, Cyrus R. Safinya
  • Patent number: 7682449
    Abstract: Disclosed herein are heterostructure semiconductor nanowires. The heterostructure semiconductor nanowires comprise semiconductor nanocrystal seeds and semiconductor nanocrystal wires grown in a selected direction from the surface of the semiconductor nanocrystal seeds wherein the semiconductor nanocrystal seeds have a composition different from that of the semiconductor nanocrystal wires. Further disclosed is a method for producing the heterostructure semiconductor nanowires.
    Type: Grant
    Filed: August 8, 2007
    Date of Patent: March 23, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Eun Joo Jang, Shin Ae Jun
  • Patent number: 7651766
    Abstract: A carbon nanotube reinforced metal nanocomposite material includes a continuous metal phase, and a plurality of carbon nanotubes dispersed in the continuous metal phase. The metal phase extends throughout substantially an entire thickness of the nanocomposite material. The nanotubes are preferably single wall nanotubes (SWNTs). Carbon nanotube reinforced metal nanocomposites according to the invention provide thermal conductivity and electrical conductivity which are generally significantly higher than the pure metal continuous phase material, mechanical strength is 2 to 3 times greater than that of the pure metal, and a tailorable coefficient of thermal expansion obtainable through changing the percentage of nanotubes in the nanocomposite.
    Type: Grant
    Filed: May 19, 2006
    Date of Patent: January 26, 2010
    Assignee: University of Central Florida Research Foundation, Inc.
    Inventor: Quanfang Chen
  • Patent number: 7638345
    Abstract: A method of manufacturing silicon nanowires is characterized in that silicon nanowires are formed and grown through a solid-liquid-solid process or a vapor-liquid-solid process using a porous glass template having nanopores doped with erbium or an erbium precursor. In addition, a device including silicon nanowires formed using the above exemplary method according to the present invention can be effectively applied to various devices, for example, electronic devices such as field effect transistors, sensors, photodetectors, light emitting diodes, laser diodes, etc.
    Type: Grant
    Filed: May 31, 2006
    Date of Patent: December 29, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Eun Kyung Lee, Byoung Lyong Choi, Soon Jae Kwon, Kyung Sang Cho, Jae Ho Lee
  • Patent number: 7635517
    Abstract: The invention includes fabrics that have been dyed or finished with a dye that contains a conductive mixture of conductive organic materials, inorganic materials, metals, metal oxides, carbon and carbon nanotubes or combinations or mixtures thereof. The dye is used to finish a fabric such that it is conductive. These fabrics are useful in shielding law enforcement personnel from energy weapons discharge and in providing an electrostatic medium for personnel that work with static sensitive products. The fabrics, when appropriately grounded, dissipate the emitted charge and transmit it to ground. Additionally, the apparel has high wear resistance and is both thermally and electrically conductive yet is comfortable to wear.
    Type: Grant
    Filed: February 7, 2006
    Date of Patent: December 22, 2009
    Assignee: Mystic MD, Inc.
    Inventor: Joel S. Douglas
  • Patent number: 7633148
    Abstract: A plurality of conductive pads (2) are formed on a mounting surface of a mounting board. Conductive pads (11) are formed on a principal surface of a semiconductor chip (10) at positions corresponding to the conductive pads of the mounting board, when the principal surface faces toward the mounting board. A plurality of conductive nanotubes (12) extend from the conductive pads of one of the mounting board and the semiconductor chip. A press mechanism (3) presses the semiconductor chip against the mounting board and restricts a position of the semiconductor chip on the mounting surface to mount the semiconductor chip on the mounting board, in a state that tips of the conductive nanotubes are in contact with the corresponding conductive pads not formed with the conductive nanotubes.
    Type: Grant
    Filed: February 15, 2007
    Date of Patent: December 15, 2009
    Assignee: Fujitsu Limited
    Inventors: Yuji Awano, Masataka Mizukoshi, Taisuke Iwai, Tomoji Nakamura
  • Patent number: 7628959
    Abstract: A hydrogen gas sensor and/or switch fabricated from arrays nanowires composed of metal or metal alloys that have stable metal hydride phases. The sensor and/or switch response times make it quite suitable for measuring the concentration of hydrogen in a flowing gas stream. The sensor and/or switch preferably operates by measuring the resistance of several metal nanowires arrayed in parallel in the presence of hydrogen gas. The nanowires preferably comprise gaps or break junctions that can function as a switch that closes in the presence of hydrogen gas. Consequently, the conductivity of the nanowires of the sensor and/or switch increases in the presence of hydrogen.
    Type: Grant
    Filed: March 6, 2007
    Date of Patent: December 8, 2009
    Assignee: The Regents of the University of California
    Inventors: Reginald Mark Penner, Erich C. Walter, Fred Favier
  • Patent number: 7608902
    Abstract: A nanowire composite and a method of preparing the nanowire composite comprise a template having a plurality of hollow channels, nanowires formed within the respective channels of the template, and a functional element formed by removing a portion of the template so that one or more of the nanowires formed within the portion of the template are exposed. Since the nanowire composite can be prepared in a simple manner at low costs and can be miniaturized, the nanowire composite finds application in resonators and a variety of sensors.
    Type: Grant
    Filed: May 26, 2006
    Date of Patent: October 27, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Soon Jae Kwon, Byoung Lyong Choi, Eun Kyung Lee, Kyung Sang Cho, In Taek Han, Jae Ho Lee, Seong Jae Choi
  • Publication number: 20090253580
    Abstract: A process for growth of boron-based nanostructures, such as nanotubes and nanowires, with a controlled diameter and with controlled chemical (such as composition, doping) as well as physical (such as electrical and superconducting) properties is described. The boron nanostructures are grown on a metal-substituted MCM-41 template with pores having a uniform pore diameter of less than approximately 4 nm, and can be doped with a Group Ia or Group IIa electron donor element during or after growth of the nanostructure. Preliminary data based on magnetic susceptibility measurements suggest that Mg-doped boron nanotubes have a superconducting transition temperature on the order of 100 K.
    Type: Application
    Filed: March 27, 2009
    Publication date: October 8, 2009
    Applicant: Yale University
    Inventors: Lisa Pfefferle, Dragos Ciuparu
  • Publication number: 20090229865
    Abstract: A conductor for a flexible substrate, used for a flexible flat cable or disposed inside a flexible printed-circuit board, according to the present invention comprises: a base conductor made of Cu or Cu-alloy; a plating film made of Sn or Sn-alloy formed on a surface of the base conductor; and a surface oxide film formed on a surface of the plating film, in which the surface oxide film includes oxide of an element other than Sn or a mixture of Sn oxide and oxide of an element other than Sn.
    Type: Application
    Filed: March 11, 2008
    Publication date: September 17, 2009
    Inventors: Takayuki Tsuji, Toshiyuki Horikoshi, Masato Ito
  • Publication number: 20090186267
    Abstract: An anode structure for lithium batteries includes nanofeatured silicon particulates dispersed in a conductive network. The particulates are preferably made from metallurgical grade silicon powder via HF/HNO3 acid treatment, yielding crystallite sizes from about 1 to 20 nm and pore sizes from about 1 to 100 nm. Surfaces of the particles may be terminated with selected chemical species to further modify the anode performance characteristics. The conductive network is preferably a carbonaceous material or composite, but it may alternatively contain conductive ceramics such as TiN or B4C. The anode structure may further contain a current collector of copper or nickel mesh or foil.
    Type: Application
    Filed: January 21, 2009
    Publication date: July 23, 2009
    Inventor: Terry N. Tiegs
  • Patent number: 7550823
    Abstract: A nonvolatile memory cell is capable of reducing an excessive current leakage due to a rough surface of a polysilicon and of performing even at a low temperature process by forming the first oxide film including a silicon oxynitride (SiOxNy) layer using nitrous oxide plasma and by forming a plurality of silicon nanocrystals in a nitride film by implanting a silicon nanocrystal on the nitride film by an ion implantation method, and a fabricating method thereof and a memory apparatus including the nonvolatile memory cell.
    Type: Grant
    Filed: July 13, 2007
    Date of Patent: June 23, 2009
    Assignee: Samsung Mobile Display Co., Ltd.
    Inventors: Byoung Deog Choi, Jun Sin Yi, Sung Wook Jung, Sung Hyung Hwang
  • Publication number: 20090155573
    Abstract: A method for forming arrays of metal, alloy, semiconductor or magnetic clusters is described. The method comprises placing a scaffold on a substrate, the scaffold comprising molecules selected from the group consisting of polynucleotides, polypeptides, and perhaps combinations thereof. Polypeptides capable of forming ? helices are currently preferred for forming scaffolds. Arrays are then formed by contacting the scaffold with plural, monodispersed ligand-stabilized clusters. Each cluster, prior to contacting the scaffold, includes plural exchangeable ligands bonded thereto. If the clusters are metal clusters, then the metal preferably is selected from the group consisting of Ag, Au, Pt, Pd and mixtures thereof. A currently preferred metal is gold, and a currently preferred metal cluster is Au55 having a radius of from about 0.7 to about 1 nm. Compositions also are described, one use for which is in the formation of cluster arrays.
    Type: Application
    Filed: December 19, 2007
    Publication date: June 18, 2009
    Inventors: Martin N. Wybourne, James E. Hutchison
  • Publication number: 20090127540
    Abstract: The present invention is directed to systems and methods for nanowire growth. In an embodiment, methods for nanowire growth and doping are provided, including methods for epitaxial vertically oriented nanowire growth including providing a substrate material having one or more nucleating particles deposited thereon in a reaction chamber, introducing an etchant gas into the reaction chamber at a first temperature which gas aids in cleaning the surface of the substrate material, contacting the nucleating particles with at least a first precursor gas to initiate nanowire growth, and heating the alloy droplet to a second temperature, whereby nanowires are grown at the site of the nucleating particles. The etchant gas may also be introduced into the reaction chamber during growth of the wires to provide nanowires with low taper.
    Type: Application
    Filed: November 6, 2007
    Publication date: May 21, 2009
    Applicant: NANOSYS, INC.
    Inventor: David Taylor
  • Patent number: 7413973
    Abstract: Provided is a method for manufacturing a nano-gap electrode device comprising the steps of: forming a first electrode on a substrate; forming a spacer on a sidewall of the first electrode; forming a second electrode on an exposed substrate at a side of the spacer; and forming a nano-gap between the first electrode and the second electrode by removing the spacer, whereby it is possible to control the nano-gap position, width, shape, and etc., reproducibly, and manufacture a plurality of nano-gap electrode devices at the same time.
    Type: Grant
    Filed: August 28, 2006
    Date of Patent: August 19, 2008
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Chan Woo Park, Sung Yool Choi, Sang Ouk Ryu, Han Young Yu, Ung Hwan Pi, Tae Hyoung Zyung
  • Publication number: 20080110342
    Abstract: A filtration device including a filtration medium having a plurality of nanofibers of diameters less than 1 micron formed into a fiber mat in the presence of an abruptly varying electric field. The filtration device includes a support attached to the filtration medium and having openings for fluid flow therethrough. A device for making a filter material. The device includes an electrospinning element configured to electrospin a plurality of fibers from a tip of the electrospinning element, a collector opposed to the electrospinning element configured to collect electrospun fibers on a surface of the collector, and an electric field modulation device configured to abruptly vary an electric field at the collector at least once during electrospinning of the fibers. A method for making a filter material.
    Type: Application
    Filed: November 13, 2006
    Publication date: May 15, 2008
    Applicant: Research Triangle Institute
    Inventors: David S. Ensor, Howard J. Walls, Anthony L. Andrady, Teri A. Walker
  • Patent number: 7326954
    Abstract: A method for forming arrays of metal, alloy, semiconductor or magnetic clusters is described. The method comprises placing a scaffold on a substrate, the scaffold comprising molecules selected from the group consisting of polynucleotides, polypeptides, and perhaps combinations thereof. Polypeptides capable of forming ? helices are currently preferred for forming scaffolds. Arrays are then formed by contacting the scaffold with plural, monodispersed ligand-stabilized clusters. Each cluster, prior to contacting the scaffold, includes plural exchangeable ligands bonded thereto. If the clusters are metal clusters, then the metal preferably is selected from the group consisting of Ag, Au, Pt, Pd and mixtures thereof. A currently preferred metal is gold, and a currently preferred metal cluster is Au55 having a radius of from about 0.7 to about 1 nm. Compositions also are described, one use for which is in the formation of cluster arrays.
    Type: Grant
    Filed: April 2, 2004
    Date of Patent: February 5, 2008
    Assignee: State of Oregon Acting By and Through the State Board of Higher Education on Behalf of the University of Oregon
    Inventors: Martin N. Wybourne, James E. Hutchison
  • Patent number: 7294560
    Abstract: A method provides a simple yet reliable technique to assemble one-dimensional nanostructures selectively in a desired pattern for device applications. The method comprises forming a plurality of spaced apart conductive elements (12, 20) in a sequential pattern (26) on a substrate (17) and immersing the plurality of spaced apart conductive elements (12, 20) in a solution (23) comprising a plurality of one-dimensional nanostructures (22). A voltage is applied to one of the plurality of spaced apart conductive elements (12, 20) formed in the sequential pattern (26), thereby causing portions of the plurality of one-dimensional nanostructures (22) to migrate between adjacent conductive elements (12, 20) in sequence beginning with the one of the plurality of spaced apart conductive elements (12, 20) to which the voltage is applied.
    Type: Grant
    Filed: November 28, 2006
    Date of Patent: November 13, 2007
    Assignee: Motorola, Inc.
    Inventors: Larry A. Nagahara, Islamshah S. Amlani
  • Patent number: 7250082
    Abstract: Provided is a chemical wet preparation method for Group 12-16 compound semiconductor nanocrystals. The method includes mixing one or more Group 12 metals or Group 12 precursors with a dispersing agent and a solvent followed by heating to obtain a Group 12 metal precursor solution; dissolving one or more Group 16 elements or Group 16 precursors in a coordinating solvent to obtain a Group 16 element precursor solution; and mixing the Group 12 metal precursors solution and the Group 16 element precursors solution to form a mixture, and then reacting the mixture to grow the semiconductor nanocrystals. The Group 12-16 compound semiconductor nanocrystals are stable and have high quantum efficiency and uniform sizes and shapes.
    Type: Grant
    Filed: July 7, 2004
    Date of Patent: July 31, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Eun-joo Jang, Tae-kyung Ahn
  • Patent number: 7244983
    Abstract: Apparatus for an on-chip decoupling capacitor. The capacitor includes a bottom electrode that consist of nanostructures deposited over a planarized metal, a dielectric material deposited over the nanostructures, and a top electrode deposited over the dielectric material. The shape of the bottom electrode is tunable by modulating the diameter and/or the length of the nanostructures to produce an increase in capacitance without increasing the footprint of the on-chip decoupling capacitor.
    Type: Grant
    Filed: April 23, 2003
    Date of Patent: July 17, 2007
    Assignee: Intel Corporation
    Inventors: Sarah E. Kim, Scot A. Kellar
  • Patent number: 7229692
    Abstract: Methods, manufactures, machines and compositions are described for nanotransfer and nanoreplication using deterministically grown sacrificial nanotemplates. An apparatus includes a substrate and a nanoconduit material coupled to a surface of the substrate, where the substrate defines an aperture and the nanoconduit material defines a nanoconduit that is i) contiguous with the aperture and ii) aligned substantially non-parallel to a plane defined by the surface of the substrate. An apparatus includes a substrate and a nanoreplicant structure coupled to a surface of the substrate.
    Type: Grant
    Filed: February 9, 2004
    Date of Patent: June 12, 2007
    Assignee: UT-Battelle LLC
    Inventors: Anatoli V. Melechko, Timothy E. McKnight, Michael A. Guillorn, Bojan Ilic, Vladimir I. Merkulov, Mitchel J. Doktycz, Douglas H. Lowndes, Michael L. Simpson
  • Patent number: 7211503
    Abstract: Embodiments of the present invention are directed to methods for fabricating microscale-to-nanoscale interfaces. In numerous embodiments of the present invention, hybrid microscale/nanoscale crossbar multiplexers/demultiplexers provide for selection and control of individual nanowires through a set of microscale signal lines. In order to overcome the difficulty of aligning nanowires with submicroscale and microscale signal lines, at least a portion of the interconnections between nanowires and sub-microscale or microscale signal lines are randomly generated by one of various connection-fabrication methods. Addresses for individual nanowires, or groups of nanowires, can be discovered by testing the microscale-to-nanoscale interfaces.
    Type: Grant
    Filed: February 24, 2005
    Date of Patent: May 1, 2007
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Yong Chen, Tad Hogg
  • Patent number: 7197804
    Abstract: A thermal conductor is made of copper and carbon nanotubes powders that are compressed together and then cold rolled into sheets for aligning the carbon nanotubes for providing a composite matrix having a low coefficient of thermal expansion, high thermal conductivity, and high electrical conductivity, for preferred use as a conducting heat sink, such as a laser submount, for heat sinking dissipation and electrical grounding of high-power electrical components and circuits, such as a laser diode.
    Type: Grant
    Filed: August 29, 2005
    Date of Patent: April 3, 2007
    Assignee: The Aerospace Corporation
    Inventor: Heinrich G. Muller
  • Patent number: 7186381
    Abstract: A hydrogen gas sensor and/or switch fabricated from arrays nanowires composed of metal or metal alloys that have stable metal hydride phases. The sensor and/or switch response times make it quite suitable for measuring the concentration of hydrogen in a flowing gas stream. The sensor and/or switch preferably operates by measuring the resistance of several metal nanowires arrayed in parallel in the presence of hydrogen gas. The nanowires preferably comprise gaps or break junctions that can function as a switch that closes in the presence of hydrogen gas.
    Type: Grant
    Filed: May 30, 2002
    Date of Patent: March 6, 2007
    Assignee: Regents of the University of California
    Inventors: Reginald Mark Penner, Erich C. Walter, Fred Favier
  • Patent number: 7132677
    Abstract: An GaN light emitting diode (LED) having a nanorod (or, nanowire) structure is disclosed. The GaN LED employs GaN nanorods in which a n-type GaN nanorod, an InGaN quantum well and a p-type GaN nanorod are subsequently formed in a longitudinal direction by inserting the InGaN quantum well into a p-n junction interface of the p-n junction GaN nanorod. In addition, a plurality of such GaN nanorods are arranged in an array so as to provide an LED having much greater brightness and higher light emission efficiency than a conventional laminated-film GaN LED.
    Type: Grant
    Filed: February 13, 2004
    Date of Patent: November 7, 2006
    Assignee: Dongguk University
    Inventors: Hwa-Mok Kim, Tae-Won Kang, Kwan-Soo Chung
  • Patent number: 7105425
    Abstract: A semiconductor device with a superlattice and method of making same includes forming a layer of amorphous silicon over a substrate, and forming a layer of nanocrystals by laser thermal annealing the layer of amorphous silicon. A gate dielectric is formed between the layer of amorphous silicon and the substrate. A dielectric layer is formed on the layer of amorphous silicon. The steps of forming the layer of amorphous silicon and forming the dielectric layer can be repeated. The thickness of the dielectric layer is between about 25 to 40 angstroms, and the thickness of the amorphous silicon layer is between about 30 to 50 angstroms. The average diameter of the nanocrystals is less than 40 angstroms.
    Type: Grant
    Filed: May 16, 2002
    Date of Patent: September 12, 2006
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Zoran Krivokapic