Heterojunction Formed Between Semiconductor Materials That Differ In That They Belong To Different Periodic Table Groups (e.g., Ge (group Iv) - Gaas (group Iii-v) Or Inp (group Iii-v) - Cdte (group Ii-vi), Etc.) Patents (Class 977/825)
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Patent number: 8993998Abstract: An electro-optic device includes a first electrode, an active layer formed over and electrically connected with the first electrode, a buffer layer formed over and electrically connected with the active layer, and a second electrode formed directly on the buffer layer. The second electrode includes a plurality of nanowires interconnected into a network of nanowires. The buffer layer provides a physical barrier between the active layer and the plurality of nanowires to prevent damage to the active layer while the second electrode is formed.Type: GrantFiled: March 15, 2013Date of Patent: March 31, 2015Assignee: The Regents of the University of CaliforniaInventors: Yang Yang, Rui Zhu, Chun Chao Chen, Letian Dou, Gang Li
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Patent number: 8937294Abstract: Disclosed herein is a semiconducting nanoparticle comprising a one-dimensional semiconducting nanoparticle having a first end and a second end; where the second end is opposed to the first end; and two first endcaps, one of which contacts the first end and the other of which contacts the second end respectively of the one-dimensional semiconducting nanoparticle; where the first endcap that contacts the first end comprises a first semiconductor and where the first endcap extends from the first end of the one-dimensional semiconducting nanoparticle to form a first nanocrystal heterojunction; where the first endcap that contacts the second end comprises a second semiconductor; where the first endcap extends from the second end of the one-dimensional semiconducting nanoparticle to form a second nanocrystal heterojunction; and where the first semiconductor and the second semiconductor are chemically different from each other.Type: GrantFiled: March 15, 2013Date of Patent: January 20, 2015Inventors: Moonsub Shim, Nuri Oh, You Zhai, Sooji Nam, Peter Trefonas, Kishori Deshpande, Jake Joo
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Patent number: 8932940Abstract: Embodiments of the invention provide a method for direct heteroepitaxial growth of vertical III-V semiconductor nanowires on a silicon substrate. The silicon substrate is etched to substantially completely remove native oxide. It is promptly placed in a reaction chamber. The substrate is heated and maintained at a growth temperature. Group III-V precursors are flowed for a growth time. Preferred embodiment vertical Group III-V nanowires on silicon have a core-shell structure, which provides a radial homojunction or heterojunction. A doped nanowire core is surrounded by a shell with complementary doping. Such can provide high optical absorption due to the long optical path in the axial direction of the vertical nanowires, while reducing considerably the distance over which carriers must diffuse before being collected in the radial direction. Alloy composition can also be varied. Radial and axial homojunctions and heterojunctions can be realized. Embodiments provide for flexible Group III-V nanowire structures.Type: GrantFiled: October 28, 2009Date of Patent: January 13, 2015Assignee: The Regents of the University of CaliforniaInventors: Deli Wang, Cesare Soci, Xinyu Bao, Wei Wei, Yi Jing, Ke Sun
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Patent number: 8920766Abstract: Provided are methods for making quantum nanostructures based on use of a combination of nucleation and growth precursors. The methods can be used to provide quantum nanostructures of a selected size. Also provided are quantum nanostructures, compositions comprising the quantum nanostructures, and uses of the quantum nanostructures. The quantum nanostructures can be used, for example, in imaging applications.Type: GrantFiled: August 21, 2013Date of Patent: December 30, 2014Assignee: University of RochesterInventors: Todd D. Krauss, Christopher M. Evans
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Patent number: 8809672Abstract: The present disclosure provides a catalyst-free growth mode of defect-free Gallium Arsenide (GaAs)-based nanoneedles on silicon (Si) substrates with a complementary metal-oxide-semiconductor (CMOS)-compatible growth temperature of around 400° C. Each nanoneedle has a sharp 2 to 5 nanometer (nm) tip, a 600 nm wide base and a 4 micrometer (?m) length. Thus, the disclosed nanoneedles are substantially hexagonal needle-like crystal structures that assume a 6° to 9° tapered shape. The 600 nm wide base allows the typical micro-fabrication processes, such as optical lithography, to be applied. Therefore, nanoneedles are an ideal platform for the integration of optoelectronic devices on Si substrates. A nanoneedle avalanche photodiode (APD) grown on silicon is presented in this disclosure as a device application example. The APD attains a high current gain of 265 with only 8V bias.Type: GrantFiled: May 27, 2010Date of Patent: August 19, 2014Assignee: The Regents of the University of CaliforniaInventors: Chih-Wei Chuang, Connie Chang-Hasnain, Forrest Grant Sedgwick, Wai Son Ko
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Patent number: 8779411Abstract: The present disclosure provides a light emitting diode and a method of manufacturing the same. The light emitting diode includes a graphene layer on a second conductive semiconductor layer and a plurality of metal nanoparticles formed on some region of the graphene layer, whereby adhesion between the second conductive semiconductor layer comprised of an inorganic material and the graphene layer is enhanced, thereby securing stability and reliability of the light emitting diode. In addition, the light emitting diode allows uniform spreading of electric current, thereby allowing stable emission of light through a surface area of the light emitting diode.Type: GrantFiled: November 16, 2012Date of Patent: July 15, 2014Assignee: Gwanju Institute of Science and TechnologyInventors: Dong Seon Lee, Jae Phil Shim, Seong Ju Park, Min Hyeok Choe, Do Hyung Kim, Tak Hee Lee
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Patent number: 8721926Abstract: A single-source solid precursor matrix for semiconductor nanocrystals includes 45-55% by weight of zinc, 28-35% by weight of oxygen, 0.70-1.2% by weight of carbon, 1.5-2.5% by weight of hydrogen, 4-6% by weight of nitrogen, 5-7% by weight of sulphur and 1-5% by weight of dopant ions with respect to the weight of zinc atoms. Doped semiconductor nanocrystals for multicolor displays and bio markers include 60-65% by weight of zinc, 30-32% by weight of sulphur, 1.2-1.3% by weight of copper and 1.2-1.3% by weight of dopant ions.Type: GrantFiled: September 14, 2012Date of Patent: May 13, 2014Assignee: The Director General Defence Research & Development OrganisationInventors: Manzoor Koyakutty, Aditya Verma, Sampat Raj Vedera, Narendra Kumar, Thundyil Raman Narayana Kutty
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Patent number: 8685841Abstract: The present invention is directed to a novel synthetic method for producing nanoscale heterostructures, and particularly nanoscale heterostructure particles, rods and sheets, that comprise a metal core and a monocrystalline semiconductor shell with substantial lattice mismatches between them. More specifically, the invention concerns the use of controlled soft acid-base coordination reactions between molecular complexes and colloidal nanostructures to drive the nanoscale monocrystalline growth of the semiconductor shell with a lattice structure incommensurate with that of the core. The invention also relates to more complex hybrid core-shell structures that exhibit azimuthal and radial nano-tailoring of structures. The invention is additionally directed to the use of such compositions in semiconductor devices.Type: GrantFiled: March 23, 2012Date of Patent: April 1, 2014Assignee: University of Maryland College ParkInventors: Jiatao Zhang, Yun Tang, Min Ouyang
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Patent number: 8633040Abstract: The invention can be used for producing different luminescent materials and as a basis for producing subminiature light-emitting diodes, white light sources, single-electron transistors, nonlinear optical devices and photosensitive and photovoltaic devices. The inventive method for producing semiconductor quantum dots involves synthesizing nanocrystal nuclei from a chalcogen-containing precursor and a precursor containing a group II or IV metal using an organic solvent and a surface modifier. The method is characterized in that (aminoalkyl)trialkoxysilanes are used as the surface modifier, core synthesis is carried out at a permanent temperature ranging from 150 to 250 C for 15 seconds to 1 hour and in that the reaction mixture containing the nanocrystal is additionally treated by UV-light for 1-10 minutes and by ultrasound for 5-15 minutes.Type: GrantFiled: August 18, 2009Date of Patent: January 21, 2014Assignee: The “Nanotech-Dubna” Trial Center for Science and TechnologyInventors: Roman Vladimirovich Novichkov, Maxim Sergeevich Wakstein, Ekaterina Leonidovna Nodova, Aleksey Olegovich Maniashin, Irina Ivanovna Taraskina
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Patent number: 8629428Abstract: A tunnel field effect transistor (TFET) and method of making the same is provided. The TFET comprises a source-channel-drain structure and a gate electrode. The source region comprises a first source sub-region which is doped with a first doping profile with a dopant element of a first doping type having a first peak concentration and a second source sub-region close to a source-channel interface which is doped with a second doping profile with a second dopant element with the same doping type as the first dopant element and having a second peak concentration. The second peak concentration of the second doping profile is substantially higher than the maximum doping level of the first doping profile close to an interface between the first and the second source sub-regions.Type: GrantFiled: May 17, 2012Date of Patent: January 14, 2014Assignees: IMEC, Katholieke Universiteit Leuven, K.U. Leuven R&DInventors: Anne S. Verhulst, Kuo-Hsing Kao
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Patent number: 8460632Abstract: A method of manufacturing a quantum dot, the method including: mixing of a Group II precursor and a Group III precursor in a solvent to prepare a first mixture; heating the first mixture at a temperature of about 200° C. to about 350° C.; adding a Group V precursor and a Group VI precursor to the first mixture while maintaining the first mixture at the temperature of about 200° C. to about 350° C. to prepare a second mixture; and maintaining the second mixture at the temperature of about 200° C. to about 350° C. to form a quantum dot.Type: GrantFiled: October 19, 2010Date of Patent: June 11, 2013Assignees: Samsung Display Co., Ltd., SNU R&DB FoundationInventors: Jong Hyuk Kang, Junghan Shin, Jae Byung Park, Dong-Hoon Lee, Minki Nam, Kookheon Char, Seonghoon Lee, WanKi Bae, Jaehoon Lim, Joohyun Jung
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Patent number: 8431817Abstract: Nanostructure array optoelectronic devices are disclosed. The optoelectronic device may be a multi junction solar cell. The optoelectronic device may have a bi-layer electrical interconnect that is physically and electrically connected to sidewalls of the array of nanostructures. The optoelectronic device may be operated as a multi junction solar cell, wherein each junction is associated with one portion of the device. The bi-layer electrical interconnect allows current to pass from one portion to the next. Thus, the bi-layer electrical interconnect may serve as a replacement for a tunnel junction, which is used in some conventional multi junction solar cells.Type: GrantFiled: June 8, 2010Date of Patent: April 30, 2013Assignee: Sundiode Inc.Inventors: James C. Kim, Sungsoo Yi, Danny E. Mars
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Patent number: 8399751Abstract: The invention relates to imparting photoreactivity to target cells, e.g., retinal cells, by introducing photoresponsive functional abiotic nanosystems (FANs), nanometer-scale semiconductor/metal or semiconductor/semiconductor hetero-junctions that in this case include a photovoltaic effect. The invention further provides methods of making and using FANs, where the hetero-junctions bear surface functionalization that localizes them in cell membranes. Illumination of these hetero-junctions incorporated in cell membranes generates photovoltages that depolarize the membranes, such as those of nerve cells, in which FANs photogenerate action potentials. Incorporating FANs into the cells of a retina with damaged photoreceptor cells reintroduces photoresponsiveness to the retina, so that light creates action potentials that the brain interprets as sight.Type: GrantFiled: June 12, 2008Date of Patent: March 19, 2013Assignee: University of Southern CaliforniaInventors: Siyuan Lu, Anupam Madhukar, Mark S. Humayun
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Patent number: 8232165Abstract: A semiconductor structure includes an n-channel field effect transistor (NFET) nanowire, the NFET nanowire comprising a film wrapping around a core of the NFET nanowire, the film wrapping configured to provide tensile stress in the NFET nanowire. A method of making a semiconductor structure includes growing a film wrapping around a core of an n-channel field effect transistor (NFET) nanowire of the semiconductor structure, the film wrapping being configured to provide tensile stress in the NFET nanowire.Type: GrantFiled: July 15, 2011Date of Patent: July 31, 2012Assignee: International Business Machines CorporationInventors: Dureseti Chidambarrao, Lidija Sekaric
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Patent number: 8110510Abstract: Methods synthesizing nanowires in solution at low temperatures (e.g., about 400° C. or lower) are provided. In the present methods, the nanowires are synthesized by exposing nanowire precursors to metal nanocrystals in a nanowire growth solution comprising a solvent. The metal nanocrystals serve as seed particles that catalyze the growth of the semiconductor nanowires. The metal nanocrystals may be formed in situ in the growth solution from metal nanocrystal precursors. Alternatively, the nanowires may be pre-formed and added to the growth solution.Type: GrantFiled: October 17, 2006Date of Patent: February 7, 2012Assignee: Merck Patent GmbHInventors: Dayne D. Fanfair, Brian A. Korgel
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Publication number: 20110198569Abstract: A method for patterning nanostructures in a semiconductor heterostructure, which has at least a first layer and a second layer, wherein the first layer has a first surface and an opposite, second surface, the second layer has a first surface and an opposite, second surface, and the first layer is deposited over the second layer such that the second surface of the first layer is proximate to the first surface of the second layer. The method includes the steps of making indentations in a pattern on the first surface of the first layer of the semiconductor heterostructure; bonding the semiconductor heterostructure to a support substrate such that the first surface of the first layer of the semiconductor heterostructure is faced to the support substrate; etching off the second layer of the semiconductor heterostructure; and depositing a third layer over the second surface of the first layer of the semiconductor heterostructure.Type: ApplicationFiled: March 6, 2009Publication date: August 18, 2011Applicant: BOARD OF TRUSTEES OF THE UNIVERSITY OF ARKANSASInventors: Ajay P. Malshe, Curtis R. Taylor, Gregory Salamo, Eric Stach, Robin Prince, Zhiming Wang
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Patent number: 7972694Abstract: A semiconductor nanoparticle and semiconductor nanorod that have optical characteristics (luminescence intensity and emission lifetime) superior to those of conventional core/shell nanosized semiconductors. There are provided a triple-layer semiconductor nanoparticle, and triple-layer semiconductor nanorod, having an average particle diameter of 2 to 50 nm and comprising a core layer, an interlayer and a shell layer, wherein the layers are composed of different crystals, and wherein the crystal constructing the shell layer exhibits a band gap greater than that of the crystal constructing the core layer, and wherein the crystal constructing the interlayer has a lattice constant assuming a value between those of the crystal constructing the core layer and the crystal constructing the shell layer.Type: GrantFiled: November 27, 2006Date of Patent: July 5, 2011Assignee: Konica Minolta Medical & Graphic, Inc.Inventors: Mitsuru Sekiguchi, Kazuya Tsukada, Hisatake Okada
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Patent number: 7911035Abstract: Nanowhiskers are grown in a non-preferential growth direction by regulation of nucleation conditions to inhibit growth in a preferential direction. In a preferred implementation, <001> III-V semiconductor nanowhiskers are grown on an (001) III-V semiconductor substrate surface by effectively inhibiting growth in the preferential <111>B direction. As one example, <001> InP nano-wires were grown by metal-organic vapor phase epitaxy directly on (001) InP substrates. Characterization by scanning electron microscopy and transmission electron microscopy revealed wires with nearly square cross sections and a perfect zincblende crystalline structure that is free of stacking faults.Type: GrantFiled: January 4, 2008Date of Patent: March 22, 2011Assignee: QuNano ABInventors: Werner Seifert, Lars Ivar Samuelson, Björn Jonas Ohlsson, Lars Magnus Borgström
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Patent number: 7875884Abstract: A hetero-crystalline device structure and a method of making the same include a first layer and a nanostructure integral to a crystallite in the first layer. The first layer is a non-single crystalline material. The nanostructure is a single crystalline material. The nanostructure is grown on the first layer integral to the crystallite using epitaxial growth.Type: GrantFiled: September 8, 2009Date of Patent: January 25, 2011Assignee: Hewlett-Packard Development Company, L.P.Inventors: Nobuhiko Kobayashi, Shih Yuan Wang
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Patent number: 7829189Abstract: Provided is a chemical wet preparation method for Group 12-16 compound semiconductor nanocrystals. The method includes mixing one or more Group 12 metals or Group 12 precursors with a dispersing agent and a solvent followed by heating to obtain a Group 12 metal precursor solution; dissolving one or more Group 16 elements or Group 16 precursors in a coordinating solvent to obtain a Group 16 element precursor solution; and mixing the Group 12 metal precursors solution and the Group 16 element precursors solution to form a mixture, and then reacting the mixture to grow the semiconductor nanocrystals. The Group 12-16 compound semiconductor nanocrystals are stable and have high quantum efficiency and uniform sizes and shapes.Type: GrantFiled: June 26, 2007Date of Patent: November 9, 2010Assignee: Samsung Electronics Co., Ltd.Inventors: Eun-joo Jang, Tae-Kyung Ahn
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Publication number: 20100185260Abstract: An improved method for stimulating electrical activity in an eye is provided. The invention provides a technique for implanting small, nanometer-sized photoactive devices into an eye to improve electrical activity within an eye or mitigate degradation of electrical response in damaged eyes.Type: ApplicationFiled: February 28, 2008Publication date: July 22, 2010Applicant: The Regents of the University of Colorado, a body corporateInventor: Jeffrey Olson
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Patent number: 7713352Abstract: A process is provided to produce bulk quantities of nanowires in a variety of semiconductor materials. Thin films and droplets of low-melting metals such as gallium, indium, bismuth, and aluminum are used to dissolve and to produce nanowires. The dissolution of solutes can be achieved by using a solid source of solute and low-melting metal, or using a vapor phase source of solute and low-melting metal. The resulting nanowires range in size from 1 nanometer up to 1 micron in diameter and lengths ranging from 1 nanometer to several hundred nanometers or microns. This process does not require the use of metals such as gold and iron in the form of clusters whose size determines the resulting nanowire size. In addition, the process allows for a lower growth temperature, better control over size and size distribution, and better control over the composition and purity of the nanowire produced therefrom.Type: GrantFiled: September 14, 2006Date of Patent: May 11, 2010Assignee: University of Louisville Research Foundation, Inc.Inventors: Mahendra Kumar Sunkara, Shashank Sharma, Hari Chandrasekaran, Hongwei Li, Sreeram Vaddiraju
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Patent number: 7608530Abstract: A hetero-crystalline device structure and a method of making the same include a first layer and a nanostructure integral to a crystallite in the first layer. The first layer is a non-single crystalline material. The nanostructure is a single crystalline material. The nanostructure is grown on the first layer integral to the crystallite using epitaxial growth.Type: GrantFiled: March 1, 2007Date of Patent: October 27, 2009Assignee: Hewlett-Packard Development Company, L.P.Inventors: Nobuhiko Kobayashi, Shih Yuan Wang
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Patent number: 7563507Abstract: Nanoparticulate composites and dispersion thereof using novel polymeric ligand compounds, in certain embodiments in conjunction with pyridinyl moieties coupling the nanoparticulate and ligand.Type: GrantFiled: August 18, 2003Date of Patent: July 21, 2009Assignee: University of MassachusettsInventors: Todd S. Emrick, Habib Skaff
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Patent number: 7553369Abstract: The invention relates to a process for modifying the properties of a thin layer (1) formed on the surface of a support (2) forming a substrate (3) utilised in the field of microelectronics, nanoelectronics or microtechnology, nanotechnology, characterised in that it consists of: forming at least one thin layer (1) on a nanostructured support with specific upper surface (2), and treating the nanostructured support with specific upper surface (2) to generate internal strains in the support causing its deformation at least in the plane of the thin layer so as to ensure corresponding deformation of the thin layer to modify its properties.Type: GrantFiled: May 7, 2003Date of Patent: June 30, 2009Assignee: Universite Claude Bernard Lyon 1Inventors: Olivier Marty, Volodymyr Lysenko
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Patent number: 7393410Abstract: There is provided a method of manufacturing a nano-wire using a crystal structure. In the method of manufacturing a nano-wire, a crystal grain having a plurality of crystal faces is used as a seed, and a crystal growing material having a lattice constant difference within a predetermined range is deposited on the crystal grain, thereby allowing the nano-wire to grow from at least one of the crystal faces. Therefore, it is possible to give the positional selectivity with a simple process using a principle of crystal growth and to generate a nano-structure such as a nano-wire, etc. having good crystallinity. Further, it is possible to generate a different-kind junction structure having various shapes by adjusting a feature of a crystal used as a seed.Type: GrantFiled: April 26, 2005Date of Patent: July 1, 2008Assignee: Samsung SDI Co., Ltd.Inventors: Sang-Hyun Lee, Tae-Won Jeong, Jeong-Na Huh
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Patent number: 7354850Abstract: Nanowhiskers are grown in a non-preferential growth direction by regulation of nucleation conditions to inhibit growth in a preferential direction. In a preferred implementation, <001> III-V semiconductor nanowhiskers are grown on an (001) III-V semiconductor substrate surface by effectively inhibiting growth in the preferential <111>B direction. As one example, <001> InP nano-wires were grown by metal-organic vapor phase epitaxy directly on (001) InP substrates. Characterization by scanning electron microscopy and transmission electron microscopy revealed wires with nearly square cross sections and a perfect zincblende crystalline structure that is free of stacking faults.Type: GrantFiled: February 3, 2005Date of Patent: April 8, 2008Assignee: QuNano ABInventors: Werner Seifert, Lars Ivar Samuelson, Björn Jonas Ohlsson, Lars Magnus Borgström
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Patent number: 7267810Abstract: A method of making nanocrystals involves adding a chalocogen source to a hot solution of a metal-containing non-organometallic compound, such as CdO, in a first ligand solvent, such as TOP, and preferably subsequently cooling the resulting mixture to a lower temperature to grow the nanocrystals at said lower temperature. The method can involve either one ligand or two-ligand systems.Type: GrantFiled: December 30, 2004Date of Patent: September 11, 2007Assignee: National Research Council of CanadaInventors: Kui Yu, John Ripmeester
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Patent number: 7254151Abstract: This invention generally relates to nanotechnology and nanoelectronics as well as associated methods and devices. In particular, the invention relates to nanoscale optical components such as electroluminescence devices (e.g., LEDs), amplified stimulated emission devices (e.g., lasers), waveguides, and optical cavities (e.g., resonators). Articles and devices of a size greater than the nanoscale are also included. Such devices can be formed from nanoscale wires such as nanowires or nanotubes. In some cases, the nanoscale wire is a single crystal. In one embodiment, the nanoscale laser is constructed as a Fabry-Perot cavity, and is driven by electrical injection. Any electrical injection source may be used. For example, electrical injection may be accomplished through a crossed wire configuration, an electrode or distributed electrode configuration, or a core/shell configuration. The output wavelength can be controlled, for example, by varying the types of materials used to fabricate the device.Type: GrantFiled: December 11, 2003Date of Patent: August 7, 2007Assignee: President & Fellows of Harvard CollegeInventors: Charles M. Lieber, Xiangfeng Duan, Yu Huang, Ritesh Agarwal
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Patent number: 7132677Abstract: An GaN light emitting diode (LED) having a nanorod (or, nanowire) structure is disclosed. The GaN LED employs GaN nanorods in which a n-type GaN nanorod, an InGaN quantum well and a p-type GaN nanorod are subsequently formed in a longitudinal direction by inserting the InGaN quantum well into a p-n junction interface of the p-n junction GaN nanorod. In addition, a plurality of such GaN nanorods are arranged in an array so as to provide an LED having much greater brightness and higher light emission efficiency than a conventional laminated-film GaN LED.Type: GrantFiled: February 13, 2004Date of Patent: November 7, 2006Assignee: Dongguk UniversityInventors: Hwa-Mok Kim, Tae-Won Kang, Kwan-Soo Chung