Search Patents
  • Patent number: 8773200
    Abstract: Embodiments for at least one method and apparatus of a voltage supply are disclosed. One voltage supply apparatus includes a voltage supply, a plurality of power amplifier (PA) decoupling circuits, and a plurality of power amplifiers. Each PA decoupling circuit is connected to the voltage supply and provides a filtered voltage supply to a corresponding one of the plurality power amplifiers. Each PA decoupling circuit configured to suppress noise of the provided filtered voltage supply below a threshold at one or more selected frequencies, wherein the suppression is provided by the PA decoupling circuit operating in conjunction with at least one other of the plurality of PA decoupling circuits.
    Type: Grant
    Filed: November 11, 2012
    Date of Patent: July 8, 2014
    Assignee: R2 Semiconductor, Inc.
    Inventors: Cory Severson, Ravi Ramachandran, David Fisher
  • Publication number: 20110309679
    Abstract: Embodiments for at least one method and apparatus of a multi-use voltage regulator providing a supply voltage to a power amplifier and at least one other device are disclosed. One method includes generating a plurality of regulated voltage supplies from an unregulated voltage. An output signal power level of the power amplifier is determined. A one of the regulated plurality of voltage supplies and the unregulated voltage supply is selected as a power amplifier voltage supply for the power amplifier based at least in part on the output signal power level of the power amplifier. If the selected power amplifier voltage supply is one of the plurality of regulated voltage supplies, then the selected one of the plurality of regulated voltage supplies is simultaneously provided to the power amplifier and the at least one other device.
    Type: Application
    Filed: June 18, 2010
    Publication date: December 22, 2011
    Applicant: R2 SEMICONDUCTOR, INC.
    Inventors: David Fisher, Ravi Ramachandran
  • Patent number: 5600176
    Abstract: Integrated voltage divider comprising partial resistors (R1 ,R2) formed of paths of polycrystalline semiconductor material applied over a dielectric layer (4) on a semiconductor substrate (5). Under the paths, each forming a partial resistor (R1,R2) in the semiconductor substrate (5), a well (6 and 7 respectively) is formed having a conductivity type opposite to the conductivity type of the semiconductor substrate (5). The total surfaces of the paths forming the partial resistors (R1,R2) are dimensioned so that their ratio equals the inverse ratio of the resistor values of the two partial resistors (R1 ,R2).
    Type: Grant
    Filed: June 2, 1995
    Date of Patent: February 4, 1997
    Assignee: Texas Instruments Deustchland GmbH
    Inventor: Walter Bucksch
  • Publication number: 20110148200
    Abstract: Embodiments for at least one method and apparatus of generating a regulated voltage are disclosed. One apparatus includes a voltage regulator. The voltage regulator includes regulator circuitry for generating a regulated voltage from a first power supply and a second power supply, and voltage spike protection circuitry for voltage-spike-protecting the regulator circuitry, wherein the voltage spike protection circuitry includes a dissipative element and a charge-storage circuit. One method includes a method of generating a regulated voltage. The method includes regulator circuitry generating a regulated voltage from an input voltage, and voltage-spike-protecting the regulator circuitry with voltage spike protection circuitry, wherein the voltage spike protection circuitry includes a dissipative element and a charge-storage circuit.
    Type: Application
    Filed: December 23, 2009
    Publication date: June 23, 2011
    Applicant: R2 SEMICONDUCTOR, INC.
    Inventors: Lawrence M. Burns, David Fisher
  • Patent number: 8248044
    Abstract: Embodiments for at least one method and apparatus of controlling a bypass resistance of a voltage regulator are disclosed. One method includes generating a regulated output voltage based upon a switching voltage. The switching voltage is generated through controlled closing and opening of a series switch element and a shunt switch element, the series switch element and the shunt switch element being connected between voltages based on an input voltage. A control of a duty cycle of the switching voltage is provided by sensing and feeding back the regulated output voltage. The bypass resistance is controlled based on a parameter related to the duty cycle, wherein the control of the duty cycle is persistent during the control of the bypass resistance.
    Type: Grant
    Filed: March 24, 2010
    Date of Patent: August 21, 2012
    Assignee: R2 Semiconductor, Inc.
    Inventors: James E. C. Brown, Bret Rothenberg, Lawrence M. Burns
  • Patent number: 8843180
    Abstract: Embodiments for at methods, apparatus and systems for operating a voltage regulator are disclosed. One apparatus includes a switching voltage regulator, wherein the switching voltage regulator includes a series switch element, a shunt switch element, a switching controller and a switched output filter. The switching controller is configured to generate a switching voltage through controlled closing and opening of the series switch element and the shunt switch element. The switched output filter filters the switching voltage and generates a regulated output voltage, wherein the switched output filter includes a plurality of capacitors that are selectively included within the switched output filter.
    Type: Grant
    Filed: June 5, 2013
    Date of Patent: September 23, 2014
    Assignee: R2 Semiconductor, Inc.
    Inventors: James E. C. Brown, Daniel Dobkin, Pablo Moreno Galbis, Cory Severson, Lawrence M. Burns
  • Patent number: 8362649
    Abstract: Embodiments for at least one method and apparatus of a multi-use voltage regulator providing a supply voltage to a power amplifier and at least one other device are disclosed. One method includes generating a plurality of regulated voltage supplies from an unregulated voltage. An output signal power level of the power amplifier is determined. A one of the regulated plurality of voltage supplies and the unregulated voltage supply is selected as a power amplifier voltage supply for the power amplifier based at least in part on the output signal power level of the power amplifier. If the selected power amplifier voltage supply is one of the plurality of regulated voltage supplies, then the selected one of the plurality of regulated voltage supplies is simultaneously provided to the power amplifier and the at least one other device.
    Type: Grant
    Filed: June 18, 2010
    Date of Patent: January 29, 2013
    Assignee: R2 Semiconductor, Inc.
    Inventors: David Fisher, Ravi Ramachandran
  • Publication number: 20120257311
    Abstract: Embodiments for at least one method and apparatus of generating a regulated voltage are disclosed. One apparatus includes a voltage regulator. The voltage regulator includes regulator circuitry for generating a regulated voltage from a first power supply and a second power supply, and voltage spike protection circuitry for voltage-spike-protecting the regulator circuitry. The voltage spike protection circuitry includes a charge-storage circuit, and at least one switching element, wherein the at least one switching element comprises a plurality of switching block segments. The charge-storage circuit includes charge-storage circuit segments, and each charge-storage circuit segment is physically closer to at least one of the plurality of switching block segments the charge-storage circuit segment protects, than any other switching block segment.
    Type: Application
    Filed: June 18, 2012
    Publication date: October 11, 2012
    Applicant: R2 SEMICONDUCTOR, INC.
    Inventors: Lawrence M. Burns, David Fisher
  • Patent number: 8233250
    Abstract: Embodiments for at least one method and apparatus of generating a regulated voltage are disclosed. One apparatus includes a voltage regulator. The voltage regulator includes regulator circuitry for generating a regulated voltage from a first power supply and a second power supply, and voltage spike protection circuitry for voltage-spike-protecting the regulator circuitry, wherein the voltage spike protection circuitry includes a dissipative element and a charge-storage circuit. One method includes a method of generating a regulated voltage. The method includes regulator circuitry generating a regulated voltage from an input voltage, and voltage-spike-protecting the regulator circuitry with voltage spike protection circuitry, wherein the voltage spike protection circuitry includes a dissipative element and a charge-storage circuit.
    Type: Grant
    Filed: December 23, 2009
    Date of Patent: July 31, 2012
    Assignee: R2 Semiconductor, Inc.
    Inventors: Lawrence M. Burns, David Fisher
  • Publication number: 20120105039
    Abstract: Embodiments for at least one method and apparatus for controlling timing of switch control signals of a switching voltage regulator disclosed. One method includes generating a regulated output voltage based upon a switching voltage, generating the switching voltage through controlled closing and opening of a series switch element and a shunt switch element, and controlling, by a delay block, the closing and opening of the series switch element and a shunt switch element. The delay block control includes receiving, by the delay block, a timing signal, generating a one of a series switch control signal and a shunt switch control signal by controllably delaying the timing signal with a first delay, and generating one other of the series switch control signal and the shunt switch control signal by inverting, and controllably delaying the timing signal with a second delay.
    Type: Application
    Filed: September 3, 2011
    Publication date: May 3, 2012
    Applicant: R2 SEMICONDUCTOR, INC.
    Inventor: James E.C. Brown
  • Publication number: 20140009130
    Abstract: Embodiments of systems, methods and apparatuses of a switching voltage regulator are disclosed. One switching voltage regulator includes a series switch element, a shunt switch element, a PWM controller, and a mode controller. The PWM controller includes an error amplifier and a switching controller. The error amplifier generates an error signal based on a difference between a reference voltage and an output voltage. Further, the switching controller is operative to generate switch element control voltages based on the error signal, for controlling opening and closing of the series switch element and the shunt switch element, wherein the opening and closing of the series switch element and the shunt switch element generates a switching voltage. The mode controller is operative adjust a gain of the error amplifier over a selected range of frequencies based on a parameter indicative of a likelihood of oscillations in the output voltage.
    Type: Application
    Filed: March 12, 2013
    Publication date: January 9, 2014
    Applicant: R2 Semiconductor, Inc.
    Inventors: Pablo Moreno Galbis, James E. C. Brown, Cory Severson
  • Patent number: 8634171
    Abstract: Embodiments for at least one method and apparatus of generating a regulated voltage are disclosed. One apparatus includes a voltage regulator. The voltage regulator includes regulator circuitry for generating a regulated voltage from a first power supply and a second power supply, and voltage spike protection circuitry for voltage-spike-protecting the regulator circuitry. The voltage spike protection circuitry includes a charge-storage circuit, and at least one switching element, wherein the at least one switching element comprises a plurality of switching block segments. The charge-storage circuit includes charge-storage circuit segments, and each charge-storage circuit segment is physically closer to at least one of the plurality of switching block segments the charge-storage circuit segment protects, than any other switching block segment.
    Type: Grant
    Filed: June 18, 2012
    Date of Patent: January 21, 2014
    Assignee: R2 Semiconductor, Inc.
    Inventors: Lawrence M. Burns, David Fisher
  • Patent number: 8145149
    Abstract: Embodiments for at least one method and apparatus of a wireless transceiver are disclosed. For one embodiment, the wireless transceiver includes a transmit chain, wherein the transmit chain includes a power amplifier. The wireless transceiver additionally includes a receiver chain that is tunable to receive wireless signals over at least one of multiple channels, wherein the multiple channels are predefined. Further, the wireless transceiver includes a voltage converter. The voltage converter provides a supply voltage to the power amplifier, and operates at a single switching frequency, wherein the single switching frequency and all harmonics of the single switching frequency fall outside of the multiple channels.
    Type: Grant
    Filed: June 17, 2010
    Date of Patent: March 27, 2012
    Assignee: R2 Semiconductor, Inc
    Inventors: Ravi Ramachandran, Frank Sasselli
  • Publication number: 20120229102
    Abstract: Another embodiment includes a voltage regulator. The voltage regulator includes a series switch element connected between a first voltage supply and a common node, the series switch element comprising an NMOS series switching transistor, a shunt switch element connected between the common node and a second voltage supply, the shunt switch element comprising an NMOS shunt switching transistor. The voltage regulator further includes means for closing the series switch element during a first period by applying a switching gate voltage to a gate of the NMOS series switch transistor of the series switch element, wherein the switching gate voltage has a voltage potential of at least a threshold voltage greater than a voltage potential of the common node, means for closing the shunt switch element during a second period, the shunt switch element comprising an NMOS shunt switching transistor.
    Type: Application
    Filed: May 21, 2012
    Publication date: September 13, 2012
    Applicant: R2 SEMICONDUCTOR, INC.
    Inventors: Lawrence M. Burns, David Fisher
  • Publication number: 20140253065
    Abstract: Embodiments of systems, methods and apparatuses of a voltage regulator are disclosed. One apparatus of the voltage regulator includes a series switch element, wherein the series switch element comprises a plurality of partitioned series switch elements, a shunt switch element, and a switching controller. The switching controller is operative to control the series switch element and the shunt switch element in an idle state, wherein none of the plurality of partitioned series switch elements are active, control the series switch element and the shunt switch element in a burst state, wherein N of the plurality of partitioned series switch elements are active, and control the series switch element and the shunt switch element in a transition state, wherein M of the plurality of partitioned series switch elements are active, and wherein M is less than N.
    Type: Application
    Filed: July 21, 2013
    Publication date: September 11, 2014
    Applicant: R2 SEMICONDUCTOR, INC.
    Inventors: James E. C. Brown, Pablo Moreno Galbis, John O'Boyle, III
  • Patent number: 8975887
    Abstract: Embodiments of systems, methods and apparatuses of a switching voltage regulator are disclosed. One switching voltage regulator includes a series switch element, a shunt switch element, a PWM controller, and a mode controller. The PWM controller includes an error amplifier and a switching controller. The error amplifier generates an error signal based on a difference between a reference voltage and an output voltage. Further, the switching controller is operative to generate switch element control voltages based on the error signal, for controlling opening and closing of the series switch element and the shunt switch element, wherein the opening and closing of the series switch element and the shunt switch element generates a switching voltage. The mode controller is operative adjust a gain of the error amplifier over a selected range of frequencies based on a parameter indicative of a likelihood of oscillations in the output voltage.
    Type: Grant
    Filed: March 12, 2013
    Date of Patent: March 10, 2015
    Assignee: R2 Semiconductor, Inc.
    Inventors: Pablo Moreno Galbis, James E. C. Brown, Cory Severson
  • Publication number: 20130249505
    Abstract: Embodiments for methods, apparatus and systems for operating a voltage regulator are disclosed. One embodiment of the voltage regulator generates a switching voltage through controlled closing and opening of a series switch element and a shunt switch element. The voltage regulator further includes a switched output filter that includes a plurality of capacitors for filtering the switching voltage and generating an output voltage. A mode controller is operative to disconnect at least one of the plurality of capacitors upon receiving a first indicator, where disconnecting causes the at least one of the plurality of capacitors to electrically float, wherein while the at least one capacitor is disconnected the output voltage is changed from a first value to a second value, return the output voltage to a first value or a third value upon receiving a second indicator, and reconnect the at least one of the plurality of capacitors.
    Type: Application
    Filed: May 1, 2013
    Publication date: September 26, 2013
    Applicant: R2 SEMICONDUCTOR, INC.
    Inventors: James E.C. Brown, Daniel Dobkin, Pablo Moreno Galbis, Cory Severson, David Fisher
  • Patent number: 8648583
    Abstract: Embodiments for at least one method and apparatus for controlling timing of switch control signals of a switching voltage regulator disclosed. One method includes generating a regulated output voltage based upon a switching voltage, generating the switching voltage through controlled closing and opening of a series switch element and a shunt switch element, and controlling, by a delay block, the closing and opening of the series switch element and a shunt switch element. The delay block control includes receiving, by the delay block, a timing signal, generating a one of a series switch control signal and a shunt switch control signal by controllably delaying the timing signal with a first delay, and generating one other of the series switch control signal and the shunt switch control signal by inverting, and controllably delaying the timing signal with a second delay.
    Type: Grant
    Filed: September 3, 2011
    Date of Patent: February 11, 2014
    Assignee: R2 Semiconductor, Inc.
    Inventors: James E. C. Brown, Bret Rothenberg
  • Publication number: 20120326680
    Abstract: Embodiments for at least one method and apparatus of generating a regulated voltage are disclosed. One method includes generating the regulated voltage through controlled closing and opening of a series switch element and shunt switch element. This method includes closing the series switch element during a first period, the series switch element comprising a plurality of series switch elements segments. The method includes applying a switching gate voltage to gates of series switching transistors of a subset of the plurality of series switch elements segments of the series switch element, wherein only the series switching transistors of the subset of the plurality of series switch elements segments of the series switch element turn on, while series protection transistor of more than the subset of the plurality of series switch elements segments of the series switch element turn on. The shunt switch element during is closed during a second period.
    Type: Application
    Filed: September 5, 2012
    Publication date: December 27, 2012
    Applicant: R2 SEMICONDUCTOR, INC.
    Inventors: Lawrence M. Burns, James E.C. Brown
  • Patent number: 8593128
    Abstract: Another embodiment includes a voltage regulator. The voltage regulator includes a series switch element connected between a first voltage supply and a common node, the series switch element comprising an NMOS series switching transistor, a shunt switch element connected between the common node and a second voltage supply, the shunt switch element comprising an NMOS shunt switching transistor. The voltage regulator further includes means for closing the series switch element during a first period by applying a switching gate voltage to a gate of the NMOS series switch transistor of the series switch element, wherein the switching gate voltage has a voltage potential of at least a threshold voltage greater than a voltage potential of the common node, means for closing the shunt switch element during a second period, the shunt switch element comprising an NMOS shunt switching transistor.
    Type: Grant
    Filed: May 21, 2012
    Date of Patent: November 26, 2013
    Assignee: R2 Semiconductor, Inc.
    Inventors: Lawrence M. Burns, David Fisher
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