Patents Represented by Attorney Christopher K. Gagne
  • Patent number: 8341392
    Abstract: The present disclosure includes systems and techniques relating to booting to a network storage target. In general, in one implementation, a bus-to-network device driver is loaded during a machine boot, where the bus-to-network device driver is capable of sending machine bus commands over a network, providing access to the network for a network device driver, and distinguishing between received responses to the machine bus commands and other network traffic corresponding to the network device driver. Loading of the bus-to-network device driver can occur in response to an operating system load of bus drivers. For example, the bus-to-network device driver can be an iSCSI driver, and the operating system load of bus drivers can be the operating system load of SCSI drivers.
    Type: Grant
    Filed: May 16, 2012
    Date of Patent: December 25, 2012
    Assignee: Intel Corporation
    Inventors: David M. Lerner, Dave Matheny, Douglas D. Boom
  • Patent number: 8316156
    Abstract: Systems which utilize a series of managers to handle resource management. Three types of managers are preferably used, with each manager being in one of two states, active or available. The types of managers are Global Interface Manager (GIM), Resource Manager (RM) and Access Manager (AM). Associated with each device driver for a given function is a GIM. The device driver may be associated with one or more RMs and/or AMs. Among managers of a given type, one is the active manager and all other managers of that specific type are available and work with the active manager to handle resource requests. As there can be RMs for different resources, the active manager concept is applied to the RMs associated with each resource. Mechanisms are present to allow the active manager and related information to be transferred to an available manager if necessary.
    Type: Grant
    Filed: February 17, 2006
    Date of Patent: November 20, 2012
    Assignee: Intel-Ne, Inc.
    Inventor: James Dean Rucker
  • Patent number: 8316179
    Abstract: In an embodiment, an apparatus is provided that may include circuitry to, in response at least in part to detected change in at least one of acceleration and orientation of storage, request suspension of at least one command currently stored in at least one pending command queue that is intended for execution, at least in part, by the storage. The at least one command having been previously issued by the circuitry but being currently unexecuted, at least in part, by the storage. The circuitry also being to store, in response at least in part to the detected change, at least one copy of the at least one command for later re-issuance by the circuitry, and to request replacement of at least one command in the at least one queue with at least one other command to park at least one head of the storage.
    Type: Grant
    Filed: January 26, 2012
    Date of Patent: November 20, 2012
    Assignee: Intel Corporation
    Inventor: Eng Hun Ooi
  • Patent number: 8312363
    Abstract: In one embodiment, circuitry is provided to generate a residue based at least in part upon operations and a data stream generated based at least in part upon a packet. The operations may include at least one iteration of at least one reduction operation including (a) multiplying a first value with at least one portion of the data stream, and (b) producing a reduction by adding at least one other portion of the data stream to a result of the multiplying. The operations may include at least one other reduction operation including (c) producing another result by multiplying with a second value at least one portion of another stream based at least in part upon the reduction, (d) producing a third value by adding at least one other portion of the another stream to the another result, and (e) producing the residue by performing a Barrett reduction based at least in part upon the third value.
    Type: Grant
    Filed: December 16, 2008
    Date of Patent: November 13, 2012
    Assignee: Intel Corporation
    Inventors: Vinodh Gopal, Erdinc Ozturk, Gilbert Wolrich, Wajdi Feghali
  • Patent number: 8300825
    Abstract: In an embodiment, an apparatus is provided that may include an integrated circuit to be removably communicatively coupled to at least one storage device. The integrated circuit of this embodiment may be capable of encrypting and/or and decrypting, based at least in part upon a first key, data to be, in at least in part, stored in and/or retrieved from, respectively, at least one region of the at least one storage device. The at least one region and a second key may be associated with at least one access privilege authorized, at least in part, by an administrator. The second key may be stored, at least in part, externally to the at least one storage device. The first key may be obtainable, at least in part, based, at least in part, upon at least one operation involving the second key. Of course, many alternatives, modifications, and variations are possible without departing from this embodiment.
    Type: Grant
    Filed: June 30, 2008
    Date of Patent: October 30, 2012
    Assignee: Intel Corporation
    Inventors: Nitin Sarangdhar, Ned Smith, Vincent Von Bokern
  • Patent number: 8279790
    Abstract: An embodiment may include circuitry to be comprised in a node. The node may be communicatively coupled to a network and may include a host processor to execute at least one communication protocol-related process. The circuitry may determine, at least in part, whether to buffer, at least in part, at least one packet received from the network based at least in part upon whether a weighted moving average exceeds a first threshold and is less than a second threshold. The average may be determined based at least in part upon one or more time intervals between one or more packet receptions from the network. Many alternatives, variations, and modifications are possible.
    Type: Grant
    Filed: March 11, 2010
    Date of Patent: October 2, 2012
    Assignee: Intel Corporation
    Inventors: Ren Wang, Tsung-Yuan C. Tai, Christian Maciocco, Shian Tsai, Jr.
  • Patent number: 8281122
    Abstract: An embodiment may include circuitry to generate, at least in part, and/or receive, at least in part, a packet. The packet may include at least one field and an encrypted payload. The at least one field may include, at least in part, a first key and/or at least one value. The first key and at least one value, as included in the at least one field, may be encrypted by a second key. The encrypted payload may be capable of being decrypted, at least in part, based, at least in part, upon the first key and/or the at least one value to yield an unencrypted payload. The unencrypted payload may include at least a portion of application layer data that is to be communicated in a secure session.
    Type: Grant
    Filed: March 2, 2009
    Date of Patent: October 2, 2012
    Assignee: Intel Corporation
    Inventors: David M. Durham, Men Long, Karanvir S. Grewal
  • Patent number: 8276028
    Abstract: In various embodiments, the reference voltage used for read operations in a non-volatile memory may be adjusted up or down in an attempt to read data from an area that previously produced at least one uncorrectable error. The direction and amount of this adjustment may be based on the number and direction of correctable errors in surrounding data.
    Type: Grant
    Filed: September 16, 2008
    Date of Patent: September 25, 2012
    Assignee: Intel Corporation
    Inventors: Chun Fung Man, Jonathan E. Schmidt
  • Patent number: 8271748
    Abstract: In an embodiment, an apparatus is provided that may include circuitry to generate, at least in part, and/or receive, at least in part, at least one request to access at least one portion of data. The at least one request may indicate, at least in part, at least one subset of the at least one portion of the data that is of relatively higher importance than one or more other subsets of the at least one portion of the data that are of relatively lower importance. The at least one request may be to request, at least in part, that the at least one subset be accessed prior to the one or more other subsets are accessed. The at least one request may be comprised, at least in part, in at least one packet in accordance with a protocol that permits variable packet size.
    Type: Grant
    Filed: August 12, 2008
    Date of Patent: September 18, 2012
    Assignee: Intel Corporation
    Inventors: Steen K. Larsen, Ramakrishna Huggahalli
  • Patent number: 8270595
    Abstract: An enhanced telephone emulation computer system including a minidialer program for controlling a computer to add telephony functions which can be invoked from whatever active program is currently controlling the computer. The minidialer program controls the computer to alter its processing depending upon the context existing at the time when a mouse click or hot key combination event is detected indicating the user wishes to invoke a telephony function. The minidialer program determines whether the user has highlighted any text or numbers in the active window of the application currently controlling the computer and whether the highlighted material is a name or a phone number, and if a name, whether the name is stored with a phone number in a phone book or file maintained on the computer. Processing and telephony menu options displayed as available also depend upon whether the user is or is not on the phone at the time the mouse click or hot key event occurs.
    Type: Grant
    Filed: May 14, 2010
    Date of Patent: September 18, 2012
    Assignee: Intel Corporation
    Inventors: Michael D. Stanford, Ronald Scott Langham
  • Patent number: 8271694
    Abstract: A flexible arrangement allows a single arrangement of Ethernet channel adapter (ECA) hardware functions to appear as needed to conform to various operating system deployment models. A PCI interface presents a logical model of virtual devices appropriate to the relevant operating system. Mapping parameters and values are associated with the packet streams to allow the packet streams to be properly processed according to the presented logical model and needed operations. Mapping occurs at both the host side and at the network side to allow the multiple operations of the ECA to be performed while still allowing proper delivery at each interface.
    Type: Grant
    Filed: August 26, 2011
    Date of Patent: September 18, 2012
    Assignee: Intel-Ne, Inc.
    Inventors: Robert O. Sharp, Kenneth G. Keels, Brian S. Hausauer, John S. Lacombe
  • Patent number: 8250165
    Abstract: A method and system are provided for transferring data in a networked system between a local memory in a local system and a remote memory in a remote system. A RDMA request is received and a first buffer region is associated with a first transfer operation. The system determines whether a size of the first buffer region exceeds a maximum transfer size of the networked system. Portions of the second buffer region may be associated with the first transfer operation based on the determination of the size of the first buffer region. The system subsequently performs the first transfer operation.
    Type: Grant
    Filed: December 12, 2011
    Date of Patent: August 21, 2012
    Assignee: Intel Corporation
    Inventors: Mark Sean Hefty, Jerrie L. Coffman
  • Patent number: 8250435
    Abstract: An embodiment may include circuitry that may detect and/or correct at least one error in a data codeword that may include a data word, cyclical redundancy check (CRC) word, and parity word. The circuitry may select whether a portion of the CRC word indicates whether only a single processor has accessed the data word. The data word, CRC word, and the parity word may be accessible in respective distinct memory device sets that each may include one or more respective memory devices. If the circuitry detects, based at least in part upon the data codeword and CRC word, a CRC error, and the at least one error includes fewer than a first predetermined number of errors, the circuitry may determine in which of the one or more respective memory devices in the memory device sets the at least one error resides and may correct the at least one error.
    Type: Grant
    Filed: September 15, 2009
    Date of Patent: August 21, 2012
    Assignee: Intel Corporation
    Inventors: Robert G. Blankenship, Dennis W. Brzezinski, Edwin F. Mendez Valverde
  • Patent number: 8223649
    Abstract: A method of sending a packet from a source node to a destination node in the same broadcast domain. The packet is associated with a traffic flow directed from the source node to the destination node. The source node is connected with the destination node via a first and a second communication path. A criterion based on an attribute of the traffic flow is measured for each of the communication paths. One path is selected between the first and second communication paths based on the measured criterion and the selected communication path is assigned to the associated traffic flow. The packet is then sent via the selected communication path.
    Type: Grant
    Filed: March 25, 2008
    Date of Patent: July 17, 2012
    Assignee: Intel Corporation
    Inventors: Anand Rangarajan, W. Steven Conner
  • Patent number: 8225330
    Abstract: In an embodiment, a method is provided. In an embodiment, the method provides determining that a message has been placed in a send buffer; and transferring the message to an application on a second virtual machine by bypassing use of an operating system to process the message by directly placing the message in an application memory space from which the application can retrieve the message.
    Type: Grant
    Filed: June 13, 2011
    Date of Patent: July 17, 2012
    Assignee: Intel Corporation
    Inventors: William R. Magro, Robert J. Woodruff, Jianxin Xiong
  • Patent number: 8219739
    Abstract: A method and apparatus is described herein for providing an optimized file system architecture. A file system is demarcated by configuration headers at the top and bottom of a volume. File headers are stored in the volume for each file, and the file headers included references to a table sector or sectors associated with the file. The table sector(s) are to store entries associated with sectors storing the file. Each entry, which corresponds to a sector of the sectors storing the file, is to store a reference to the corresponding sector and compression information associated with the sector. Based on the compression information, files may be compressed at a sector granularity and decompressed before providing the data in response to read requests.
    Type: Grant
    Filed: June 30, 2006
    Date of Patent: July 10, 2012
    Assignee: Intel Corporation
    Inventor: Kiran K. Bangalore
  • Patent number: 8214914
    Abstract: In an embodiment, a method is provided. The method of this embodiment provides receiving a packet having a wake-up pattern, and waking up if the wake-up pattern corresponds to one of a number of dynamically modifiable passwords on a pattern wake list, each of the dynamically modifiable passwords being based, at least in part, on a seed value.
    Type: Grant
    Filed: July 7, 2010
    Date of Patent: July 3, 2012
    Assignee: Intel Corporation
    Inventor: Avigdor Eldar
  • Patent number: 8214902
    Abstract: An embodiment may include circuitry that may be comprised in a host. The host may include memory and a host processor to execute an operating system. The circuitry may be to determine, independently of the operating system and the host processor, the authenticity of signature list information, based at least in part upon authentication information received by the circuitry from a remote server. The circuitry also may be to determine, independently of the operating system and the host processor, based at least in part upon comparison of at least one portion of the signature list information with at least one portion of contents of the memory, whether authorized and/or malicious data are present in the at least one portion of the contents of the memory. Of course, many variations, modifications, and alternatives are possible without departing from this embodiment.
    Type: Grant
    Filed: June 19, 2009
    Date of Patent: July 3, 2012
    Assignee: Intel Corporation
    Inventors: Hormuzd M. Khosravi, Vincent E. Von Bokern, Men Long
  • Patent number: 8209559
    Abstract: Techniques are described to provide the capability to halt execution of a thread by a processor and potentially lower power consumption of the processor while responding to events in a timely manner. An operating system provided system call allows for identification of events that cause the execution of the thread to resume. A processor core uses a signal mask and translation unit that monitors for the identified events. In the event an event is detected, the thread unhalts and determines a manner to process the event.
    Type: Grant
    Filed: December 24, 2008
    Date of Patent: June 26, 2012
    Assignee: Intel Corporation
    Inventors: Mazhar Memon, Steven King
  • Patent number: 8190870
    Abstract: The present disclosure includes systems and techniques relating to booting to a network storage target. In general, in one implementation, a bus-to-network device driver is loaded during a machine boot, where the bus-to-network device driver is capable of sending machine bus commands over a network, providing access to the network for a network device driver, and distinguishing between received responses to the machine bus commands and other network traffic corresponding to the network device driver. Loading of the bus-to-network device driver can occur in response to an operating system load of bus drivers. For example, the bus-to-network device driver can be an iSCSI driver, and the operating system load of bus drivers can be the operating system load of SCSI drivers.
    Type: Grant
    Filed: April 3, 2009
    Date of Patent: May 29, 2012
    Assignee: Intel Corporation
    Inventors: David M. Lerner, Dave Matheny, Douglas D. Boom