Patents Represented by Attorney Christopher K. Gagne
  • Patent number: 7421537
    Abstract: Provided are a method, system, and program for migrating data between storage volumes. A source map is provided indicating blocks of data striped across a first plurality of storage units and a destination map is provided indicating blocks of data striped across a second plurality of storage units, wherein data is migrated from stripes indicated in the source map to corresponding stripes indicated in the destination map. In response to determining that the source stripe and the destination stripe occupy a same physical location on the storage units, the data from a source stripe is written to a copy area and writing the data from the copy area to a corresponding destination stripe.
    Type: Grant
    Filed: March 22, 2004
    Date of Patent: September 2, 2008
    Assignee: Intel Corporation
    Inventor: Francis R. Corrado
  • Patent number: 7418615
    Abstract: According to one embodiment, a system is disclosed. The system includes a central timeout manager (CTM) to receive timeout events from two or more clients and a search unit to search for a location in a list of timeout events to place a new received timeout event.
    Type: Grant
    Filed: September 27, 2005
    Date of Patent: August 26, 2008
    Assignee: Intel Corporation
    Inventors: Nai-Chih Chang, Pak-Iung Seto, Victor Lau
  • Patent number: 7418548
    Abstract: In one embodiment, a method is provided that may include, issuing a read request to request reading of at least one portion of data stored in a first storage device and issuing a write request to request writing of the at least one portion of the data into a second storage device or at least one location in the first storage device. The at least one location may be comprised in a volume of a redundant array of inexpensive disks (RAID), the at least one portion of data being stored in a non-RAID volume in the first storage device. The method of this embodiment also may include, if a request to access one or more other portions of the data is received and/or issued by one or more operating system processes while the reading and/or the writing is occurring, issuing an access request to request accessing of the one or more other portions of the data. Of course, many modifications are possible without departing from this embodiment.
    Type: Grant
    Filed: November 18, 2003
    Date of Patent: August 26, 2008
    Assignee: Intel Corporation
    Inventors: Francis R. Corrado, Daniel Nemiroff
  • Patent number: 7418646
    Abstract: In one embodiment, a method is provided that may include generating, at least in part by first circuitry comprised in an integrated circuit, check data based at least in part upon other data, and/or determining at least in part by the first circuitry, one or more locations of the check data and/or the other data in storage. The first circuitry may be capable of regenerating the other data based at least in part upon the check data. The method also may include issuing a request from second circuitry also comprised in the integrated circuit requesting that a wireless communication device transmit the other data, and/or receiving, by the second circuitry, a request issued from the wireless device, to retrieve the other data. Of course, many alternatives, variations, and modifications are possible without departing from this embodiment.
    Type: Grant
    Filed: March 2, 2004
    Date of Patent: August 26, 2008
    Assignee: Intel Corporation
    Inventor: Chet R. Douglas
  • Patent number: 7415549
    Abstract: According to one embodiment, a storage device is disclosed. The storage device includes a port having one or more lanes and a direct memory access (DMA) Descriptor Manager (DM). The DM generates and tracks completion of descriptors. The DM includes a first completion lookup table to track one or more fields of an input/output (I/O) context received at a first lane.
    Type: Grant
    Filed: September 27, 2005
    Date of Patent: August 19, 2008
    Assignee: Intel Corporation
    Inventors: Kiran Vemula, Victor Lau, Pak-lung Seto, Nai-Chih Chang, William Halleck, Suresh Chemudupati, Ankit Parikh, Gary Y. Tsao
  • Patent number: 7058780
    Abstract: In one embodiment, a method is provided. The method of this embodiment may include detecting an operation initiated by a first device that can result in a change of a first set of resources previously allocated to a second device. If the operation has completed at least a certain phase of the operation and the first set of resources has changed as a result of the operation, the method of this embodiment may also comprise changing, by the second device, a second set of resources previously allocated by the second device to a third device. Of course, many modifications, variations, and alternatives are possible without departing from this embodiment.
    Type: Grant
    Filed: May 29, 2002
    Date of Patent: June 6, 2006
    Assignee: Intel Corporation
    Inventors: Mark L Brown, Paul E Luse, Wolfgang E Michel, Ralph Gundacker
  • Patent number: 6993599
    Abstract: In an example embodiment, a method of delivering a command from an initiator device also transfers data identified by the command to a target device. The data is transferred between the initiator device and the target device according to a selected maximum payload size. The method includes determining whether or not the size of the data associated with the command is greater than the selected maximum payload size. If the size of the data associated with the command is not greater than the selected maximum payload size, then a block is transferred to or from the target device which includes the command and all of the data associated with the command.
    Type: Grant
    Filed: January 15, 2003
    Date of Patent: January 31, 2006
    Assignee: Intel Corporation
    Inventor: Cecil R. Simpson, III
  • Patent number: 6950894
    Abstract: In one embodiment, a method is provided in which an integrated circuit that includes an integrated input/output (I/O) controller is coupled to a storage system. The integrated circuit is coupled to a host processor system bus via a dedicated communication path. The storage system is capable of being coupled to and de-coupled from at least one removable storage device, and of receiving from the integrated circuit, when the storage system is coupled to the integrated circuit, data and/or an I/O request. The method of the embodiment also includes coupling or de-coupling the at least one removable storage device to or from, respectively, the storage system. The storage system remains capable of receiving from the integrated circuit the data and/or I/O request while the at least one removable storage device is being coupled to or de-coupled from the storage system.
    Type: Grant
    Filed: August 28, 2002
    Date of Patent: September 27, 2005
    Assignee: Intel Corporation
    Inventors: Loo Shing Tan, King Heng Lock, Soon Chieh Lim
  • Patent number: 6944733
    Abstract: In one embodiment, a method is provided. The method of this embodiment may include issuing from first circuitry to second circuitry, and/or receiving by the second circuitry of, a request to initiate performance of at least one input/output (I/O) operation of at least one type involving, at least in part, the second circuitry. The second circuitry may be remote from the first circuitry and may be disabled from initiating performance of any I/O operation of the at least one type involving the first circuitry. The second circuitry may be capable of, in response, at least in part, to receipt of the request, performing, at least in part, the at least one I/O operation involving, at least in part, the second circuitry. Of course, many modifications, variations, and alternatives are possible without departing from this embodiment.
    Type: Grant
    Filed: December 11, 2002
    Date of Patent: September 13, 2005
    Assignee: Intel Corporation
    Inventor: Ahmad H. Zamer
  • Patent number: 6922746
    Abstract: In one embodiment of the present invention, a process that uses a first processor is provided. The process includes the operation of blocking by the first processor of completion by a second processor of a configuration cycle. The process also includes the operation of selecting by the first processor of one procedure from a plurality of procedures that are associated with respective types of circuitry that may be used to permit the first processor to control a device. The one procedure is associated with one of the respective types of circuitry that is actually available to be used by the first processor.
    Type: Grant
    Filed: March 4, 2002
    Date of Patent: July 26, 2005
    Assignee: Intel Corporation
    Inventors: Paul E Luse, Wolfgang Michel
  • Patent number: 6918020
    Abstract: In one embodiment, a method is provided. The method of this embodiment may include determining whether requested data is stored in a memory. If the requested data is not stored in the memory, the method may include determining whether a plurality of requests to access the requested data have occurred during a predetermined number of most recent data accesses. If the plurality of requests to access the requested data have occurred during the predetermined number of most recent data accesses, the method may also include storing the requested data in the memory. Of course, many variations, modifications, and alternatives are possible without departing from this embodiment.
    Type: Grant
    Filed: August 30, 2002
    Date of Patent: July 12, 2005
    Assignee: Intel Corporation
    Inventors: Joseph S. Cavallo, Stephen J. Ippolito
  • Patent number: 6795566
    Abstract: In accordance with one embodiment of the invention, a method is provided for integrating at least a portion of a watermark into at least a portion of a compressed image. The method of this embodiment includes encoding at least a portion of the watermark and compressing at least a portion of the image. The encoded watermark, or portion thereof, and the compressed image, or portion thereof, are combined. Of course, many other embodiments in accordance with the invention are included within the scope of the present invention.
    Type: Grant
    Filed: June 9, 2003
    Date of Patent: September 21, 2004
    Assignee: Intel Corporation
    Inventors: Tinku Acharya, Kannan Raj
  • Patent number: 6778548
    Abstract: A device to create, receive, and transmit packets of data in a packet switching network. This device employs a direct memory access packet controller which would interface between memory contained within a computer system and a packet switched network. This direct memory access packet controller would utilize one or more micro-engines that would dynamically allocate buffer space to process received packets of data. This direct memory access packet controller would further utilize a transmit cell FIFO circuit to allocate buffer space to packets being transmitted. In addition, a sequencer would act to control the workflow of packets being received and transmitted.
    Type: Grant
    Filed: June 26, 2000
    Date of Patent: August 17, 2004
    Assignee: Intel Corporation
    Inventors: Tom E. Burton, Dominic J. Gasbarro, Brian M. Leitner, Dean S. Susnow
  • Patent number: 6772320
    Abstract: A method and computer program for data conversion in a heterogeneous communications network. This method and computer program converts data for computer systems having different data storage architectures so that these computer systems may simply and easily communicate over a network. This is most useful when converting data stored in little endian and big endian format. This method relies on creating the data structure used to convert the data using embedded macros that are not executed at run time. These embedded macros are expanded by the compiler to generate the data structure and thereby saves substantial time during execution.
    Type: Grant
    Filed: November 17, 2000
    Date of Patent: August 3, 2004
    Assignee: Intel Corporation
    Inventor: Ashok Raj
  • Patent number: 6760869
    Abstract: A technique for reporting a hard disk drive failure in a computer system includes detecting a failure of one of a plurality of hard disk drives and reporting the failure to a CIMOM (Conceptual Information Model Object Manager) which in turn forwards a message by an LRA (Local Response Agent) to a PMP (Platform Management Provider which in turn forwards a command to an SMC (Server Management Controller), which forward the command to an HSC (Hot-Swap Controller) activate a display, the display reporting the failure or of a particular one of the hard disk drives to a user.
    Type: Grant
    Filed: June 29, 2001
    Date of Patent: July 6, 2004
    Assignee: Intel Corporation
    Inventor: Son H. Lam
  • Patent number: 6747949
    Abstract: In a method according to an example embodiment of the invention, a data packet is transferred from an I/O node to a host across a channel-based switching fabric interconnect. The method stores a value in a register in the I/O node which is indicative of a number of send credits available to the I/O node. The I/O node keeps a count of the number of data transfers. It is then determined from the value of the register whether or not a sufficient number of send credits is available to the I/O node for the data to be transferred by comparing it with the count of previous data transfers. If a sufficient number of send credits is available to the I/O node, it promptly transfers the data to the host over the channel-based switching fabric interconnect. If a sufficient number of send credits is not available to the I/O node, it waits for the host to update the value stored in the register before transferring data.
    Type: Grant
    Filed: December 16, 1999
    Date of Patent: June 8, 2004
    Assignee: Intel Corporation
    Inventor: William T. Futral
  • Patent number: 6735174
    Abstract: Methods and systems for flow control over channel-based switched fabric connections between a first side and a second side. At least one posted receive buffer is stored in a receive buffer queue at the first side. A number of credits is incremented based on the at least one posted receive buffer. The second side is notified of the number of credits. A number of send credits is incremented at the second side based on the number of credits. A message is sent from the second side to the first side if the number of send credits is larger than or equal to two or the number of send credits is equal to one and a second number of credits is larger than or equal to one. The second number of credits is based on at least one second posted receive buffer at the second side. Therefore, communication of messages between the first side and the second side is prevented from deadlocking.
    Type: Grant
    Filed: March 29, 2000
    Date of Patent: May 11, 2004
    Assignee: Intel Corporation
    Inventors: Mark S. Hefty, Jerrie L. Coffman
  • Patent number: 6731807
    Abstract: Briefly, in accordance with one embodiment on the invention, a method of compressing a data set includes the following. In multiple passes, each data signal in the data set is categorized into a category of a predetermined set, and, for selected categories of the predetermined set, the data signals for that category are coded using a codebook for that category. Briefly, in accordance with another embodiment of the invention, a method of decompressing a compressed data set includes the following. For compressed data signals in the data set in one category of a predetermined set of categories, a signal associated with the particular category is employed for the compressed data signal, and, for selected categories of the predetermined set, the compressed data signals for that category are decoded using a codebook for that category.
    Type: Grant
    Filed: September 11, 1998
    Date of Patent: May 4, 2004
    Assignee: Intel Corporation
    Inventors: Edward A. Pazmino, Tinku Acharya
  • Patent number: 6732166
    Abstract: I/O resources are allocated to one or more hosts in a network cluster. Each host stores a cluster resource table (CRT) that identifies the configuration and allocation of I/O resources within its cluster. Each host includes an I/O resource management agent (RMA) within the operating system. A host's RMA obtains a list of all hosts and I/O units and their network addresses from the fabric services. The RMA then queries each host to obtain at least a portion of the CRTs of each of the host's in the cluster. The RMA replaces its local CRT with the most current version of the CRT (e.g., based on a time and date stamp or version number of each CRT). The host's RMA then queries each I/O unit to identify the I/O controllers and their controller number in the cluster. The RMA then queries each I/O controller in the cluster to identify the I/O devices in the cluster. The RMA then updates its CRT based on this information. The RMA can provide the updated CRT to each of the hosts in the cluster.
    Type: Grant
    Filed: May 28, 1999
    Date of Patent: May 4, 2004
    Assignee: Intel Corporation
    Inventor: Robert J. Woodruff
  • Patent number: 6728260
    Abstract: Briefly, in accordance with one embodiment of the invention, a system includes: shared memory. The system includes the capability to transfer to a router processing unit a fragment of a received frame and a pointer to the fragment in shared memory. Briefly, in accordance with another embodiment of the invention, a method of transferring a fragment of a received frame includes the following. The received frame and the byte length of a fragment of the received frame are stored in shared memory. The fragment of the received frame having the byte length indicated and a pointer to the location of the fragment in shared memory are transferred. Briefly, in accordance with yet another embodiment of the invention, a switch-router includes at least one integrated circuit.
    Type: Grant
    Filed: January 31, 2003
    Date of Patent: April 27, 2004
    Assignee: Intel Corporation
    Inventor: Jie Ni