Patents Represented by Attorney Christopher K. Gagne
  • Patent number: 7826349
    Abstract: A host device is disclosed. The host device includes a receive frame and primitive sequence processor and a connection manager to open a connection with a target device based on a probability of a blocked pathway.
    Type: Grant
    Filed: May 30, 2006
    Date of Patent: November 2, 2010
    Assignee: Intel Corporation
    Inventors: Sumeet Kaur, David A. Draggon
  • Patent number: 7782905
    Abstract: A mechanism for performing remote direct memory access (RDMA) operations between a first server and a second server. The apparatus includes a packet parser and a protocol engine. The packet parser processes a TCP segment within an arriving network frame, where the packet parser performs one or more speculative CRC checks according to an upper layer protocol (ULP), and where the one or more speculative CRC checks are performed concurrent with arrival of the network frame. The protocol engine is coupled to the packet parser. The protocol engine receives results of the one or more speculative CRC checks, and selectively employs the results for validation of a framed protocol data unit (FPDU) according to the ULP.
    Type: Grant
    Filed: February 17, 2006
    Date of Patent: August 24, 2010
    Assignee: Intel-NE, Inc.
    Inventors: Kenneth G. Keels, Brian S. Hausauer, Vadim G. Makhervaks, Eric Jon Schneider
  • Patent number: 7779451
    Abstract: In an embodiment, a method is provided. The method of this embodiment provides receiving a packet having a wake-up pattern, and waking up if the wake-up pattern corresponds to one of a number of dynamically modifiable passwords on a pattern wake list, each of the dynamically modifiable passwords being based, at least in part, on a seed value.
    Type: Grant
    Filed: March 30, 2006
    Date of Patent: August 17, 2010
    Assignee: Intel Corporation
    Inventor: Avigdor Eldar
  • Patent number: 7774466
    Abstract: A distributed data storage system stores a single image file system across a plurality of physical storage volumes. The physical storage may be direct attached storage, or may be coupled through a storage area network (“SAN”). One or more clients communicate with a plurality of storage nodes through a network. A client of the distributed data storage system transmits a request over the network for a file identified in the file system. A load-balancing switch selects one of the storage nodes to process the request. The storage node accesses at least one of the physical volumes and transmits a response for the storage operation to the client.
    Type: Grant
    Filed: February 13, 2003
    Date of Patent: August 10, 2010
    Assignee: Intel Corporation
    Inventors: Joshua L. Coates, Patrick E. Bozeman, Alfred Gary Landrum, Peter D. Mattis, Naveen Nalam, Drew S. Roselli
  • Patent number: 7774575
    Abstract: A method according to one embodiment may include discovering at least one data block comprising logical block address information. The method may also include mapping logical block address information from a first domain into a second domain. Of course, many alternatives, variations, and modifications are possible without departing from this embodiment.
    Type: Grant
    Filed: September 21, 2004
    Date of Patent: August 10, 2010
    Assignee: Intel Corporation
    Inventors: Pak-Lung Seto, Martin M. Massucci
  • Patent number: 7774325
    Abstract: A distributed data storage system stores a single image file system across a plurality of physical storage volumes. The physical storage may be direct attached storage, or may be coupled through a storage area network (“SAN”). One or more clients communicate with a plurality of storage nodes through a network. A client of the distributed data storage system transmits a request over the network for a file identified in the file system. A load-balancing switch selects one of the storage nodes to process the request. The storage node accesses at least one of the physical volumes and transmits a response for the storage operation to the client.
    Type: Grant
    Filed: February 13, 2003
    Date of Patent: August 10, 2010
    Assignee: Intel Corporation
    Inventors: Joshua L. Coates, Patrick E. Bozeman, Alfred Gary Landrum, Peter D. Mattis, Naveen Nalam, Drew S. Roselli
  • Patent number: 7765327
    Abstract: A system to facilitate data transfer between a server and a client in an uninterrupted manner. At least one server network communicates data via a first Input/Output (I/O) architecture. At least two Virtual Network Interface Cards (VNICs) communicate the data via the first I/O architecture. A client network communicates data via a second I/O architecture. At least two bridging devices convert packets useable in the first I/O architecture to packets useable in the second I/O architecture. No more than one of the at least two bridging devices transfers the data with any one of the at least two VNICs, and the at least two bridging devices transfer the data with the client network. At least one intermediate driver binds to the at least one server network and to the at least two VNICs. The at least one intermediate driver provides a fail-over function to maintain a connection between the server network and the client network.
    Type: Grant
    Filed: September 1, 2005
    Date of Patent: July 27, 2010
    Assignee: Intel Corporation
    Inventor: Gangadhar D. Bhat
  • Patent number: 7730239
    Abstract: An apparatus and method is provided to facilitate Input/Output (I/O) transfer in resource limited storage environment. Scatter gather list, segment and memory data buffer allocation are dynamically managed. I/O transfer performance is increased through the use of a data cut-through buffer mechanism.
    Type: Grant
    Filed: June 23, 2006
    Date of Patent: June 1, 2010
    Assignee: Intel Corporation
    Inventors: Naichih Chang, Pak-Lung Seto, Victor Lau
  • Patent number: 7730221
    Abstract: A network controller with a bootable Host Bus Adapter, particularly suitable for iSCSI applications is described. In one example, this includes, a host bus interface, a register to the host bus indicating a mass storage device, a network interface, and a boot memory extension including a driver for the mass storage device that binds to a BIOS.
    Type: Grant
    Filed: June 30, 2005
    Date of Patent: June 1, 2010
    Assignee: Intel Corporation
    Inventors: Nimrod Diamant, Dinesh Kumar
  • Patent number: 7725608
    Abstract: Device images, for example IDE mass storage device images, may be enabled and disabled without disrupting a host system. In one embodiment, the invention includes a memory device register to indicate the presence of a memory device to a computer system, a switch coupled to the memory device register to set the memory device register to indicate the presence of a memory device, and an external interface coupled to the switch to operate the switch.
    Type: Grant
    Filed: June 30, 2005
    Date of Patent: May 25, 2010
    Assignee: Intel Corporation
    Inventor: Nimrod Diamant
  • Patent number: 7680864
    Abstract: In one embodiment, a method is provided that may include determining, at least in part, by a device comprised, at least in part, in storage, whether to request that the storage perform, at least in part, at least one operation. The at least one operation may involve, at least in part, at least one object stored in the storage. The determining may be based, at least in part, upon metadata associated with the at least one object. The metadata may be stored in the storage, and may indicate an earliest permitted deletion time for the at least one object and/or a latest permitted access time for the at least one object. Of course, many modifications, variations, and alternatives are possible without departing from this embodiment.
    Type: Grant
    Filed: March 2, 2004
    Date of Patent: March 16, 2010
    Assignee: Intel Corporation
    Inventors: Donald F. Cameron, Dancil C. Strickland
  • Patent number: 7676604
    Abstract: A method and apparatus for managing task context are provided. Upon initialization, a protocol engine provides context resources available for processing tasks to a task issuer. Based on available context resources, the task issuer creates and manages a free list of available task context indices and assigns an index to a task prior to storing task context in a context memory accessible to both the task issuer and the protocol engine and issuing the task to the protocol engine.
    Type: Grant
    Filed: November 22, 2005
    Date of Patent: March 9, 2010
    Assignee: Intel Corporation
    Inventors: William Halleck, Victor Lau, Pak-Lung Seto, Naichih (Neil) Chang
  • Patent number: 7664889
    Abstract: A storage device is disclosed. The storage device includes a storage controller. The storage controller includes a direct memory access (DMA) Descriptor Manager (DM) to generate DMA descriptors by monitoring user data and a data integrity field (DIF) transferred between a host memory and a local memory based upon a function being performed.
    Type: Grant
    Filed: September 29, 2005
    Date of Patent: February 16, 2010
    Assignee: Intel Corporation
    Inventors: Kiran Vemula, Pak-Iung Seto, Victor Lau, William Halleck, Nai-Chih Chang
  • Patent number: 7650488
    Abstract: In an embodiment, a method is provided that may include providing a first address space exclusively and coherently accessible by a first processor core partition in a platform. A second address space may be provided in this embodiment that is exclusively and coherently accessible by a second processor core partition in the platform. Also in this embodiment, a third address space in the platform may be provided that is accessible, at least in part, by both the first and second processor core partitions and may be to permit communication between the first and second processor core partitions of at least one packet and at least one descriptor associated with the at least one packet. The at least one descriptor may indicate, at least in part, one or more locations in the third address space to store, at least in part, the at least one packet. Of course, many alternatives, modifications, and variations are possible without departing from this embodiment.
    Type: Grant
    Filed: June 18, 2008
    Date of Patent: January 19, 2010
    Assignee: Intel Corporation
    Inventors: Annie Foong, Bryan E. Veal, Arun Raghunath
  • Patent number: 7624156
    Abstract: A method and system are provided for transferring data in a networked system between a local memory in a local system and a remote memory in a remote system. A RDMA request is received and a first buffer region is associated with a first transfer operation. The system determines whether a size of the first buffer region exceeds a maximum transfer size of the networked system. Portions of the second buffer region may be associated with the first transfer operation based on the determination of the size of the first buffer region. The system subsequently performs the first transfer operation.
    Type: Grant
    Filed: May 23, 2000
    Date of Patent: November 24, 2009
    Assignee: Intel Corporation
    Inventors: Mark Sean Hefty, Jerrie L. Coffman
  • Patent number: 7620751
    Abstract: According to one embodiment, a host device is disclosed. The host device includes a logic component to provide an indication of a number of commands issued to a target device, and a task scheduler to schedule commands based on the number of issued commands provided by the logic component.
    Type: Grant
    Filed: September 27, 2005
    Date of Patent: November 17, 2009
    Assignee: Intel Corporation
    Inventors: Nai-Chih Chang, Victor Lau, Pak-lung Seto
  • Patent number: 7619984
    Abstract: A method for error handling of corrupted repeating primitives during frame reception is disclosed. The method comprises identifying a portion of a received frame including a repeating primitive sequence, determining whether data in the repeating primitive sequence has one or more errors, and indicating a successful reception of the received frame with the one or more errors in the repeating primitive sequence if the number of errors is less than a determined threshold. Other embodiments are also disclosed.
    Type: Grant
    Filed: August 30, 2005
    Date of Patent: November 17, 2009
    Assignee: Intel Corporation
    Inventor: Richard D. Carmichael
  • Patent number: 7606954
    Abstract: A write request is received from a host, to write data from memory to storage. The request indicates whether or not to compress the data. The data is either compressed or not compressed, as indicated by the request, prior to sending the data to the storage. Other embodiments are also disclosed and claimed.
    Type: Grant
    Filed: September 29, 2005
    Date of Patent: October 20, 2009
    Assignee: Intel Corporation
    Inventors: Peter C. Brink, Paul S. Levy
  • Patent number: 7596652
    Abstract: An apparatus according to one embodiment may include an integrated circuit. The integrated circuit may include a processor, a bridge, and circuitry capable of coupling the bridge and the processor to a first bus and to a second bus. The first bus may be compatible with a first bus protocol, the second bus may be compatible with a second bus protocol, and the first and second bus protocols may be different from each other. The bridge may be capable of, in response at least in part to a request from the processor, preventing a command received at the bridge via the first bus from being forwarded from the bridge to the second bus. Of course, many alternatives, variations, and modifications are possible without departing from this embodiment.
    Type: Grant
    Filed: May 14, 2004
    Date of Patent: September 29, 2009
    Assignee: Intel Corporation
    Inventors: Mark A. Schmisseur, Deif N. Atallah
  • Patent number: 7590747
    Abstract: A network storage system includes a virtual file system (“VFS”) that manages the files of the network storage system, and a storage center that stores the files. The VFS and the storage center are separated, such that a client accesses the VFS to conduct file system operations and the client accesses the storage center to upload/download files. The client accesses the network storage system through one or more storage ports. The storage center includes a plurality of distributed object storage managers (DOSMs) and a storage cluster that includes a plurality of intelligent storage nodes. The network storage system includes additional storage centers at geographically disparate locations. The network storage system uses a multi-cast protocol to maintain file information at the DOSMs regarding files stored in the intelligent storage nodes, including files stored in disparate storage centers.
    Type: Grant
    Filed: June 30, 2005
    Date of Patent: September 15, 2009
    Assignee: Intel Corporation
    Inventors: Joshua L. Coates, Patrick E. Bozeman, David A. Patterson