Abstract: The present invention uses an ultraviolet ray to clean PCBs in packaging semiconductors, instead of using a plasma gas. Since the ultraviolet ray cleaning does not require a vacuum condition around an ultraviolet ray lamp, a guide belt for conveying the PCBs can be freely installed in such a manner that an ultraviolet ray cleaning tool and fabricating equipment are arranged in-line. This results in an in-line arrangement of an ultraviolet ray cleaning chamber and the fabricating equipment. Therefore, the PCBs can be introduced into fabricating processes immediately after cleaning and a long standby time problem of the PCB outside of the fabricating equipment is solved.

Abstract: A semiconductor device includes a plurality of memory blocks with each memory block including a normal memory section and a redundant memory section. Redundancy circuits replace some defective wordlines in a normal memory section included in a memory block with redundant wordlines in a redundant memory section included in the memory block and replace any remaining defective wordlines with redundant wordlines in a redundant memory section included in another memory block. Therefore, in the semiconductor device, it is possible to repair defective wordlines even if the number of defective wordlines in a normal memory section is larger than the number of redundant wordlines in the corresponding redundant memory section.

Abstract: An embodiment of the present invention provides a pickup tool in accordance with the present invention includes multiple contact parts, which contact a passivation layer of a semiconductor chip so that the contact parts are far from chip pads and fuses when holding the semiconductor chip. Furthermore, a die bonding apparatus has one or two pickup tools, an aligning stage, and a bond stage or a bond head.

Abstract: A socket for mounting memory module boards on a printed circuit board (PCB) includes a first socket, a second socket and a third socket. The first socket includes a first socket body that receives a first memory module board, a first clip that connects to a tab of the first memory module board, and a first signal line connected to the first clip and extending outside of the first socket body. The second socket is in an area adjacent to the first socket and includes a second socket body that receives the first and a second memory module boards on opposite sides of the second socket body, two sets of upper socket pins disposed within the second socket body, and two sets of lower socket pins disposed to be opposite to the upper socket pins.

Abstract: A cathode structure for use in field emission display (FED) devices includes four layers. A first layer consists of conducting lines supported on an insulating substrate. A second layer consists of thin non-conducting lines crossing the conducting lines. A third layer consists of a thick layer of non-conducting material with holes centered between the thin non-conducting lines of the second layer and extending over a portion of the thin non-conducting lines. A fourth layer consists of conducting lines containing holes of the same dimension as and aligned with the holes in the third layer exposing portions of the conducting lines of the first layer and of the non-conducting lines of the second layer. Emissive material is deposited on the exposed portions of the conducting lines of the first layer to produce a cathode for an FED device. The four-layer cathode structure improves emission characteristics such as current density and uniformity for planar edge emitters and surface emitters.

Abstract: A semiconductor package manufacturing method includes: providing a rerouting film; attaching a semiconductor wafer having integrated circuits to the rerouting film, such that chip pads of the integrated circuits correspond to via holes of the rerouting film; forming a solder filling in each of the via holes to electrically connect the chip pads to the metal pattern layer; forming external terminals on terminal pads of the rerouting film; and separating the wafer and the rerouting film into individual semiconductor packages. A method further includes forming a protection layer on the solder filling. Instead of the semiconductor wafer, individual integrated circuit chips can be attached on the rerouting film.

Abstract: An analog-to-digital converter is disclosed, including: a reference generator circuit for generating a plurality of reference voltages; a plurality of amplifying comparators for receiving the reference voltages and analog input signals, each amplifying comparator including: two amplifying paths, each of which has a first amplifier and a second amplifier for alternatively receiving signals from the two paths; a latching comparator having a plurality of latches and receiving output signals from the amplifying comparator; and a digital decoder receiving output signals from the latching comparator and generating a predetermined number of data bits.

Abstract: A semiconductor chip package includes a semiconductor chip having a plurality of contact pads, a plurality of first leads, a plurality of second leads and a housing. Each of the first leads includes an inner lead portion which is electrically coupled to an associated contact pad on the semiconductor chip, and an outer lead portion which extends from the inner lead portion and is exposed outside of the package. The second leads are disposed in an overlapping relationship with the first leads and are electrically insulated from the first leads. The second leads each include an inner lead portion electrically coupled to an associated contact pad on the semiconductor chip and an outer lead portion which extends from the inner lead portion and is exposed outside the package. The housing encapsulates the semiconductor chip and the inner lead portions of the plurality of first and second leads.

Abstract: An MPEG video decoder adapted to decode an incoming MPEG coded video data stream to form decoded MPEG video data and to reconstruct from the decoded MPEG video data a raw video signal, utilizes: an n×n block of decoded video data discrete cosine transform values forming an original matrix having a non-zero value in a preselected corner location in the matrix; and a modified matrix forming apparatus adapted to form a modified matrix having the same content as the original matrix with the exception of a zero in the preselected corner value position; a dummy matrix forming apparatus adapted to form a dummy matrix having zero in each of its matrix positions with the exception of the preselected corner position; an inverse discrete cosine transform apparatus adapted to perform an inverse discrete cosine transform algorithm on the modified matrix and the dummy matrix; and an adder which adds the inverse discrete cosine transform of the modified matrix and the dummy matrix to produce the inverse discrete cosin

Abstract: A method of operation of a computer system for processing an arbitrary document such as a World Wide Web page to provide additional information not immediately available from the raw, unprocessed document. This additional information allows a user to navigate and control the content of the document using, in some embodiments, voice commands and/or an agent-based user interface. The present disclosure provides both a visual display of previously invisible links embedded in a web page image and an audible indication of the presence of such links. The present invention further comprises a scripting language that allows the rapid creation of executable computer instructions (or scripts) for controlling the behaviors and functionality of the agent-based interface. Such scripts enable the creation of a friendlier, easy to use interface to the navigation and control features.

Abstract: A method for dispensing a liquid onto a tape having at least one window. The method involves supplying a tape having at least one window and attaching a film to one side of the tape. Liquid is dispensed to the side of the tape opposite the side to which the film is applied. The film is thereafter separated from the tape.

Abstract: A power semiconductor module, a metal terminal for the power semiconductor module, and methods of fabricating a power semiconductor module and the metal terminal are disclosed. In the power semiconductor module, the metal terminal improves the adhesive strength between the metal terminal and a substrate of the module by increasing the surface area of the metal terminal that contacts an adhesive. A hole and a protrusion formed in an attachment plate of the terminal provide more surface area contacting the adhesive, thereby increasing the adhesive strength between the metal terminal and a metal substrate.

Abstract: A redundancy circuit is capable of repeatedly replacing a defective cell with redundant cells. The redundancy circuit is in a semiconductor memory device that includes memory cells and redundant cells in a memory array. The redundancy circuit includes first and second fuse blocks. The first fuse block has a first main fuse and generates a first redundancy signal according to whether the first main fuse is cut. The first redundancy signal indicates whether there is a defective memory cell for the redundancy circuit to replace. The second fuse block has a second main fuse and generates a second redundancy signal according to whether the second main fuse is cut. The second redundancy signal can stop the replacement of the defective cell with the redundant cell when the redundant cell is defective. When the replacement of the defective cell with the redundant cell is stopped, the defective cell is replaced by another redundant cell.

Abstract: A method for fabricating a semiconductor device having an aluminum (Al) interconnection layer with excellent surface morphology forms an interface control layer having a plurality of atomic layers before forming the Al interconnection layer. In the fabrication method, an interlayer dielectric (ILD) film having a contact hole which exposes a conductive region of the semiconductor substrate is formed on a semiconductor substrate, and an interface control layer having a plurality of atomic layers continuously deposited is formed on the inner wall of the contact hole and the upper surface of the interlayer dielectric film, to a thickness on the order of several angstroms to several tens of angstroms. Then, chemical vapor deposition (CVD) completes an Al blanket deposition on the resultant structure, including the interface control layer, to form a contact plug in the contact hole and an interconnection layer on the interlayer dielectric film.

Abstract: An integrated circuit device having a first type of pads with a probing portion and a bonding portion. The integrated circuit device includes a memory cell array, a logic circuit, and a plurality of the first type of pads and a plurality of a second type of pads. The second type of pads are electrically connected to the logic circuit. The first type of pads are electrically connected to the memory cell array and the logic circuit. Only the probing portion of the first type of pads is contacted by probes during testing of the memory cell array, and the bonding portion is used exclusively for attachment of a bond wire to permit connection to an external system.

Abstract: An input buffer circuit consumes a small amount of power and operates rapidly. The input buffer circuit includes a differential amplifier, a buffer, and a switched current path connected to the differential amplifier. The differential amplifier receives an input signal and a reference voltage and generates an internal signal from a node in the differential amplifier. The buffer generates an output signal from the internal signal. The switched current path can include a current source and/or a current sink that includes series connected transistors with gates that respectively receive the input and output signals. The switched current path is temporarily activated to provide a current that reduces charging or discharging time of the node in the amplifier. The current thus reduces the delay time between edges in the input signal and corresponding edges in the output signal. Accordingly, the input buffer circuit operates rapidly.

Abstract: A memory module includes a plurality of semiconductor memory devices mounted on a printed wiring board (PWB); longitudinal contact terminals that are for connection to a computer mother board and are arranged along at least one longitudinal edge of the PWB; and transverse contact terminals that are for connection to the computer mother board and are arranged along at least one transverse edge of the PWB. A socket for the module includes at least one longitudinal part into which the longitudinal contact terminals are inserted and at least one transverse part into which the transverse contact terminals are inserted. Each transverse socket part can be mounted on a pivot attached to the longitudinal part and rotated to engage a PWB inserted in the longitudinal part. Alternatively, each transverse part can be a flexible circuit carrier.

Abstract: A module appearance inspection apparatus includes a warpage checking unit, a visual checking unit, a first module transfer unit for unloading the module from a module tray, a second module transfer unit for transferring the module within the apparatus, and a third module transfer unit for loading the module to a module tray. The apparatus can replace the first and third module transfer units with a single module transfer unit. In this case, the apparatus includes: a warpage checking unit; a visual checking unit; a supply unit in which module trays are stacked; a storage unit in which module trays also can be stacked; a tray transfer unit which moves a module tray from the supply unit to the storage unit; a first module transfer unit which unloads and loads the module from and to the module tray on the tray transfer unit; and a second module transfer unit which transfers the module from the warpage checking unit or the visual checking unit.