Abstract: An apparatus for measuring volume of a lower extremity includes a substantially elastic sock body with a leg end, a toe end, and a length between the leg end and the toe end. The sock body may be dimensioned to substantially snugly receive a lower extremity. A measurement thread is attached to the sock body in a manner that causes the measurement thread to wrap around the lower extremity in multiple coils along the length of the sock body. The apparatus also includes a measurement gauge that measures at least one attribute of the measurement thread that corresponds to sock volume. In one embodiment, the measurement thread is substantially inelastic and has a fixed end, and the measurement gauge measures length of the measurement thread between the fixed end and the measurement gauge. Other embodiments are described and claimed.

Abstract: A device, method, and system are disclosed. In one embodiment, the device comprises one or more error receiving units, each operable to receive error requests from a given layer in a protocol and synchronize the received error requests to a common clock domain for all layers, and an arbiter unit operable to receive the synchronized error requests from the one or more error receiving units, encode the error requests onto on a common error interconnect, and route the encoded error requests across the interconnect to configuration space.

Abstract: A method for managing thermal condition of a thermal zone that includes multiple thermally controllable components include determining thermal relationship between the components and reducing temperature of a first component by reducing thermal dissipation of a second component.

Abstract: A multithreaded architecture is disclosed for managing external memory updates for fault detection in redundant multithreading systems using speculative memory support. In particular, a method provides input replication of load values on a SRT processor by using speculative memory support to isolate redundant threads form external updates. This method thus avoids the need for dedicated structures to provide input replication.

Abstract: A method, device, and system are disclosed. In one embodiment, the method comprises receiving a code segment to be inserted into a flash memory storing code segments, selecting one or more contiguous code segments in flash memory with a total size equal to or larger than the received code segment, calculating the amount of data movement necessary for the one or more selected contiguous code segments, and if the amount is minimum, moving the one or more selected contiguous code segments and replacing them with the received code segment.

Abstract: A method, machine readable medium, and system are disclosed. In one embodiment the method comprises collecting a loop trip count continuously during runtime of a region of code being executed that contains a loop, categorizing the trip count to identify one or more code modification techniques applicable to the loop, and dynamically applying the one or more applicable code modification techniques to alter the code that relates to the loop.

Abstract: An integrated circuit device, such as a processor initiates a transition to a first power management state. The device then receives a request to exit the first power management state and, in response exits the first power management state at the highest of a reference operating voltage, such as a minimum operating voltage, and a current voltage. For one aspect, an analog to digital converter may be used to determine the current voltage level. Further, for one aspect the first power management state may be a deeper sleep (C4) state, and the processor may quickly exit to a C2 state in response to a bus event such as a bus snoop.

Abstract: A method, apparatus, and system are disclosed. In one embodiment the method comprises inputting an early clock signal and a late clock signal to a memory device and generating an average clock signal for the memory device by averaging the early clock signal and the late clock signal.

Abstract: In one embodiment, a method for providing power management via virtualization includes monitoring the utilization of a host platform device by one or more virtual machines and managing power consumption of the host platform device based on the results of monitoring.

Abstract: A method, device, and system are included. In one embodiment, the method included issuing a single row refresh command for a first row in a memory starting at a target address, incrementing a row counter, continuing issuing a single row refresh command for each subsequent row in the memory and incrementing the row counter until the number of row counter increments is equal to the number of rows of the memory refreshed as a result of a refresh (REF) command.

Abstract: Embodiments of the invention include apparatus with a level-up shifter including a comparator having a pair of cross coupled PFETs with sources coupled to an I/O power supply and gates coupled to each other's drain, and a differential pair of NFETs with sources coupled to ground and gates respectively coupled to a data input and an inverted data input; and first and second pull-up PFETs have sources coupled to a pull-up voltage and drains respectively coupled between the differential pair of NFETs and the pair of cross coupled PFETs. The cross coupled PFETs and differential pair of NFETs perform level translation of low swing logic levels at the data input to high swing logic levels on a drain of one of the cross-coupled PFETs, while first and second pull-up PFETs speed the level translation in response to the data input and the inverted data input.

Abstract: An approach to selecting either an actual stepping revision ID value or a compatible revision ID value to be readable by a processor through a revision ID register.

Abstract: In one embodiment of the invention, a processor state of a processor is determined upon expiration of a system management interrupt (SMI) timer. The processor state is one of an operational state and a low power state. The SMI timer is loaded with a timer value based on the processor state. The timer value is one of a first value and a second value. The processor is transitioned to one of the operational state and the low power state according to the processor state.

Abstract: A method comprising automatic installation of device drives in which an operating system or other device installation code obtains a unique identifier from a device, uses that unique identifier to locate a driver for the device, downloads the driver from that location, and completes the installation. Various methods of using the unique identifier to locate the driver are enumerated.

Abstract: Methods and devices for power management of graphics or other computer subsystems are disclosed. In one embodiment, graphics software components are configurable in a manner that allows them to place the graphics subsystem is a “safe” state prior to a suspend event, and back into a “working” state after a resume event, without explicit support from an operating system (OS) power management driver. When operating in the absence of an OS-supplied driver, the graphics driver receives notification of power management events, and sends a message to a support application, which then causes the graphics to enter a quiescent state by taking exclusive ownership of the display and issuing standard device-independent OS graphics calls (for a power-down event) or to relinquish display ownership (for a power-up event). From within this quiescent state the graphics may be safely power managed without adverse effects to the graphics chips and without creating any instabilities in other graphics applications.

Abstract: A method for providing an appliance personality is presented comprising ascertaining a current location/location type for the electronic appliance, selecting a suitable electronic appliance personality based, at least in part, on the ascertained location/location type of the electronic appliance and provisioning the selected appliance personality on the electronic appliance.