Patents Represented by Attorney Donald M. Boles
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Patent number: 5153890Abstract: A semiconductor device such as a laser diode grown on a structured substrate surface having horizontal regions and adjacent inclined sidewall surfaces. The horizontal regions are of standard orientation while the inclined surfaces are misoriented. The layers forming the device are grown on top of a structured surface, with at least the active layer of the semiconductor material assuming an ordered state which depends on the orientation of the substrate surface. The center section of the active layer is deposited on top of a horizontal region. This section is in the ordered state and has a lower bandgap energy than the terminating sections which are grown on the inclined regions and which exhibit a wider bandgap. The active layer can be terminated in either lateral direction with wider bandgap materials so that buried devices can be obtained that provide strongly confined and non-absorbing mirrors.Type: GrantFiled: October 24, 1991Date of Patent: October 6, 1992Assignee: International Business Machines CorporationInventors: Gian-Luca Bona, Wilhelm Heuberger, Peter Roentgen, Peter Unger
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Patent number: 5150328Abstract: A memory organization having one or more groups of memory arrays is disclosed. Each array, which may be on a single chip, is provided with both a data port and a separate address port which may also serve as an alternate data port. Use of the alternate data ports permits a substantially smaller number of input/output circuits to be used than the number required if both the address and data ports are used. The standard data port is, however, available should a higher-speed application be desired using separate address and data ports. In a single-port application, an on-chip data buffer permits the data to be sent and received through the address port in timed relationship with row and column address signals and without interfering with such address signals. An optional group select signal permits a large memory organization to utilize the alternate data ports of numerous groups of array chips.Type: GrantFiled: October 25, 1988Date of Patent: September 22, 1992Assignee: Internation Business Machines CorporationInventor: Frederick J. Aichelmann, Jr.
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Patent number: 5150437Abstract: Electro-optical Scanner comprising an optical waveguide (41) and an acoustic waveguide (42), arranged on a transparent substrate (40) and being colinear with respect to each other, for deflecting light waves out from the optical waveguide (41) by colinear acousto-optic interaction of the light waves (44) with a short surface acoustic wave traveling diffraction grating (43) propagating in the acoustic waveguide (42). The short traveling diffraction grating (43) is generated by a wide band transducer. Different applications of the electro-optical scanner are possible.Type: GrantFiled: December 11, 1991Date of Patent: September 22, 1992Assignee: International Business Machines CorporationInventor: Fritz Gfeller
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Patent number: 5145551Abstract: A high precision system for machining substrates by means of an energy beam includes real time digital signal processor control and a deflection system providing control, within a predetermined field of the substrate, of the angle at which the beam machines the substrate. An electron beam is used in a vacuum chamber in a preferred embodiment. The system also includes an x-y table for positioning the substrate and may have provision for detecting the x-y position and angular misregistration of the substrate. Dynamic forms and stigmator control may be used to produce a uniform beam within the field. The system allows a high speed vector machining process, which optimizes the overall system throughput by minimizing the settling time of the deflection system.Type: GrantFiled: September 13, 1991Date of Patent: September 8, 1992Assignee: International Business Machines CorporationInventors: Michael A. Booke, Michael H. W. Kallmeyer, Nabil A. Rizk, You-Wen Yau
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Patent number: 5144634Abstract: A method for passivating mirrors in the process of fabricating semiconductor laser diodes is disclosed. Key steps of the method are: (1) providing a contamination-free mirror facet, followed by (2) an in-situ application of a continuous, insulating (or low conductive) passivation layer. This layer is formed with material that acts as a diffusion barrier for impurities capable of reacting with the semiconductor but which does not itself react with the mirror surface. The contamination-free mirror surface is obtained by cleaving in a contamination-free environment, or by cleaving in air, followed by mirror etching, and subsequent mirror surface cleaning. The passivation layer consists of Si, Ge or Sb.Type: GrantFiled: August 21, 1991Date of Patent: September 1, 1992Assignee: International Business Machines CorporationInventors: Marcel Gasser, Ernst E. Latta
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Patent number: 5132613Abstract: An integrated circuit test structure is comprised of a stacked substrate MLC space transformer (5). A top surface of an interface substrate (12) is employed for decoupling capacitor (36) placement. The top surface has metal conductors (20) exposed thereon for terminating power supply buses from a tester (1). Individual layers of a personalization substrate (14) are fabricated to redundantly extend internal power plane metalization (22) to the sidewalls. Redundant pads (26) are placed on each personalization layer to increase the surface area for side mount contact. Metal pads (18) are deposited over the exposed sidewall metal for forming a sidewall contact to the power planes within the personalization substrate.Type: GrantFiled: November 30, 1990Date of Patent: July 21, 1992Assignee: International Business Machines CorporationInventors: Donald J. Papae, Donald F. Schomaker, Michael A. Sorna
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Patent number: 5130528Abstract: A heterojunction optical switch is taught. Briefly stated, birefringence in the form of a Pockel Cell is utilized such that biasing of the Pockel Cell permits the passage of light therethrough. Preferably, a light detector and resistor are electrically in parallel with the Pockel Cell such that light impinging upon the light detector causes the Pockel Cell to be reverse biased with the result that a separate light source may pass through the Pockel Cell. In this fashion, the Pockel Cell operates as a true optical switch.Type: GrantFiled: March 1, 1991Date of Patent: July 14, 1992Assignee: International Business Machines CorporationInventor: Alfred Phillips, Jr.
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Patent number: 5124522Abstract: A high precision system for machining substrates by means of an energy beam includes real time digital signal processor control and a deflection system providing control, within a predetermined field of the substrate, of the angle at which the beam machines the substrate. An electron beam is used in a vacuum chamber in a preferred embodiment. The system also includes an x-y table for positioning the substrate and may have provision for detecting the x-y position and angular misregistration of the substrate. Dynamic forms and stigmator control may be used to produce a uniform beam within the field. The system allows a high speed vector machining process, which optimizes the overall system throughput by minimizing the settling time of the deflection system.Type: GrantFiled: July 23, 1990Date of Patent: June 23, 1992Inventors: Michael A. Booke, Michael H. W. Kallmeyer, Nabil A. Rizk, You-Wen Yau
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Patent number: 5120987Abstract: The present invention is directed to a tunable delay element incorporating one-half of a bipolar SRAM cell and a reference generator. In operation, the rising edge and incoming clock pulse sets the receiver/latch, latching the internal clock (i.e., the write pulse). The same rising edge of the clock pulse also functions to initiate the switching of the half memory cell in the tunable delay. When the half memory cell is switched halfway to its second state (relative to the referenced generator) the latch is disabled and the ICL write pulse goes low. The ICL write pulse is thus self-timed to be operational in the actual memory cell. Some delay circuitry is also provided for controlling the switching speed of the half memory cell in the tunable delay in order to selectively adjust the ICL pulse width.Type: GrantFiled: January 31, 1991Date of Patent: June 9, 1992Inventor: Robert C. Wong
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Patent number: 5111723Abstract: A single stroke punch apparatus includes positive removal by compressed air of workpiece slugs which adhere to the punch. A die plate has a series of bushing receiving features formed from two concentric diameters. The die plate has provision for introducing a flow of compressed air into each of the bushing receiving features. A support bushing is mounted in each of the bushing receiving features and has a surface for support of the workpiece which is elevated with respect to the die plate. A slug removal bushing is also mounted in the bushing receiving feature and is pressed into the wall of the support bushing opposite the workpiece supporting surface to form a seal. The wall of the bushing receiving feature, the support bushing, and the slug removal bushing define a passage for the compressed air such that the compressed air impinges upon the punch directly adjacent the end wall of the support bushing to positively remove the punch slug which is adhered to the punch.Type: GrantFiled: March 12, 1991Date of Patent: May 12, 1992Assignee: International Business Machines Corp.Inventors: Franz Andrusch, Siegfried Beerhalter, Wolfgang F. Mueller, Felix B. Zykoff
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Patent number: 5103493Abstract: A method, and device produced therewith, for improving the planarity of etched mirror facets 18 of integrated optic structures with non-planar stripe waveguides, such as ridge or groove diode lasers or passive devices such as modulators and switches. The curvature of the mirror facet surface at the edges of the waveguide due to topographical, lithographical and etch process effects, causes detrimental phase distortions, and is avoided by widening the waveguide end near the mirror surface thereby shifting the curved facet regions away from the light mode region to surface regions where curvature is not critical.Type: GrantFiled: March 15, 1991Date of Patent: April 7, 1992Inventors: Peter L. Buchmann, Peter Vettiger, Otto Voegeli, David J. Webb
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Patent number: 5100220Abstract: A semiconductor device, formed on a wafer, comprises an array of laser diodes, each emitting a beam parallel to the wafer surface and, integrated with the array, individually tilted deflecting mirrors forming an array of virtual sources. The virtual sources are spaced more closely together than the physical separation of the laser diodes and can even be coincident, thereby reducing the apparent spacing between the beam origins. The reflected beams are substantially perpendicular to the wafer providing a "surface-emitting" device. The required deflector configuration can be fabricated using a single undirectional process, the mirror positions and orientations being determined by proper segment geometry of the etch-mask.Type: GrantFiled: October 9, 1990Date of Patent: March 31, 1992Assignee: International Business Machines CorporationInventor: Otto Voegeli
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Patent number: 5064772Abstract: An integrated circuit bipolar transistor is described wherein the relative semiconductor electrode areas are established by an electrode pedestal that includes a base contact positioning feature and wiring constraints are relaxed by a base pedestal that facilitates the positioning of contact wiring that is independent of contact location. A heterojunction bipolar transistor having a base area less than twice as large as the emitter area is described.Type: GrantFiled: September 4, 1990Date of Patent: November 12, 1991Assignee: International Business Machines CorporationInventor: Chakrapani G. Jambotkar
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Patent number: 5063173Abstract: A method for passivating mirrors in the process of fabricating semiconductor laser diodes is disclosed. Key steps of the method are: (1) providing a contamination-free mirror facet, followed by (2) an in-situ application of a continuous, insulating (or low conductive) passivation layer. This layer is formed with material that acts as a diffusion barrier for impurities capable of reacting with the semiconductor but which does not itself react with the mirror surface.The contamination-free mirror surface is obtained by cleaving in a contamination-free environment, or by cleaving in air, followed by mirror etching, and subsequent mirror surface cleaning. The passivation layer consists of Si, Ge or Sb.Type: GrantFiled: June 15, 1990Date of Patent: November 5, 1991Assignee: International Business Machines CorporationInventors: Marcel Gasser, Ernst E. Latta
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Patent number: 5060116Abstract: A electronics system and method are provided which allow engineering changes to be made to a substrate without requiring the addition of fly wires and without requiring relatively large areas of pads for attaching these wires. Each device site is surrounded by a series of engineering change ring patterns. A series of engineering change patterns allow change interconnections between device sites to be made. Fan-in metallizations extend inwardly to the device sites from these change patterns, with a series of vias making surface connections adjacent to the ring patterns. Fan-out metallizations extend from the device site pads to the ring patterns, with a series of vias making surface connections adjacent to the ring patterns. Engineering changes are made by directly writing surface metal deposits to make the appropriate connections between the vias and the ring pattern. The original chip pad connections and the new ring pattern connections can be appropriately isolated by laser deletions, if necessary.Type: GrantFiled: April 20, 1990Date of Patent: October 22, 1991Inventors: Warren D. Grobman, Charles J. Kraus, deceased, by Paula A. Kraus, executrix, Leon L. Wu, Herbert I. Stoller
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Patent number: 5032219Abstract: A method, and device produced therewith, for improving the planarity of etched mirror facets 18 of integrated optic structures with non-planar stripe waveguides, such as ridge or groove diode lasers or passive devices such as modulators and switches. The curvature of the mirror facet surface at the edges of the waveguide due to topographical, lithographical and etch process effects, causes detrimental phase distortions, and is avoided by widening the waveguide end near the mirror surface thereby shifting the curved facet regions away from the light mode region to surface regions where curvature is not critical.Type: GrantFiled: June 6, 1990Date of Patent: July 16, 1991Assignee: International Business Machines CorporationInventors: Peter L. Buchmann, Peter Vettiger, Otto Voegeli, David J. Webb
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Patent number: 5032879Abstract: An integrated semiconductor structure with optically coupled laser diode (11) and photodiode 12A, both devices having etched, vertical facets (16A, 21). The photodiode has a spatially non-uniform sensitivity profile with respect to the incident light beam (18A) emitted by the laser. This is due to the varying distance from the laser facet and/or to variations in the angle of incidence and results in photocurrents produced by the photodiode that depend on the intensity distribution of the light beam. The spatially non-uniform sensitivity profile allows the measurement of the far-field intensity distribution of the laser and thus on-wafer screening of lasers with respect to their mode stability.Type: GrantFiled: June 11, 1990Date of Patent: July 16, 1991Assignee: International Business Machines CorporationInventors: Peter L. Buchmann, Christoph S. Harder, Otto Vogeli
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Patent number: 5029555Abstract: A method and apparatus for maintaining orientation of a wafer with respect to the wafer holder and a source emission is disclosed.Briefly stated, a wafer is disposed on a wafer holder and displaced in translation only while made to continuously follow a planar closed path which allows the rotation of the wafer with respect to source of emission while keeping the wafer and the wafer holder uniformly aligned with respect to each other.Type: GrantFiled: September 13, 1989Date of Patent: July 9, 1991Assignee: International Business Machines CorporationInventors: Hans P. Dietrich, Hanspeter Ott, David J. Webb
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Patent number: 5021688Abstract: A two stage address decoder circuit (AD) for 1/64 decode operation is disclosed which operates at high speed with low power consumption. Briefly stated, the circuit includes a first stage comprised of two predecoder circuits operable to develop predecoded output signals in response to input address signals and corresponding inverted address signals. Each predecoder circuit consists of a lower power high speed Differential Cascode Current Switch tree with its associated current source. The second or final decode stage is comprised of a plurality of final decoding circuits. Each final circuit consisting of a 2 way OR gate dynamically activated through a switched current source. The inputs of the 2 way OR gate are connected to one pair of the predecoded output signals. Final decoder circuits provide final decoded output signals which drive the word lines of a memory cell array.Type: GrantFiled: October 5, 1989Date of Patent: June 4, 1991Assignee: International Business Machines CorporationInventors: Sylvain Leforestier, Dominique Omet
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Patent number: 4995539Abstract: A method and apparatus for breaking a scribed workpiece such as a semiconductor wafer is taught. Briefly stated, the semiconductor wafer is disposed between two elastomeric foils, one of which is adhesively attached to the side of the workpiece which is not scribed. The foils are stretched and a force is then applied to the sandwich so that the workpiece breaks along the scribed lines. Due to the elastomeric nature of the foils the broken pieces separate slightly and remain separated after breaking, thereby preventing damage to adjacent surfaces of the workpiece.Type: GrantFiled: September 13, 1989Date of Patent: February 26, 1991Inventor: Heinz Richard